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/Linux-v6.6/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
Dtable.c6 0x800, 0x80040000,
7 0x804, 0x00000003,
8 0x808, 0x0000FC00,
9 0x80C, 0x0000000A,
10 0x810, 0x10001331,
11 0x814, 0x020C3D10,
12 0x818, 0x02200385,
13 0x81C, 0x00000000,
14 0x820, 0x01000100,
15 0x824, 0x00390204,
[all …]
Ddm.h7 #define MAIN_ANT 0
10 #define AUX_ANT_CG_TRX 0
11 #define MAIN_ANT_CGCS_RX 0
15 #define DM_REG_RF_MODE_11N 0x00
16 #define DM_REG_RF_0B_11N 0x0B
17 #define DM_REG_CHNBW_11N 0x18
18 #define DM_REG_T_METER_11N 0x24
19 #define DM_REG_RF_25_11N 0x25
20 #define DM_REG_RF_26_11N 0x26
21 #define DM_REG_RF_27_11N 0x27
[all …]
/Linux-v6.6/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/
Dtable.c7 0x800, 0x80040000,
8 0x804, 0x00000003,
9 0x808, 0x0000fc00,
10 0x80c, 0x0000000a,
11 0x810, 0x10005388,
12 0x814, 0x020c3d10,
13 0x818, 0x02200385,
14 0x81c, 0x00000000,
15 0x820, 0x01000100,
16 0x824, 0x00390004,
[all …]
/Linux-v6.6/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/
Dtable.c7 0x024, 0x0011800f,
8 0x028, 0x00ffdb83,
9 0x800, 0x80040002,
10 0x804, 0x00000003,
11 0x808, 0x0000fc00,
12 0x80c, 0x0000000a,
13 0x810, 0x10000330,
14 0x814, 0x020c3d10,
15 0x818, 0x02200385,
16 0x81c, 0x00000000,
[all …]
/Linux-v6.6/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
Dtable.c9 0x024, 0x0011800d,
10 0x028, 0x00ffdb83,
11 0x014, 0x088ba955,
12 0x010, 0x49022b03,
13 0x800, 0x80040002,
14 0x804, 0x00000003,
15 0x808, 0x0000fc00,
16 0x80c, 0x0000000a,
17 0x810, 0x80706388,
18 0x814, 0x020c3d10,
[all …]
/Linux-v6.6/drivers/net/wireless/mediatek/mt76/mt7915/
Deeprom.h15 MT_EE_CHIP_ID = 0x000,
16 MT_EE_VERSION = 0x002,
17 MT_EE_MAC_ADDR = 0x004,
18 MT_EE_MAC_ADDR2 = 0x00a,
19 MT_EE_DDIE_FT_VERSION = 0x050,
20 MT_EE_DO_PRE_CAL = 0x062,
21 MT_EE_WIFI_CONF = 0x190,
22 MT_EE_RATE_DELTA_2G = 0x252,
23 MT_EE_RATE_DELTA_5G = 0x29d,
24 MT_EE_TX0_POWER_2G = 0x2fc,
[all …]
/Linux-v6.6/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
Dtable.c7 0x01c, 0x07000000,
8 0x800, 0x00040000,
9 0x804, 0x00008003,
10 0x808, 0x0000fc00,
11 0x80c, 0x0000000a,
12 0x810, 0x10005088,
13 0x814, 0x020c3d10,
14 0x818, 0x00200185,
15 0x81c, 0x00000000,
16 0x820, 0x01000000,
[all …]
/Linux-v6.6/drivers/pinctrl/mediatek/
Dpinctrl-mt8167.c18 /* 0E4E8SR 4/8/12/16 */
20 /* 0E2E4SR 2/4/6/8 */
23 MTK_DRV_GRP(2, 16, 0, 2, 2)
27 MTK_PIN_DRV_GRP(0, 0xd00, 0, 0),
28 MTK_PIN_DRV_GRP(1, 0xd00, 0, 0),
29 MTK_PIN_DRV_GRP(2, 0xd00, 0, 0),
30 MTK_PIN_DRV_GRP(3, 0xd00, 0, 0),
31 MTK_PIN_DRV_GRP(4, 0xd00, 0, 0),
33 MTK_PIN_DRV_GRP(5, 0xd00, 4, 0),
34 MTK_PIN_DRV_GRP(6, 0xd00, 4, 0),
[all …]
Dpinctrl-mt8516.c18 /* 0E4E8SR 4/8/12/16 */
20 /* 0E2E4SR 2/4/6/8 */
23 MTK_DRV_GRP(2, 16, 0, 2, 2)
27 MTK_PIN_DRV_GRP(0, 0xd00, 0, 0),
28 MTK_PIN_DRV_GRP(1, 0xd00, 0, 0),
29 MTK_PIN_DRV_GRP(2, 0xd00, 0, 0),
30 MTK_PIN_DRV_GRP(3, 0xd00, 0, 0),
31 MTK_PIN_DRV_GRP(4, 0xd00, 0, 0),
33 MTK_PIN_DRV_GRP(5, 0xd00, 4, 0),
34 MTK_PIN_DRV_GRP(6, 0xd00, 4, 0),
[all …]
Dpinctrl-mt6795.c11 PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \
12 _x_bits, 15, 0)
15 PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \
16 _x_bits, 16, 0)
19 PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \
23 PIN_FIELD16(0, 196, 0x0, 0x10, 0, 1),
27 PIN_FIELD16(0, 196, 0x100, 0x10, 0, 1),
31 PIN_FIELD16(0, 196, 0x200, 0x10, 0, 1),
35 PIN_FIELD16(0, 196, 0x400, 0x10, 0, 1),
39 PIN_FIELD16(0, 196, 0x500, 0x10, 0, 1),
[all …]
Dpinctrl-mt8173.c18 #define DRV_BASE 0xb00
21 MTK_PIN_PUPD_SPEC_SR(119, 0xe00, 2, 1, 0), /* KROW0 */
22 MTK_PIN_PUPD_SPEC_SR(120, 0xe00, 6, 5, 4), /* KROW1 */
23 MTK_PIN_PUPD_SPEC_SR(121, 0xe00, 10, 9, 8), /* KROW2 */
24 MTK_PIN_PUPD_SPEC_SR(122, 0xe10, 2, 1, 0), /* KCOL0 */
25 MTK_PIN_PUPD_SPEC_SR(123, 0xe10, 6, 5, 4), /* KCOL1 */
26 MTK_PIN_PUPD_SPEC_SR(124, 0xe10, 10, 9, 8), /* KCOL2 */
28 MTK_PIN_PUPD_SPEC_SR(67, 0xd10, 2, 1, 0), /* ms0 DS */
29 MTK_PIN_PUPD_SPEC_SR(68, 0xd00, 2, 1, 0), /* ms0 RST */
30 MTK_PIN_PUPD_SPEC_SR(66, 0xc10, 2, 1, 0), /* ms0 cmd */
[all …]
/Linux-v6.6/Documentation/devicetree/bindings/phy/
Dqcom,sa8775p-dwmac-sgmii-phy.yaml35 const: 0
51 reg = <0x08901000 0xe10>;
54 #phy-cells = <0>;
/Linux-v6.6/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/
Dtable.c7 0x024, 0x0011800f,
8 0x028, 0x00ffdb83,
9 0x800, 0x80040002,
10 0x804, 0x00000003,
11 0x808, 0x0000fc00,
12 0x80c, 0x0000000a,
13 0x810, 0x10005388,
14 0x814, 0x020c3d10,
15 0x818, 0x02200385,
16 0x81c, 0x00000000,
[all …]
/Linux-v6.6/drivers/staging/rtl8723bs/hal/
Dodm_reg.h16 #define ODM_BB_RESET 0x002
17 #define ODM_DUMMY 0x4fe
18 #define RF_T_METER_OLD 0x24
19 #define RF_T_METER_NEW 0x42
21 #define ODM_EDCA_VO_PARAM 0x500
22 #define ODM_EDCA_VI_PARAM 0x504
23 #define ODM_EDCA_BE_PARAM 0x508
24 #define ODM_EDCA_BK_PARAM 0x50C
25 #define ODM_TXPAUSE 0x522
28 #define ODM_FPGA_PHY0_PAGE8 0x800
[all …]
Dodm_RegDefine11N.h13 #define ODM_REG_RF_MODE_11N 0x00
14 #define ODM_REG_RF_0B_11N 0x0B
15 #define ODM_REG_CHNBW_11N 0x18
16 #define ODM_REG_T_METER_11N 0x24
17 #define ODM_REG_RF_25_11N 0x25
18 #define ODM_REG_RF_26_11N 0x26
19 #define ODM_REG_RF_27_11N 0x27
20 #define ODM_REG_RF_2B_11N 0x2B
21 #define ODM_REG_RF_2C_11N 0x2C
22 #define ODM_REG_RXRF_A3_11N 0x3C
[all …]
/Linux-v6.6/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
Dgm200.c29 nvkm_falcon_wr32(falcon, 0x200, 0x0000030e); in gm200_pmu_flcn_bind_stat()
30 return (nvkm_falcon_rd32(falcon, 0x20c) & 0x00007000) >> 12; in gm200_pmu_flcn_bind_stat()
36 nvkm_falcon_wr32(falcon, 0xe00, 4); /* DMAIDX_UCODE */ in gm200_pmu_flcn_bind_inst()
37 nvkm_falcon_wr32(falcon, 0xe04, 0); /* DMAIDX_VIRT */ in gm200_pmu_flcn_bind_inst()
38 nvkm_falcon_wr32(falcon, 0xe08, 4); /* DMAIDX_PHYS_VID */ in gm200_pmu_flcn_bind_inst()
39 nvkm_falcon_wr32(falcon, 0xe0c, 5); /* DMAIDX_PHYS_SYS_COH */ in gm200_pmu_flcn_bind_inst()
40 nvkm_falcon_wr32(falcon, 0xe10, 6); /* DMAIDX_PHYS_SYS_NCOH */ in gm200_pmu_flcn_bind_inst()
41 nvkm_falcon_mask(falcon, 0x090, 0x00010000, 0x00010000); in gm200_pmu_flcn_bind_inst()
42 nvkm_falcon_wr32(falcon, 0x480, (1 << 30) | (target << 28) | (addr >> 12)); in gm200_pmu_flcn_bind_inst()
51 .debug = 0xc08,
[all …]
/Linux-v6.6/drivers/staging/rtl8192u/
Dr819xU_phyreg.h5 #define RF_DATA 0x1d4 /* FW will write RF data in the register.*/
8 #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */
9 #define rFPGA0_TxGainStage 0x80c
10 #define rFPGA0_XA_HSSIParameter1 0x820
11 #define rFPGA0_XA_HSSIParameter2 0x824
12 #define rFPGA0_XB_HSSIParameter1 0x828
13 #define rFPGA0_XB_HSSIParameter2 0x82c
14 #define rFPGA0_XC_HSSIParameter1 0x830
15 #define rFPGA0_XC_HSSIParameter2 0x834
16 #define rFPGA0_XD_HSSIParameter1 0x838
[all …]
Dr819xU_firmware_img.c7 0x0, };
10 0x800, 0x00000000,
11 0x804, 0x00000001,
12 0x808, 0x0000fc00,
13 0x80c, 0x0000001c,
14 0x810, 0x801010aa,
15 0x814, 0x008514d0,
16 0x818, 0x00000040,
17 0x81c, 0x00000000,
18 0x820, 0x00000004,
[all …]
Dr8190_rtl8256.c39 for (eRFPath = 0; eRFPath < RF90_PATH_MAX; eRFPath++) { in phy_set_rf8256_bandwidth()
50 0x0b, bMask12Bits, 0x100); /* phy para:1ba */ in phy_set_rf8256_bandwidth()
53 0x2c, bMask12Bits, 0x3d7); in phy_set_rf8256_bandwidth()
56 0x0e, bMask12Bits, 0x021); in phy_set_rf8256_bandwidth()
59 0x14, bMask12Bits, 0x5ab); in phy_set_rf8256_bandwidth()
66 …rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x0b, bMask12Bits, 0x300); /* phy para:… in phy_set_rf8256_bandwidth()
67 rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x2c, bMask12Bits, 0x3df); in phy_set_rf8256_bandwidth()
68 rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x0e, bMask12Bits, 0x0a1); in phy_set_rf8256_bandwidth()
72 rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x14, bMask12Bits, 0x59b); in phy_set_rf8256_bandwidth()
74 rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x14, bMask12Bits, 0x5ab); in phy_set_rf8256_bandwidth()
[all …]
/Linux-v6.6/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/
Ddm.h11 #define MF_USC_LSC 0
14 #define MAIN_ANT 0
17 #define AUX_ANT_CG_TRX 0
18 #define MAIN_ANT_CGCS_RX 0
22 #define DM_REG_RF_MODE_11N 0x00
23 #define DM_REG_RF_0B_11N 0x0B
24 #define DM_REG_CHNBW_11N 0x18
25 #define DM_REG_T_METER_11N 0x24
26 #define DM_REG_RF_25_11N 0x25
27 #define DM_REG_RF_26_11N 0x26
[all …]
/Linux-v6.6/drivers/staging/rtl8192e/rtl8192e/
Dtable.c10 0x800, 0x00000000,
11 0x804, 0x00000001,
12 0x808, 0x0000fc00,
13 0x80c, 0x0000001c,
14 0x810, 0x801010aa,
15 0x814, 0x008514d0,
16 0x818, 0x00000040,
17 0x81c, 0x00000000,
18 0x820, 0x00000004,
19 0x824, 0x00690000,
[all …]
Dr8190P_rtl8256.c24 for (eRFPath = 0; eRFPath < priv->num_total_rf_path; eRFPath++) { in rtl92e_set_bandwidth()
28 0x0b, bMask12Bits, 0x100); in rtl92e_set_bandwidth()
30 0x2c, bMask12Bits, 0x3d7); in rtl92e_set_bandwidth()
32 0x0e, bMask12Bits, 0x021); in rtl92e_set_bandwidth()
36 0x0b, bMask12Bits, 0x300); in rtl92e_set_bandwidth()
38 0x2c, bMask12Bits, 0x3ff); in rtl92e_set_bandwidth()
40 0x0e, bMask12Bits, 0x0e1); in rtl92e_set_bandwidth()
52 u32 u4RegValue = 0; in rtl92e_config_rf()
57 u32 RegOffSetToBeCheck = 0x3; in rtl92e_config_rf()
58 u32 RegValueToBeCheck = 0x7f1; in rtl92e_config_rf()
[all …]
/Linux-v6.6/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
Ddm.h7 #define MAIN_ANT 0
10 #define AUX_ANT_CG_TRX 0
11 #define MAIN_ANT_CGCS_RX 0
17 #define DM_REG_RF_MODE_11N 0x00
18 #define DM_REG_RF_0B_11N 0x0B
19 #define DM_REG_CHNBW_11N 0x18
20 #define DM_REG_T_METER_11N 0x24
21 #define DM_REG_RF_25_11N 0x25
22 #define DM_REG_RF_26_11N 0x26
23 #define DM_REG_RF_27_11N 0x27
[all …]
/Linux-v6.6/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
Ddm.h7 #define MAIN_ANT 0
10 #define AUX_ANT_CG_TRX 0
11 #define MAIN_ANT_CGCS_RX 0
17 #define DM_REG_RF_MODE_11N 0x00
18 #define DM_REG_RF_0B_11N 0x0B
19 #define DM_REG_CHNBW_11N 0x18
20 #define DM_REG_T_METER_11N 0x24
21 #define DM_REG_RF_25_11N 0x25
22 #define DM_REG_RF_26_11N 0x26
23 #define DM_REG_RF_27_11N 0x27
[all …]
/Linux-v6.6/include/linux/fsl/
Dguts.h29 u32 porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */
30 u32 porbmsr; /* 0x.0004 - POR Boot Mode Status Register */
31 u32 porimpscr; /* 0x.0008 - POR I/O Impedance Status and
34 u32 pordevsr; /* 0x.000c - POR I/O Device Status Register */
35 u32 pordbgmsr; /* 0x.0010 - POR Debug Mode Status Register */
36 u32 pordevsr2; /* 0x.0014 - POR device status register 2 */
37 u8 res018[0x20 - 0x18];
38 u32 porcir; /* 0x.0020 - POR Configuration Information
41 u8 res024[0x30 - 0x24];
42 u32 gpiocr; /* 0x.0030 - GPIO Control Register */
[all …]

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