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12

/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dpmi8994.dtsi9 reg = <0x2 SPMI_USID>;
11 #size-cells = <0>;
15 reg = <0xc000>;
17 gpio-ranges = <&pmi8994_gpios 0 0 10>;
26 reg = <0x3 SPMI_USID>;
28 #size-cells = <0>;
38 reg = <0xd800 0xd900>;
39 interrupts = <3 0xd8 0x02 IRQ_TYPE_EDGE_RISING>;
43 qcom,enabled-strings = <0 1 2 3>;
Dpm660l.dtsi40 reg = <0x2 SPMI_USID>;
42 #size-cells = <0>;
46 reg = <0x2400>;
47 interrupts = <0x2 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
48 #thermal-sensor-cells = <0>;
53 reg = <0xc000>;
55 gpio-ranges = <&pm660l_gpios 0 0 12>;
64 reg = <0x3 SPMI_USID>;
66 #size-cells = <0>;
70 reg = <0xd800 0xd900>;
[all …]
/Linux-v5.15/drivers/staging/media/atomisp/i2c/
Dmt9m114.h46 #define MISENSOR_FWBURST0 0x80
47 #define MISENSOR_FWBURST1 0x81
48 #define MISENSOR_FWBURST4 0x84
49 #define MISENSOR_FWBURST 0x88
51 #define MISENSOR_TOK_TERM 0xf000 /* terminating token for reg list */
52 #define MISENSOR_TOK_DELAY 0xfe00 /* delay token for reg list */
53 #define MISENSOR_TOK_FWLOAD 0xfd00 /* token indicating load FW */
54 #define MISENSOR_TOK_POLL 0xfc00 /* token indicating poll instruction */
55 #define MISENSOR_TOK_RMW 0x0010 /* RMW operation */
56 #define MISENSOR_TOK_MASK 0xfff0
[all …]
/Linux-v5.15/drivers/firmware/efi/libstub/
Dvsprintf.c25 int i = 0; in skip_atoi()
28 i = i * 10 + *((*s)++) - '0'; in skip_atoi()
33 * put_dec_full4 handles numbers in the range 0 <= r < 10000.
34 * The multiplier 0xccd is round(2^15/10), and the approximation
35 * r/10 == (r * 0xccd) >> 15 is exact for all r < 16389.
42 for (i = 0; i < 3; i++) { in put_dec_full4()
43 unsigned int q = (r * 0xccd) >> 15; in put_dec_full4()
44 *--end = '0' + (r - q * 10); in put_dec_full4()
47 *--end = '0' + r; in put_dec_full4()
54 * The approximation x/10000 == (x * 0x346DC5D7) >> 43
[all …]
Defi-stub-helper.c54 * The position of the most-significant 0 bit gives us the length of in utf8_to_utf32()
57 for (clen = 0; cx & 0x80; ++clen) in utf8_to_utf32()
60 * If the 0 bit is in position 8, this is a valid single-octet in utf8_to_utf32()
61 * encoding. If the 0 bit is in position 7 or positions 1-3, the in utf8_to_utf32()
69 for (i = 0; i < clen; ++i) { in utf8_to_utf32()
71 cx = (*s8)[i] ^ 0x80; in utf8_to_utf32()
72 if (cx & 0xc0) in utf8_to_utf32()
82 if (c32 > 0x10ffff || in utf8_to_utf32()
83 (c32 & 0xf800) == 0xd800 || in utf8_to_utf32()
84 clen != (c32 >= 0x80) + (c32 >= 0x800) + (c32 >= 0x10000)) in utf8_to_utf32()
[all …]
/Linux-v5.15/drivers/staging/media/meson/vdec/
Dhevc_regs.h9 #define HEVC_ASSIST_MMU_MAP_ADDR 0xc024
11 #define HEVC_ASSIST_MBOX1_CLR_REG 0xc1d4
12 #define HEVC_ASSIST_MBOX1_MASK 0xc1d8
14 #define HEVC_ASSIST_SCRATCH_0 0xc300
15 #define HEVC_ASSIST_SCRATCH_1 0xc304
16 #define HEVC_ASSIST_SCRATCH_2 0xc308
17 #define HEVC_ASSIST_SCRATCH_3 0xc30c
18 #define HEVC_ASSIST_SCRATCH_4 0xc310
19 #define HEVC_ASSIST_SCRATCH_5 0xc314
20 #define HEVC_ASSIST_SCRATCH_6 0xc318
[all …]
Dcodec_vp9.c19 #define VP9_HEAD_PARSER_DONE 0xf0
36 #define DECODE_MODE_SINGLE 0
46 #define MV_MEM_UNIT 0x240
47 #define ADAPT_PROB_SIZE 0xf80
50 KEY_FRAME = 0,
56 #define MPRED_MV_BUF_SIZE 0x120000
58 #define IPP_SIZE 0x4000
59 #define SAO_ABV_SIZE 0x30000
60 #define SAO_VB_SIZE 0x30000
61 #define SH_TM_RPS_SIZE 0x800
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Dqcom-pm8941.dtsi8 pm8941_0: pm8941@0 {
10 reg = <0x0 SPMI_USID>;
12 #size-cells = <0>;
16 reg = <0x6000>,
17 <0x6100>;
19 interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
24 reg = <0x800>;
25 interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
32 reg = <0x900>;
33 interrupts = <0x0 0x9 0 IRQ_TYPE_EDGE_BOTH>;
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/leds/backlight/
Dqcom-wled.yaml63 minimum: 0
70 minimum: 0
108 Array of the WLED strings numbered from 0 to 3. Each
145 0 - Modulator A
149 enum: [ 0, 1 ]
150 default: 0
156 0 - CABC disabled
162 enum: [ 0, 1, 2, 3 ]
216 minimum: 0
220 minimum: 0
[all …]
/Linux-v5.15/arch/powerpc/boot/dts/
Dmpc8610_hpcd.dts26 #size-cells = <0>;
28 PowerPC,8610@0 {
30 reg = <0>;
35 sleep = <&pmc 0x00008000 0 // core
36 &pmc 0x00004000 0>; // timebase
37 timebase-frequency = <0>; // From uboot
38 bus-frequency = <0>; // From uboot
39 clock-frequency = <0>; // From uboot
45 reg = <0x00000000 0x20000000>; // 512M at 0x0
52 reg = <0xe0005000 0x1000>;
[all …]
/Linux-v5.15/drivers/edac/
Digen6_edac.c51 #define TOM_OFFSET 0xa0
53 #define TOLUD_OFFSET 0xbc
55 #define CAPID_C_OFFSET 0xec
59 #define CAPID_E_OFFSET 0xf0
63 #define ERRSTS_OFFSET 0xc8
68 #define ERRCMD_OFFSET 0xca
75 #define IBECC_ACTIVATE_EN BIT(0)
86 #define MCHBAR_OFFSET 0x48
87 #define MCHBAR_EN BIT_ULL(0)
89 #define MCHBAR_SIZE 0x10000
[all …]
/Linux-v5.15/drivers/net/wireless/mediatek/mt7601u/
Dinit.c94 mt7601u_wr(dev, MT_USB_DMA_CFG, 0); in mt7601u_reset_csr_bbp()
96 mt7601u_wr(dev, MT_MAC_SYS_CTRL, 0); in mt7601u_reset_csr_bbp()
142 for (i = 0; i < 16; i++) { in mt76_init_beacon_offsets()
148 for (i = 0; i < 4; i++) in mt76_init_beacon_offsets()
167 mt7601u_wr(dev, MT_AUX_CLK_CFG, 0); in mt7601u_write_mac_initvals()
169 return 0; in mt7601u_write_mac_initvals()
181 for (i = 0; i < N_WCIDS; i++) { in mt7601u_init_wcid_mem()
182 vals[i * 2] = 0xffffffff; in mt7601u_init_wcid_mem()
183 vals[i * 2 + 1] = 0x00ffffff; in mt7601u_init_wcid_mem()
210 for (i = 0; i < N_WCIDS * 2; i++) in mt7601u_init_wcid_attr_mem()
[all …]
/Linux-v5.15/drivers/gpu/drm/i915/
Dintel_uncore.c53 mmio_debug->unclaimed_mmio_check = 0; in mmio_debug_suspend()
88 if (id >= 0 && id < FW_DOMAIN_ID_COUNT) in intel_uncore_forcewake_domain_to_str()
109 fw_clear(d, 0xffff); in fw_domain_reset()
137 return __wait_for_ack(d, ack, 0); in wait_ack_clear()
158 ACK_CLEAR = 0,
167 const u32 value = type == ACK_SET ? ack_bit : 0; in fw_domain_wait_ack_with_fallback()
199 DRM_DEBUG_DRIVER("%s had to use fallback to %s ack, 0x%x (passes %u)\n", in fw_domain_wait_ack_with_fallback()
205 return ack_detected ? 0 : -ETIMEDOUT; in fw_domain_wait_ack_with_fallback()
332 * w/a for a sporadic read returning 0 by waiting for the GT in __gen6_gt_wait_for_thread_c0()
336 wait_for_atomic_us(gt_thread_status(uncore) == 0, 5000), in __gen6_gt_wait_for_thread_c0()
[all …]
/Linux-v5.15/drivers/gpu/drm/panel/
Dpanel-orisetech-otm8009a.c25 #define MCS_ADRSFT 0x0000 /* Address Shift Function */
26 #define MCS_PANSET 0xB3A6 /* Panel Type Setting */
27 #define MCS_SD_CTRL 0xC0A2 /* Source Driver Timing Setting */
28 #define MCS_P_DRV_M 0xC0B4 /* Panel Driving Mode */
29 #define MCS_OSC_ADJ 0xC181 /* Oscillator Adjustment for Idle/Normal mode */
30 #define MCS_RGB_VID_SET 0xC1A1 /* RGB Video Mode Setting */
31 #define MCS_SD_PCH_CTRL 0xC480 /* Source Driver Precharge Control */
32 #define MCS_NO_DOC1 0xC48A /* Command not documented */
33 #define MCS_PWR_CTRL1 0xC580 /* Power Control Setting 1 */
34 #define MCS_PWR_CTRL2 0xC590 /* Power Control Setting 2 for Normal Mode */
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Dcikd.h27 #define MC_SEQ_MISC0__MT__MASK 0xf0000000
28 #define MC_SEQ_MISC0__MT__GDDR1 0x10000000
29 #define MC_SEQ_MISC0__MT__DDR2 0x20000000
30 #define MC_SEQ_MISC0__MT__GDDR3 0x30000000
31 #define MC_SEQ_MISC0__MT__GDDR4 0x40000000
32 #define MC_SEQ_MISC0__MT__GDDR5 0x50000000
33 #define MC_SEQ_MISC0__MT__HBM 0x60000000
34 #define MC_SEQ_MISC0__MT__DDR3 0xB0000000
39 #define CRTC0_REGISTER_OFFSET (0x1b7c - 0x1b7c)
40 #define CRTC1_REGISTER_OFFSET (0x1e7c - 0x1b7c)
[all …]
/Linux-v5.15/fs/unicode/
Dmkutf8data.c50 int verbose = 0;
63 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
98 return 0; in age_valid()
100 return 0; in age_valid()
102 return 0; in age_valid()
119 * if offlen == 0 (non-branching node)
124 * if offlen != 0 (branching node)
133 #define BITNUM 0x07
134 #define NEXTBYTE 0x08
135 #define OFFLEN 0x30
[all …]
Dutf8-norm.c23 while (i >= 0 && utf8agetab[i] != 0) { in utf8version_is_supported()
28 return 0; in utf8version_is_supported()
45 * 0x00000000 0x0000007F: 0xxxxxxx
46 * 0x00000000 0x000007FF: 110xxxxx 10xxxxxx
47 * 0x00000000 0x0000FFFF: 1110xxxx 10xxxxxx 10xxxxxx
48 * 0x00000000 0x001FFFFF: 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx
49 * 0x00000000 0x03FFFFFF: 111110xx 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx
50 * 0x00000000 0x7FFFFFFF: 1111110x 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx
57 * 0x00000000 0x0000007F: 0xxxxxxx
58 * 0x00000080 0x000007FF: 110xxxxx 10xxxxxx
[all …]
/Linux-v5.15/drivers/net/ethernet/realtek/
Dr8169_phy_config.c23 int oldpage = phy_select_page(phydev, 0x0007); in r8168d_modify_extpage()
25 __phy_write(phydev, 0x1e, extpage); in r8168d_modify_extpage()
28 phy_restore_page(phydev, oldpage, 0); in r8168d_modify_extpage()
34 int oldpage = phy_select_page(phydev, 0x0005); in r8168d_phy_param()
36 __phy_write(phydev, 0x05, parm); in r8168d_phy_param()
37 __phy_modify(phydev, 0x06, mask, val); in r8168d_phy_param()
39 phy_restore_page(phydev, oldpage, 0); in r8168d_phy_param()
45 int oldpage = phy_select_page(phydev, 0x0a43); in r8168g_phy_param()
47 __phy_write(phydev, 0x13, parm); in r8168g_phy_param()
48 __phy_modify(phydev, 0x14, mask, val); in r8168g_phy_param()
[all …]
/Linux-v5.15/drivers/gpu/drm/radeon/
Dnid.h33 #define CAYMAN_MAX_BACKENDS_MASK 0xFF
34 #define CAYMAN_MAX_BACKENDS_PER_SE_MASK 0xF
36 #define CAYMAN_MAX_SIMDS_MASK 0xFFFF
37 #define CAYMAN_MAX_SIMDS_PER_SE_MASK 0xFFF
39 #define CAYMAN_MAX_PIPES_MASK 0xFF
40 #define CAYMAN_MAX_LDS_NUM 0xFFFF
42 #define CAYMAN_MAX_TCC_MASK 0xFF
44 #define CAYMAN_GB_ADDR_CONFIG_GOLDEN 0x02011003
45 #define ARUBA_GB_ADDR_CONFIG_GOLDEN 0x12010001
47 #define DMIF_ADDR_CONFIG 0xBD4
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_d.h27 #define mmCB_BLEND_RED 0xa105
28 #define mmCB_BLEND_GREEN 0xa106
29 #define mmCB_BLEND_BLUE 0xa107
30 #define mmCB_BLEND_ALPHA 0xa108
31 #define mmCB_COLOR_CONTROL 0xa202
32 #define mmCB_BLEND0_CONTROL 0xa1e0
33 #define mmCB_BLEND1_CONTROL 0xa1e1
34 #define mmCB_BLEND2_CONTROL 0xa1e2
35 #define mmCB_BLEND3_CONTROL 0xa1e3
36 #define mmCB_BLEND4_CONTROL 0xa1e4
[all …]
Dgfx_7_0_d.h27 #define mmCB_BLEND_RED 0xa105
28 #define mmCB_BLEND_GREEN 0xa106
29 #define mmCB_BLEND_BLUE 0xa107
30 #define mmCB_BLEND_ALPHA 0xa108
31 #define mmCB_COLOR_CONTROL 0xa202
32 #define mmCB_BLEND0_CONTROL 0xa1e0
33 #define mmCB_BLEND1_CONTROL 0xa1e1
34 #define mmCB_BLEND2_CONTROL 0xa1e2
35 #define mmCB_BLEND3_CONTROL 0xa1e3
36 #define mmCB_BLEND4_CONTROL 0xa1e4
[all …]
Dgfx_8_0_d.h27 #define mmCB_BLEND_RED 0xa105
28 #define mmCB_BLEND_GREEN 0xa106
29 #define mmCB_BLEND_BLUE 0xa107
30 #define mmCB_BLEND_ALPHA 0xa108
31 #define mmCB_DCC_CONTROL 0xa109
32 #define mmCB_COLOR_CONTROL 0xa202
33 #define mmCB_BLEND0_CONTROL 0xa1e0
34 #define mmCB_BLEND1_CONTROL 0xa1e1
35 #define mmCB_BLEND2_CONTROL 0xa1e2
36 #define mmCB_BLEND3_CONTROL 0xa1e3
[all …]
Dgfx_8_1_d.h27 #define mmCB_BLEND_RED 0xa105
28 #define mmCB_BLEND_GREEN 0xa106
29 #define mmCB_BLEND_BLUE 0xa107
30 #define mmCB_BLEND_ALPHA 0xa108
31 #define mmCB_DCC_CONTROL 0xa109
32 #define mmCB_COLOR_CONTROL 0xa202
33 #define mmCB_BLEND0_CONTROL 0xa1e0
34 #define mmCB_BLEND1_CONTROL 0xa1e1
35 #define mmCB_BLEND2_CONTROL 0xa1e2
36 #define mmCB_BLEND3_CONTROL 0xa1e3
[all …]
/Linux-v5.15/drivers/tty/vt/
Dkeyboard.c63 return 0; in kbd_defleds()
67 #define KBD_DEFLOCK 0
102 .sig = 0,
152 static int shift_state = 0;
195 return d->error == 0; /* stop as soon as we successfully get one */ in getkeycode_helper()
202 .flags = 0, in getkeycode()
204 .keycode = 0, in getkeycode()
222 return d->error == 0; /* stop as soon as we successfully set one */ in setkeycode_helper()
229 .flags = 0, in setkeycode()
257 return 0; in kd_sound_helper()
[all …]
/Linux-v5.15/drivers/gpu/drm/i915/gt/
Dintel_workarounds.c87 unsigned int start = 0, end = wal->count; in _wa_add()
142 GEM_BUG_ON(i915_mmio_reg_offset(wa_[0].reg) == in _wa_add()
145 i915_mmio_reg_offset(wa_[0].reg)) in _wa_add()
148 swap(wa_[1], wa_[0]); in _wa_add()
175 wa_write_clr_set(wal, reg, ~0, set); in wa_write()
187 wa_write_clr_set(wal, reg, clr, 0); in wa_write_clr()
204 wa_add(wal, reg, 0, _MASKED_BIT_ENABLE(val), val, true); in wa_masked_en()
210 wa_add(wal, reg, 0, _MASKED_BIT_DISABLE(val), val, true); in wa_masked_dis()
217 wa_add(wal, reg, 0, _MASKED_FIELD(mask, val), mask, true); in wa_masked_field_set()
305 (IS_BDW_GT3(i915) ? HDC_FENCE_DEST_SLM_DISABLE : 0)); in bdw_ctx_workarounds_init()
[all …]

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