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/Linux-v5.15/drivers/pinctrl/mediatek/
Dpinctrl-mt8516.c19 /* 0E4E8SR 4/8/12/16 */
21 /* 0E2E4SR 2/4/6/8 */
24 MTK_DRV_GRP(2, 16, 0, 2, 2)
28 MTK_PIN_DRV_GRP(0, 0xd00, 0, 0),
29 MTK_PIN_DRV_GRP(1, 0xd00, 0, 0),
30 MTK_PIN_DRV_GRP(2, 0xd00, 0, 0),
31 MTK_PIN_DRV_GRP(3, 0xd00, 0, 0),
32 MTK_PIN_DRV_GRP(4, 0xd00, 0, 0),
34 MTK_PIN_DRV_GRP(5, 0xd00, 4, 0),
35 MTK_PIN_DRV_GRP(6, 0xd00, 4, 0),
[all …]
Dpinctrl-mt8167.c19 /* 0E4E8SR 4/8/12/16 */
21 /* 0E2E4SR 2/4/6/8 */
24 MTK_DRV_GRP(2, 16, 0, 2, 2)
28 MTK_PIN_DRV_GRP(0, 0xd00, 0, 0),
29 MTK_PIN_DRV_GRP(1, 0xd00, 0, 0),
30 MTK_PIN_DRV_GRP(2, 0xd00, 0, 0),
31 MTK_PIN_DRV_GRP(3, 0xd00, 0, 0),
32 MTK_PIN_DRV_GRP(4, 0xd00, 0, 0),
34 MTK_PIN_DRV_GRP(5, 0xd00, 4, 0),
35 MTK_PIN_DRV_GRP(6, 0xd00, 4, 0),
[all …]
/Linux-v5.15/arch/mips/boot/dts/netlogic/
Dxlp_svp.dts17 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
18 1 0 0 0x16000000 0x02000000>; // GBU chipselects
23 reg = <0 0x30100 0xa00>;
33 reg = <0 0x31100 0xa00>;
43 #size-cells = <0>;
44 reg = <0 0x32100 0xa00>;
54 #size-cells = <0>;
55 reg = <0 0x33100 0xa00>;
64 reg = <0x68>;
69 reg = <0x4c>;
[all …]
Dxlp_evp.dts17 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
18 1 0 0 0x16000000 0x02000000>; // GBU chipselects
23 reg = <0 0x30100 0xa00>;
33 reg = <0 0x31100 0xa00>;
43 #size-cells = <0>;
44 reg = <0 0x32100 0xa00>;
54 #size-cells = <0>;
55 reg = <0 0x33100 0xa00>;
64 reg = <0x68>;
69 reg = <0x4c>;
[all …]
Dxlp_fvp.dts17 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
18 1 0 0 0x16000000 0x02000000>; // GBU chipselects
23 reg = <0 0x30100 0xa00>;
33 reg = <0 0x31100 0xa00>;
43 #size-cells = <0>;
44 reg = <0 0x37100 0x20>;
54 #size-cells = <0>;
55 reg = <0 0x37120 0x20>;
64 reg = <0x68>;
69 reg = <0x4c>;
[all …]
Dxlp_rvp.dts17 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
18 1 0 0 0x16000000 0x02000000>; // GBU chipselects
23 reg = <0 0x112100 0xa00>;
32 #address-cells = <0>;
34 reg = <0 0x110000 0x200>;
38 nor_flash@1,0 {
43 reg = <1 0 0x1000000>;
45 partition@0 {
47 reg = <0x0 0x100000>; /* 1M */
53 reg = <0x100000 0x100000>; /* 1M */
[all …]
Dxlp_gvp.dts17 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
18 1 0 0 0x16000000 0x02000000>; // GBU chipselects
23 reg = <0 0x112100 0xa00>;
32 #address-cells = <0>;
34 reg = <0 0x110000 0x200>;
38 nor_flash@1,0 {
43 reg = <1 0 0x1000000>;
45 partition@0 {
47 reg = <0x0 0x100000>; /* 1M */
53 reg = <0x100000 0x100000>; /* 1M */
[all …]
/Linux-v5.15/drivers/pinctrl/samsung/
Dpinctrl-exynos.h20 #define EXYNOS_GPIO_ECON_OFFSET 0x700
21 #define EXYNOS_GPIO_EFLTCON_OFFSET 0x800
22 #define EXYNOS_GPIO_EMASK_OFFSET 0x900
23 #define EXYNOS_GPIO_EPEND_OFFSET 0xA00
24 #define EXYNOS_WKUP_ECON_OFFSET 0xE00
25 #define EXYNOS_WKUP_EMASK_OFFSET 0xF00
26 #define EXYNOS_WKUP_EPEND_OFFSET 0xF40
27 #define EXYNOS7_WKUP_ECON_OFFSET 0x700
28 #define EXYNOS7_WKUP_EMASK_OFFSET 0x900
29 #define EXYNOS7_WKUP_EPEND_OFFSET 0xA00
[all …]
/Linux-v5.15/arch/openrisc/mm/
Dinit.c46 unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0 }; in zone_sizes_init()
108 for (j = 0; p < e && j < PTRS_PER_PTE; in map_ram()
122 printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__, in map_ram()
137 for (i = 0; i < PTRS_PER_PGD; i++) in paging_init()
138 swapper_pg_dir[i] = __pgd(0); in paging_init()
160 unsigned long *dtlb_vector = __va(0x900); in paging_init()
161 unsigned long *itlb_vector = __va(0xa00); in paging_init()
184 mtspr(SPR_ICBIR, 0x900); in paging_init()
185 mtspr(SPR_ICBIR, 0xa00); in paging_init()
205 memset((void *)empty_zero_page, 0, PAGE_SIZE); in mem_init()
/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dpm8350c.dtsi12 reg = <0x2 SPMI_USID>;
14 #size-cells = <0>;
18 reg = <0xa00>;
19 interrupts = <0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
20 #thermal-sensor-cells = <0>;
25 reg = <0x8800>;
27 gpio-ranges = <&pm8350c_gpios 0 0 9>;
38 polling-delay = <0>;
44 hysteresis = <0>;
50 hysteresis = <0>;
Dpmr735a.dtsi12 reg = <0x4 SPMI_USID>;
14 #size-cells = <0>;
18 reg = <0xa00>;
19 interrupts = <0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
20 #thermal-sensor-cells = <0>;
25 reg = <0x8800>;
27 gpio-ranges = <&pmr735a_gpios 0 0 4>;
38 polling-delay = <0>;
44 hysteresis = <0>;
50 hysteresis = <0>;
Dpm7325.dtsi10 reg = <0x1 SPMI_USID>;
12 #size-cells = <0>;
16 reg = <0xa00>;
17 interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
18 #thermal-sensor-cells = <0>;
23 reg = <0x8800>;
25 gpio-ranges = <&pm7325_gpios 0 0 10>;
36 polling-delay = <0>;
42 hysteresis = <0>;
48 hysteresis = <0>;
/Linux-v5.15/include/dt-bindings/clock/
Dlpc18xx-ccu.h13 #define CLK_APB3_BUS 0x100
14 #define CLK_APB3_I2C1 0x108
15 #define CLK_APB3_DAC 0x110
16 #define CLK_APB3_ADC0 0x118
17 #define CLK_APB3_ADC1 0x120
18 #define CLK_APB3_CAN0 0x128
19 #define CLK_APB1_BUS 0x200
20 #define CLK_APB1_MOTOCON_PWM 0x208
21 #define CLK_APB1_I2C0 0x210
22 #define CLK_APB1_I2S 0x218
[all …]
/Linux-v5.15/drivers/staging/r8188eu/include/
DHal8188EPhyReg.h8 /* BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF */
10 /* 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 */
11 /* 3. RF register 0x00-2E */
18 /* 1. Page1(0x100) */
20 #define rPMAC_Reset 0x100
21 #define rPMAC_TxStart 0x104
22 #define rPMAC_TxLegacySIG 0x108
23 #define rPMAC_TxHTSIG1 0x10c
24 #define rPMAC_TxHTSIG2 0x110
25 #define rPMAC_PHYDebug 0x114
[all …]
Drtw_mp_phy_regdef.h37 /* BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF */
39 /* 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 */
40 /* 3. RF register 0x00-2E */
47 /* 1. Page1(0x100) */
49 #define rPMAC_Reset 0x100
50 #define rPMAC_TxStart 0x104
51 #define rPMAC_TxLegacySIG 0x108
52 #define rPMAC_TxHTSIG1 0x10c
53 #define rPMAC_TxHTSIG2 0x110
54 #define rPMAC_PHYDebug 0x114
[all …]
Dodm_RegDefine11N.h8 #define ODM_REG_RF_MODE_11N 0x00
9 #define ODM_REG_RF_0B_11N 0x0B
10 #define ODM_REG_CHNBW_11N 0x18
11 #define ODM_REG_T_METER_11N 0x24
12 #define ODM_REG_RF_25_11N 0x25
13 #define ODM_REG_RF_26_11N 0x26
14 #define ODM_REG_RF_27_11N 0x27
15 #define ODM_REG_RF_2B_11N 0x2B
16 #define ODM_REG_RF_2C_11N 0x2C
17 #define ODM_REG_RXRF_A3_11N 0x3C
[all …]
/Linux-v5.15/drivers/bus/
Domap_l3_noc.h24 #define CUSTOM_ERROR 0x2
25 #define STANDARD_ERROR 0x0
26 #define INBAND_ERROR 0x0
27 #define L3_APPLICATION_ERROR 0x0
28 #define L3_DEBUG_ERROR 0x1
31 #define L3_TARG_STDERRLOG_MAIN 0x48
32 #define L3_TARG_STDERRLOG_HDR 0x4c
33 #define L3_TARG_STDERRLOG_MSTADDR 0x50
34 #define L3_TARG_STDERRLOG_INFO 0x58
35 #define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
[all …]
/Linux-v5.15/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h37 * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
39 * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
40 * 3. RF register 0x00-2E
45 * 1. Page1(0x100)
47 #define rPMAC_Reset 0x100
48 #define rPMAC_TxStart 0x104
49 #define rPMAC_TxLegacySIG 0x108
50 #define rPMAC_TxHTSIG1 0x10c
51 #define rPMAC_TxHTSIG2 0x110
52 #define rPMAC_PHYDebug 0x114
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/powerpc/fsl/
Dpmc.txt61 reg = <0xb00 0x100 0xa00 0x100>;
/Linux-v5.15/Documentation/devicetree/bindings/power/supply/
Dsc27xx-fg.yaml73 ocv-capacity-table-0 = <4185000 100>, <4113000 95>, <4066000 90>,
79 <3680000 10>, <3605000 5>, <3400000 0>;
85 #size-cells = <0>;
89 reg = <0xa00>;
/Linux-v5.15/drivers/net/ethernet/broadcom/
Dbcm4908_enet.h5 #define ENET_CONTROL 0x000
6 #define ENET_MIB_CTRL 0x004
7 #define ENET_MIB_CTRL_CLR_MIB 0x00000001
8 #define ENET_RX_ERR_MASK 0x008
9 #define ENET_MIB_MAX_PKT_SIZE 0x00C
10 #define ENET_MIB_MAX_PKT_SIZE_VAL 0x00003fff
11 #define ENET_DIAG_OUT 0x01c
12 #define ENET_ENABLE_DROP_PKT 0x020
13 #define ENET_IRQ_ENABLE 0x024
14 #define ENET_IRQ_ENABLE_OVFL 0x00000001
[all …]
/Linux-v5.15/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h41 /* BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF */
43 /* 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 */
44 /* 3. RF register 0x00-2E */
52 /* 1. Page1(0x100) */
54 #define rPMAC_Reset 0x100
55 #define rPMAC_TxStart 0x104
56 #define rPMAC_TxLegacySIG 0x108
57 #define rPMAC_TxHTSIG1 0x10c
58 #define rPMAC_TxHTSIG2 0x110
59 #define rPMAC_PHYDebug 0x114
[all …]
/Linux-v5.15/drivers/staging/rtl8192u/
Dr819xU_phyreg.h5 #define RF_DATA 0x1d4 /* FW will write RF data in the register.*/
8 #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */
9 #define rFPGA0_TxGainStage 0x80c
10 #define rFPGA0_XA_HSSIParameter1 0x820
11 #define rFPGA0_XA_HSSIParameter2 0x824
12 #define rFPGA0_XB_HSSIParameter1 0x828
13 #define rFPGA0_XB_HSSIParameter2 0x82c
14 #define rFPGA0_XC_HSSIParameter1 0x830
15 #define rFPGA0_XC_HSSIParameter2 0x834
16 #define rFPGA0_XD_HSSIParameter1 0x838
[all …]
/Linux-v5.15/arch/powerpc/include/asm/
Dkvm_asm.h27 #define BOOKE_INTERRUPT_CRITICAL 0
69 #define BOOK3S_INTERRUPT_SYSTEM_RESET 0x100
70 #define BOOK3S_INTERRUPT_MACHINE_CHECK 0x200
71 #define BOOK3S_INTERRUPT_DATA_STORAGE 0x300
72 #define BOOK3S_INTERRUPT_DATA_SEGMENT 0x380
73 #define BOOK3S_INTERRUPT_INST_STORAGE 0x400
74 #define BOOK3S_INTERRUPT_INST_SEGMENT 0x480
75 #define BOOK3S_INTERRUPT_EXTERNAL 0x500
76 #define BOOK3S_INTERRUPT_EXTERNAL_HV 0x502
77 #define BOOK3S_INTERRUPT_ALIGNMENT 0x600
[all …]
/Linux-v5.15/arch/arm/mach-s3c/
Dregs-syscon-power-s3c64xx.h14 #define S3C64XX_PWR_CFG S3C_SYSREG(0x804)
28 #define S3C64XX_PWRCFG_CFG_WFI_MASK (0x3 << 5)
30 #define S3C64XX_PWRCFG_CFG_WFI_IGNORE (0x0 << 5)
31 #define S3C64XX_PWRCFG_CFG_WFI_IDLE (0x1 << 5)
32 #define S3C64XX_PWRCFG_CFG_WFI_STOP (0x2 << 5)
33 #define S3C64XX_PWRCFG_CFG_WFI_SLEEP (0x3 << 5)
35 #define S3C64XX_PWRCFG_CFG_BATFLT_MASK (0x3 << 3)
37 #define S3C64XX_PWRCFG_CFG_BATFLT_IGNORE (0x0 << 3)
38 #define S3C64XX_PWRCFG_CFG_BATFLT_IRQ (0x1 << 3)
39 #define S3C64XX_PWRCFG_CFG_BATFLT_SLEEP (0x3 << 3)
[all …]

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