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/Linux-v5.10/drivers/clk/qcom/
Dvideocc-sm8150.c31 { 249600000, 2000000000, 0 },
35 .l = 0x14,
36 .alpha = 0xD555,
37 .config_ctl_val = 0x20485699,
38 .config_ctl_hi_val = 0x00002267,
39 .config_ctl_hi1_val = 0x00000024,
40 .user_ctl_val = 0x00000000,
41 .user_ctl_hi_val = 0x00000805,
42 .user_ctl_hi1_val = 0x000000D0,
46 .offset = 0x42c,
[all …]
Dvideocc-sdm845.c30 { P_BI_TCXO, 0 },
46 .l = 0x10,
47 .alpha = 0xaaab,
51 .offset = 0x42c,
64 F(100000000, P_VIDEO_PLL0_OUT_MAIN, 4, 0, 0),
65 F(200000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
66 F(330000000, P_VIDEO_PLL0_OUT_MAIN, 1, 0, 0),
67 F(404000000, P_VIDEO_PLL0_OUT_MAIN, 1, 0, 0),
68 F(444000000, P_VIDEO_PLL0_OUT_MAIN, 1, 0, 0),
69 F(533000000, P_VIDEO_PLL0_OUT_MAIN, 1, 0, 0),
[all …]
Dvideocc-sc7180.c30 { 249600000, 2000000000, 0 },
34 .offset = 0x42c,
51 { P_BI_TCXO, 0 },
61 F(19200000, P_BI_TCXO, 1, 0, 0),
62 F(150000000, P_VIDEO_PLL0_OUT_MAIN, 4, 0, 0),
63 F(270000000, P_VIDEO_PLL0_OUT_MAIN, 2.5, 0, 0),
64 F(340000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
65 F(434000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
66 F(500000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
71 .cmd_rcgr = 0x7f0,
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/arm/hisilicon/controller/
Dhi3798cv200-perictrl.yaml48 reg = <0x8a20000 0x1000>;
51 ranges = <0x0 0x8a20000 0x1000>;
55 reg = <0x850 0x8>;
58 resets = <&crg 0x188 4>;
/Linux-v5.10/Documentation/devicetree/bindings/phy/
Dphy-hi3798cv200-combphy.txt37 reg = <0x8a20000 0x1000>;
40 ranges = <0x0 0x8a20000 0x1000>;
44 reg = <0x850 0x8>;
47 resets = <&crg 0x188 4>;
53 reg = <0x858 0x8>;
56 resets = <&crg 0x188 12>;
57 hisilicon,mode-select-bits = <0x0008 11 (0x3 << 11)>;
/Linux-v5.10/include/dt-bindings/pinctrl/
Dam33xx.h18 #define SLEWCTRL_FAST 0
30 #define PIN_OUTPUT_PULLDOWN 0
43 #define AM335X_PIN_OFFSET_MIN 0x0800U
45 #define AM335X_PIN_GPMC_AD0 0x800
46 #define AM335X_PIN_GPMC_AD1 0x804
47 #define AM335X_PIN_GPMC_AD2 0x808
48 #define AM335X_PIN_GPMC_AD3 0x80c
49 #define AM335X_PIN_GPMC_AD4 0x810
50 #define AM335X_PIN_GPMC_AD5 0x814
51 #define AM335X_PIN_GPMC_AD6 0x818
[all …]
/Linux-v5.10/arch/arm/boot/dts/
Ddra76x-mmc-iodelay.dtsi32 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
33 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
34 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
35 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
36 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
37 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
43 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */
44 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */
45 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */
46 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat1.dat1 */
[all …]
Ddra74x-mmc-iodelay.dtsi43 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
44 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
45 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
46 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
47 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
48 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
54 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
55 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
56 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
57 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
[all …]
Dkeystone-k2hk.dtsi16 #size-cells = <0>;
20 cpu@0 {
23 reg = <0>;
62 reg = <0x0c000000 0x600000>;
63 ranges = <0x0 0x0c000000 0x600000>;
68 reg = <0x5f0000 0x8000>;
78 0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
79 0xa40 8 0xa40 8 0x840 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 1: dsp1 */
80 0xa44 8 0xa44 8 0x844 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 2: dsp2 */
81 0xa48 8 0xa48 8 0x848 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 3: dsp3 */
[all …]
Dam437x-sk-evm.dts31 #clock-cells = <0>;
38 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
39 brightness-levels = <0 51 53 56 62 75 101 152 255>;
73 pinctrl-0 = <&matrix_keypad_pins>;
85 MATRIX_KEY(0, 0, KEY_DOWN)
86 MATRIX_KEY(0, 1, KEY_RIGHT)
87 MATRIX_KEY(1, 0, KEY_LEFT)
96 pinctrl-0 = <&leds_pins>;
100 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
131 pinctrl-0 = <&lcd_pins>;
[all …]
Dam437x-cm-t43.dts39 pinctrl-0 = <&cm_t43_led_pins>;
43 AM4372_IOPAD(0xa78, MUX_MODE7)
49 AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
50 AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
56 AM4372_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad8.mmc1_dat0 */
57 AM4372_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad9.mmc1_dat1 */
58 AM4372_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad10.mmc1_dat2 */
59 AM4372_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad11.mmc1_dat3 */
60 AM4372_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad12.mmc1_dat4 */
61 AM4372_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_ad13.mmc1_dat5 */
[all …]
Dkeystone-k2l.dtsi16 #size-cells = <0>;
20 cpu@0 {
23 reg = <0>;
49 reg = <0x02348400 0x100>;
59 reg = <0x02348800 0x100>;
66 reg = <0x02348000 0x100>;
110 reg = <0x02620690 0xc>;
112 #size-cells = <0>;
116 pinctrl-single,function-mask = <0x1>;
122 0x0 0x0 0xc0
[all …]
Dam335x-pocketbeagle.dts22 pinctrl-0 = <&usr_leds_pins>;
121 "[USR LED 0]",
210 pinctrl-0 = < &P2_03_gpio &P1_34_gpio &P2_19_gpio &P2_24_gpio
215 /* P2_03 (ZCZ ball T10) gpio0_23 0x824 PIN 9 */
220 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
221 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
224 /* P1_34 (ZCZ ball T11) gpio0_26 0x828 PIN 10 */
229 pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>;
230 pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>;
233 /* P2_19 (ZCZ ball U12) gpio0_27 0x82c PIN 11 */
[all …]
/Linux-v5.10/drivers/net/wireless/realtek/rtw88/
Drtw8822b.h13 u8 res4[4]; /* 0xd0 */
15 u8 res5[0x1e];
17 u8 serial[0x0b]; /* 0xf5 */
18 u8 vid; /* 0x100 */
22 u8 mac_addr[ETH_ALEN]; /* 0x107 */
24 u8 vendor_name[0x07];
26 u8 device_name[0x14];
27 u8 res11[0xcf];
28 u8 package_type; /* 0x1fb */
29 u8 res12[0x4];
[all …]
Drtw8821c.h13 u8 mac_addr[ETH_ALEN]; /* 0xd0 */
21 u8 ltr_cap; /* 0xe3 */
26 u8 res0:2; /* 0xf4 */
50 u8 res0[0x0e];
55 u8 channel_plan; /* 0xb8 */
59 u8 pa_type; /* 0xbc */
60 u8 lna_type_2g[2]; /* 0xbd */
70 u8 rf_antenna_option; /* 0xc9 */
82 /* 0xC00-0xCFF and 0xE00-0xEFF have the same layout */ in _rtw_write32s_mask()
84 rtw_write32_mask(rtwdev, addr + 0x200, mask, data); in _rtw_write32s_mask()
[all …]
/Linux-v5.10/drivers/gpu/drm/sun4i/
Dsun4i_backend.h20 #define SUN4I_BACKEND_MODCTL_REG 0x800
24 #define SUN4I_BACKEND_MODCTL_OUT_LCD0 (0 << 20)
34 #define SUN4I_BACKEND_MODCTL_DEBE_EN BIT(0)
36 #define SUN4I_BACKEND_BACKCOLOR_REG 0x804
39 #define SUN4I_BACKEND_DISSIZE_REG 0x808
40 #define SUN4I_BACKEND_DISSIZE(w, h) (((((h) - 1) & 0xffff) << 16) | \
41 (((w) - 1) & 0xffff))
43 #define SUN4I_BACKEND_LAYSIZE_REG(l) (0x810 + (0x4 * (l)))
44 #define SUN4I_BACKEND_LAYSIZE(w, h) (((((h) - 1) & 0x1fff) << 16) | \
45 (((w) - 1) & 0x1fff))
[all …]
/Linux-v5.10/drivers/infiniband/hw/hns/
Dhns_roce_common.h51 } while (0)
69 #define ROCEE_DMAE_USER_CFG1_ROCEE_STREAM_ID_TB_CFG_S 0
77 #define ROCEE_DMAE_USER_CFG2_ROCEE_STREAM_ID_PKT_CFG_S 0
85 #define ROCEE_DB_SQ_WL_ROCEE_DB_SQ_WL_S 0
93 #define ROCEE_DB_OTHERS_WL_ROCEE_DB_OTH_WL_S 0
101 #define ROCEE_RAQ_WL_ROCEE_RAQ_WL_S 0
105 #define ROCEE_WRMS_POL_TIME_INTERVAL_WRMS_POL_TIME_INTERVAL_S 0
119 #define ROCEE_EXT_DB_SQ_H_EXT_DB_SQ_SHIFT_S 0
127 #define ROCEE_EXT_DB_OTH_H_EXT_DB_OTH_SHIFT_S 0
135 #define ROCEE_EXT_RAQ_H_EXT_RAQ_SHIFT_S 0
[all …]
/Linux-v5.10/drivers/mmc/host/
Drenesas_sdhi_internal_dmac.c25 #define DM_CM_DTRAN_MODE 0x820
26 #define DM_CM_DTRAN_CTRL 0x828
27 #define DM_CM_RST 0x830
28 #define DM_CM_INFO1 0x840
29 #define DM_CM_INFO1_MASK 0x848
30 #define DM_CM_INFO2 0x850
31 #define DM_CM_INFO2_MASK 0x858
32 #define DM_DTRAN_ADDR 0x880
35 #define DTRAN_MODE_CH_NUM_CH0 0 /* "downstream" = for write commands */
38 #define DTRAN_MODE_ADDR_MODE BIT(0) /* 1 = Increment address, 0 = Fixed */
[all …]
/Linux-v5.10/drivers/media/pci/cx18/
Dcx18-av-core.h32 CX18_AV_SVIDEO_LUMA1 = 0x10,
33 CX18_AV_SVIDEO_LUMA2 = 0x20,
34 CX18_AV_SVIDEO_LUMA3 = 0x30,
35 CX18_AV_SVIDEO_LUMA4 = 0x40,
36 CX18_AV_SVIDEO_LUMA5 = 0x50,
37 CX18_AV_SVIDEO_LUMA6 = 0x60,
38 CX18_AV_SVIDEO_LUMA7 = 0x70,
39 CX18_AV_SVIDEO_LUMA8 = 0x80,
40 CX18_AV_SVIDEO_CHROMA4 = 0x400,
41 CX18_AV_SVIDEO_CHROMA5 = 0x500,
[all …]
/Linux-v5.10/arch/mips/include/asm/
Dgt64120.h21 #define GT_CPU_OFS 0x000
23 #define GT_MULTI_OFS 0x120
26 #define GT_SCS10LD_OFS 0x008
27 #define GT_SCS10HD_OFS 0x010
28 #define GT_SCS32LD_OFS 0x018
29 #define GT_SCS32HD_OFS 0x020
30 #define GT_CS20LD_OFS 0x028
31 #define GT_CS20HD_OFS 0x030
32 #define GT_CS3BOOTLD_OFS 0x038
33 #define GT_CS3BOOTHD_OFS 0x040
[all …]
/Linux-v5.10/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_hwimg.c9 u32 Rtl8192PciEPHY_REGArray[PHY_REGArrayLengthPciE] = {0x0,};
12 0x800, 0x00000000,
13 0x804, 0x00000001,
14 0x808, 0x0000fc00,
15 0x80c, 0x0000001c,
16 0x810, 0x801010aa,
17 0x814, 0x008514d0,
18 0x818, 0x00000040,
19 0x81c, 0x00000000,
20 0x820, 0x00000004,
[all …]
/Linux-v5.10/drivers/staging/rtl8192u/
Dr819xU_firmware_img.c7 0x0, };
10 0x800, 0x00000000,
11 0x804, 0x00000001,
12 0x808, 0x0000fc00,
13 0x80c, 0x0000001c,
14 0x810, 0x801010aa,
15 0x814, 0x008514d0,
16 0x818, 0x00000040,
17 0x81c, 0x00000000,
18 0x820, 0x00000004,
[all …]
/Linux-v5.10/drivers/fpga/
Dsocfpga.c18 #define SOCFPGA_FPGMGR_STAT_OFST 0x0
19 #define SOCFPGA_FPGMGR_CTL_OFST 0x4
20 #define SOCFPGA_FPGMGR_DCLKCNT_OFST 0x8
21 #define SOCFPGA_FPGMGR_DCLKSTAT_OFST 0xc
22 #define SOCFPGA_FPGMGR_GPIO_INTEN_OFST 0x830
23 #define SOCFPGA_FPGMGR_GPIO_INTMSK_OFST 0x834
24 #define SOCFPGA_FPGMGR_GPIO_INTTYPE_LEVEL_OFST 0x838
25 #define SOCFPGA_FPGMGR_GPIO_INT_POL_OFST 0x83c
26 #define SOCFPGA_FPGMGR_GPIO_INTSTAT_OFST 0x840
27 #define SOCFPGA_FPGMGR_GPIO_RAW_INTSTAT_OFST 0x844
[all …]
/Linux-v5.10/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/
Dtable.c7 0x024, 0x0011800f,
8 0x028, 0x00ffdb83,
9 0x800, 0x80040002,
10 0x804, 0x00000003,
11 0x808, 0x0000fc00,
12 0x80c, 0x0000000a,
13 0x810, 0x10005388,
14 0x814, 0x020c3d10,
15 0x818, 0x02200385,
16 0x81c, 0x00000000,
[all …]
/Linux-v5.10/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/
Dtable.c7 0x024, 0x0011800f,
8 0x028, 0x00ffdb83,
9 0x800, 0x80040002,
10 0x804, 0x00000003,
11 0x808, 0x0000fc00,
12 0x80c, 0x0000000a,
13 0x810, 0x10000330,
14 0x814, 0x020c3d10,
15 0x818, 0x02200385,
16 0x81c, 0x00000000,
[all …]

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