Searched +full:0 +full:x7f005000 (Results 1 – 5 of 5) sorted by relevance
43 reg = <0x7e00f000 0x1000>;53 #clock-cells = <0>;60 #clock-cells = <0>;69 reg = <0x7f005000 0x100>;
22 #define S3C64XX_PA_XM0CSN0 (0x10000000)23 #define S3C64XX_PA_XM0CSN1 (0x18000000)24 #define S3C64XX_PA_XM0CSN2 (0x20000000)25 #define S3C64XX_PA_XM0CSN3 (0x28000000)26 #define S3C64XX_PA_XM0CSN4 (0x30000000)27 #define S3C64XX_PA_XM0CSN5 (0x38000000)30 #define S3C64XX_PA_HSMMC(x) (0x7C200000 + ((x) * 0x100000))31 #define S3C64XX_PA_HSMMC0 S3C64XX_PA_HSMMC(0)35 #define S3C_PA_UART (0x7F005000)36 #define S3C_PA_UART0 (S3C_PA_UART + 0x00)[all …]
50 description: N = 0 is allowed for SoCs without internal baud clock mux.54 - pattern: '^clk_uart_baud[0-3]$'55 - pattern: '^clk_uart_baud[0-3]$'56 - pattern: '^clk_uart_baud[0-3]$'57 - pattern: '^clk_uart_baud[0-3]$'110 - pattern: '^clk_uart_baud[0-1]$'111 - pattern: '^clk_uart_baud[0-1]$'137 reg = <0x7f005000 0x100>;
33 #size-cells = <0>;35 cpu@0 {38 reg = <0x0>;51 reg = <0x71200000 0x1000>;58 reg = <0x71300000 0x1000>;64 reg = <0x7c200000 0x100>;67 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";75 reg = <0x7c300000 0x100>;78 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";86 reg = <0x7c400000 0x100>;[all …]
149 0x80000000 | 0xf0000000 | UART0150 0x80004000 | 0xf0004000 | UART1151 0x80008000 | 0xf0008000 | UART2152 0x8000c000 | 0xf000c000 | UART3153 0x80010000 | 0xf0010000 | UART4154 0x80014000 | 0xf0014000 | UART5155 0x80018000 | 0xf0018000 | UART6156 0x8001c000 | 0xf001c000 | UART7157 0x80020000 | 0xf0020000 | UART8158 0x80024000 | 0xf0024000 | UART9[all …]
