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/Linux-v6.1/drivers/clk/qcom/
Dgcc-sm8450.c39 .offset = 0x0,
42 .enable_reg = 0x62018,
43 .enable_mask = BIT(0),
56 { 0x1, 2 },
61 .offset = 0x0,
78 .offset = 0x4000,
81 .enable_reg = 0x62018,
95 .offset = 0x9000,
98 .enable_reg = 0x62018,
112 { P_BI_TCXO, 0 },
[all …]
Dgcc-msm8916.c46 .l_reg = 0x21004,
47 .m_reg = 0x21008,
48 .n_reg = 0x2100c,
49 .config_reg = 0x21010,
50 .mode_reg = 0x21000,
51 .status_reg = 0x2101c,
64 .enable_reg = 0x45000,
65 .enable_mask = BIT(0),
77 .l_reg = 0x20004,
78 .m_reg = 0x20008,
[all …]
Dgcc-msm8939.c54 .l_reg = 0x21004,
55 .m_reg = 0x21008,
56 .n_reg = 0x2100c,
57 .config_reg = 0x21010,
58 .mode_reg = 0x21000,
59 .status_reg = 0x2101c,
72 .enable_reg = 0x45000,
73 .enable_mask = BIT(0),
85 .l_reg = 0x20004,
86 .m_reg = 0x20008,
[all …]
/Linux-v6.1/arch/arm/mach-omap2/
Domap44xx.h17 #define L4_44XX_BASE 0x4a000000
18 #define L4_WK_44XX_BASE 0x4a300000
19 #define L4_PER_44XX_BASE 0x48000000
20 #define L4_EMU_44XX_BASE 0x54000000
21 #define L3_44XX_BASE 0x44000000
22 #define OMAP44XX_EMIF1_BASE 0x4c000000
23 #define OMAP44XX_EMIF2_BASE 0x4d000000
24 #define OMAP44XX_DMM_BASE 0x4e000000
25 #define OMAP4430_32KSYNCT_BASE 0x4a304000
26 #define OMAP4430_CM1_BASE 0x4a004000
[all …]
Domap34xx.h17 #define L4_34XX_BASE 0x48000000
18 #define L4_WK_34XX_BASE 0x48300000
19 #define L4_PER_34XX_BASE 0x49000000
20 #define L4_EMU_34XX_BASE 0x54000000
21 #define L3_34XX_BASE 0x68000000
23 #define L4_WK_AM33XX_BASE 0x44C00000
25 #define OMAP3430_32KSYNCT_BASE 0x48320000
26 #define OMAP3430_CM_BASE 0x48004800
27 #define OMAP3430_PRM_BASE 0x48306800
28 #define OMAP343X_SMS_BASE 0x6C000000
[all …]
/Linux-v6.1/arch/arm64/boot/dts/broadcom/bcmbca/
Dbcm6858.dtsi18 #size-cells = <0>;
20 B53_0: cpu@0 {
23 reg = <0x0 0x0>;
31 reg = <0x0 0x1>;
39 reg = <0x0 0x2>;
47 reg = <0x0 0x3>;
77 #clock-cells = <0>;
91 ranges = <0x0 0x0 0x81000000 0x8000>;
97 reg = <0x1000 0x1000>, /* GICD */
98 <0x2000 0x2000>, /* GICC */
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/interconnect/
Dqcom,rpm.yaml224 reg = <0x00400000 0x62000>;
233 reg = <0x00500000 0x11000>;
242 reg = <0x00580000 0x14000>;
/Linux-v6.1/drivers/gpu/drm/i915/display/
Dintel_audio_regs.h11 #define G4X_AUD_VID_DID _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x62020)
12 #define INTEL_AUDIO_DEVCL 0x808629FB
13 #define INTEL_AUDIO_DEVBLC 0x80862801
14 #define INTEL_AUDIO_DEVCTG 0x80862802
16 #define G4X_AUD_CNTL_ST _MMIO(0x620B4)
19 #define G4X_ELD_ADDR_MASK (0xf << 5)
21 #define G4X_HDMIW_HDMIEDID _MMIO(0x6210C)
23 #define _IBX_HDMIW_HDMIEDID_A 0xE2050
24 #define _IBX_HDMIW_HDMIEDID_B 0xE2150
27 #define _IBX_AUD_CNTL_ST_A 0xE20B4
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dam4372.dtsi20 memory@0 {
22 reg = <0 0>;
42 #size-cells = <0>;
43 cpu: cpu@0 {
47 reg = <0>;
76 opp-supported-hw = <0xFF 0x01>;
83 opp-supported-hw = <0xFF 0x04>;
89 opp-supported-hw = <0xFF 0x08>;
95 opp-supported-hw = <0xFF 0x10>;
101 opp-supported-hw = <0xFF 0x20>;
[all …]
Domap5-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl OMAP5_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
13 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
14 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
15 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
16 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
[all …]
Domap4-l4.dtsi2 &l4_cfg { /* 0x4a000000 */
5 clocks = <&l4_cfg_clkctrl OMAP4_L4_CFG_CLKCTRL 0>;
7 reg = <0x4a000000 0x800>,
8 <0x4a000800 0x800>,
9 <0x4a001000 0x1000>;
13 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
14 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
15 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
16 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
17 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
[all …]
Ddra7-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl DRA7_L4CFG_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a000000 0x100000>, /* segment 0 */
13 <0x00100000 0x4a100000 0x100000>, /* segment 1 */
14 <0x00200000 0x4a200000 0x100000>; /* segment 2 */
16 segment@0 { /* 0x4a000000 */
20 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
[all …]
/Linux-v6.1/drivers/interconnect/qcom/
Dmsm8916.c156 .qos.areq_prio = 0,
157 .qos.prio_level = 0,
158 .qos.qos_port = 0,
219 .qos.areq_prio = 0,
220 .qos.prio_level = 0,
239 .qos.areq_prio = 0,
240 .qos.prio_level = 0,
259 .qos.areq_prio = 0,
260 .qos.prio_level = 0,
443 .qos.areq_prio = 0,
[all …]
Dmsm8939.c159 .qos.areq_prio = 0,
160 .qos.prio_level = 0,
161 .qos.qos_port = 0,
222 .qos.areq_prio = 0,
223 .qos.prio_level = 0,
242 .qos.areq_prio = 0,
243 .qos.prio_level = 0,
262 .qos.areq_prio = 0,
263 .qos.prio_level = 0,
282 .qos.areq_prio = 0,
[all …]
Dmsm8996.c50 .qos.qos_port = 0,
111 .qos.qos_port = 0,
124 .qos.areq_prio = 0,
125 .qos.prio_level = 0,
158 .qos.areq_prio = 0,
159 .qos.prio_level = 0,
190 .mas_rpm_id = 0,
194 .qos.areq_prio = 0,
195 .qos.prio_level = 0,
196 .qos.qos_port = 0,
[all …]
/Linux-v6.1/drivers/gpu/drm/gma500/
Dpsb_intel_reg.h11 #define GPIOA 0x5010
12 #define GPIOB 0x5014
13 #define GPIOC 0x5018
14 #define GPIOD 0x501c
15 #define GPIOE 0x5020
16 #define GPIOF 0x5024
17 #define GPIOG 0x5028
18 #define GPIOH 0x502c
19 # define GPIO_CLOCK_DIR_MASK (1 << 0)
20 # define GPIO_CLOCK_DIR_IN (0 << 1)
[all …]
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dmsm8916.dtsi31 reg = <0 0x80000000 0 0>;
40 reg = <0x0 0x86000000 0x0 0x300000>;
46 reg = <0x0 0x86300000 0x0 0x100000>;
54 reg = <0x0 0x86400000 0x0 0x100000>;
59 reg = <0x0 0x86500000 0x0 0x180000>;
64 reg = <0x0 0x86680000 0x0 0x80000>;
70 reg = <0x0 0x86700000 0x0 0xe0000>;
77 reg = <0x0 0x867e0000 0x0 0x20000>;
82 reg = <0x0 0x86800000 0x0 0x2b00000>;
87 reg = <0x0 0x89300000 0x0 0x600000>;
[all …]
/Linux-v6.1/drivers/gpu/drm/i915/
Di915_reg.h105 * #define _FOO_A 0xf000
106 * #define _FOO_B 0xf001
110 * #define FOO_MODE_BAR REG_FIELD_PREP(FOO_MODE_MASK, 0)
114 * #define BAR _MMIO(0xb000)
115 * #define GEN8_BAR _MMIO(0xb888)
122 * numbers, pick the 0-based __index'th value.
129 * Given the arbitrary numbers in varargs, pick the 0-based __index'th number.
177 BUILD_BUG_ON_MSG(((mask) & 0xffff0000), "Incorrect mask"); \
179 BUILD_BUG_ON_MSG((value) & 0xffff0000, "Incorrect value"); \
185 #define _MASKED_BIT_DISABLE(a) (_MASKED_FIELD((a), 0))
[all …]