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/Linux-v5.10/Documentation/misc-devices/
Deeprom.rst11 Addresses scanned: I2C 0x50 - 0x57
28 24C01 1K 0x50 (shadows at 0x51 - 0x57)
29 24C01A 1K 0x50 - 0x57 (Typical device on DIMMs)
30 24C02 2K 0x50 - 0x57
31 24C04 4K 0x50, 0x52, 0x54, 0x56
32 (additional data at 0x51, 0x53, 0x55, 0x57)
33 24C08 8K 0x50, 0x54 (additional data at 0x51, 0x52,
34 0x53, 0x55, 0x56, 0x57)
35 24C16 16K 0x50 (additional data at 0x51 - 0x57)
36 Sony 2K 0x57
[all …]
Dmax6875.rst51 Valid addresses for the MAX6875 are 0x50 and 0x52.
53 Valid addresses for the MAX6874 are 0x50, 0x52, 0x54 and 0x56.
61 $ echo max6875 0x50 > /sys/bus/i2c/devices/i2c-0/new_device
63 The MAX6874/MAX6875 ignores address bit 0, so this driver attaches to multiple
64 addresses. For example, for address 0x50, it also reserves 0x51.
75 The configuration registers are at addresses 0x00 - 0x45.
84 To write a 1 to register 0x45::
86 i2c_smbus_write_byte_data(fd, 0x45, 1);
88 To read register 0x45::
90 value = i2c_smbus_read_byte_data(fd, 0x45);
[all …]
/Linux-v5.10/drivers/media/dvb-frontends/
Dmb86a20s.c18 MB86A20S_13SEG = 0,
25 0xb0, 0xc0, 0xd0, 0xe0,
26 0xf0, 0x00, 0x10, 0x20,
59 { 0x70, 0x0f },
60 { 0x70, 0xff },
61 { 0x08, 0x01 },
62 { 0x50, 0xd1 }, { 0x51, 0x20 },
66 { 0x50, 0xd1 }, { 0x51, 0x22 },
67 { 0x39, 0x01 },
68 { 0x71, 0x00 },
[all …]
/Linux-v5.10/drivers/media/tuners/
Dfc2580_priv.h23 {0x00, 0x00},
24 {0x12, 0x86},
25 {0x14, 0x5c},
26 {0x16, 0x3c},
27 {0x1f, 0xd2},
28 {0x09, 0xd7},
29 {0x0b, 0xd5},
30 {0x0c, 0x32},
31 {0x0e, 0x43},
32 {0x21, 0x0a},
[all …]
/Linux-v5.10/Documentation/firmware-guide/acpi/
Di2c-muxes.rst13 | SMB1 |-->| MUX0 |--CH00--> i2c client A (0x50)
14 | | | 0x70 |--CH01--> i2c client B (0x50)
26 I2cSerialBus (0x70, ControllerInitiated, I2C_SPEED,
27 AddressingMode7Bit, "^SMB1", 0x00,
33 Name (_ADR, 0)
39 I2cSerialBus (0x50, ControllerInitiated, I2C_SPEED,
40 AddressingMode7Bit, "^CH00", 0x00,
54 I2cSerialBus (0x50, ControllerInitiated, I2C_SPEED,
55 AddressingMode7Bit, "^CH01", 0x00,
/Linux-v5.10/include/dt-bindings/clock/
Ddra7.h8 #define DRA7_CLKCTRL_OFFSET 0x20
14 #define DRA7_MPU_CLKCTRL DRA7_CLKCTRL_INDEX(0x20)
17 #define _DRA7_IPU_CLKCTRL_OFFSET 0x40
19 #define DRA7_MCASP1_CLKCTRL _DRA7_IPU_CLKCTRL_INDEX(0x50)
20 #define DRA7_TIMER5_CLKCTRL _DRA7_IPU_CLKCTRL_INDEX(0x58)
21 #define DRA7_TIMER6_CLKCTRL _DRA7_IPU_CLKCTRL_INDEX(0x60)
22 #define DRA7_TIMER7_CLKCTRL _DRA7_IPU_CLKCTRL_INDEX(0x68)
23 #define DRA7_TIMER8_CLKCTRL _DRA7_IPU_CLKCTRL_INDEX(0x70)
24 #define DRA7_I2C5_CLKCTRL _DRA7_IPU_CLKCTRL_INDEX(0x78)
25 #define DRA7_UART6_CLKCTRL _DRA7_IPU_CLKCTRL_INDEX(0x80)
[all …]
/Linux-v5.10/drivers/pinctrl/mediatek/
Dpinctrl-mt8135.c18 #define DRV_BASE1 0x500
19 #define DRV_BASE2 0x510
20 #define PUPD_BASE1 0x400
21 #define PUPD_BASE2 0x450
22 #define R0_BASE1 0x4d0
23 #define R1_BASE1 0x200
24 #define R1_BASE2 0x250
50 MTK_DRV_GRP(2, 16, 0, 2, 2),
54 MTK_DRV_GRP(2, 8, 0, 1, 2),
56 MTK_DRV_GRP(4, 32, 0, 2, 4)
[all …]
Dpinctrl-mt8173.c19 #define DRV_BASE 0xb00
22 MTK_PIN_PUPD_SPEC_SR(119, 0xe00, 2, 1, 0), /* KROW0 */
23 MTK_PIN_PUPD_SPEC_SR(120, 0xe00, 6, 5, 4), /* KROW1 */
24 MTK_PIN_PUPD_SPEC_SR(121, 0xe00, 10, 9, 8), /* KROW2 */
25 MTK_PIN_PUPD_SPEC_SR(122, 0xe10, 2, 1, 0), /* KCOL0 */
26 MTK_PIN_PUPD_SPEC_SR(123, 0xe10, 6, 5, 4), /* KCOL1 */
27 MTK_PIN_PUPD_SPEC_SR(124, 0xe10, 10, 9, 8), /* KCOL2 */
29 MTK_PIN_PUPD_SPEC_SR(67, 0xd10, 2, 1, 0), /* ms0 DS */
30 MTK_PIN_PUPD_SPEC_SR(68, 0xd00, 2, 1, 0), /* ms0 RST */
31 MTK_PIN_PUPD_SPEC_SR(66, 0xc10, 2, 1, 0), /* ms0 cmd */
[all …]
/Linux-v5.10/arch/mips/include/asm/mach-loongson2ef/cs5536/
Dcs5536_pci.h33 #define PCI_BUS_CS5536 0
49 #define CS5536_VENDOR_ID 0x1022
52 #define CS5536_ISA_DEVICE_ID 0x2090
53 #define CS5536_IDE_DEVICE_ID 0x209a
54 #define CS5536_ACC_DEVICE_ID 0x2093
55 #define CS5536_OHCI_DEVICE_ID 0x2094
56 #define CS5536_EHCI_DEVICE_ID 0x2095
59 #define CS5536_ISA_CLASS_CODE 0x060100
60 #define CS5536_IDE_CLASS_CODE 0x010180
61 #define CS5536_ACC_CLASS_CODE 0x040100
[all …]
/Linux-v5.10/crypto/
Dtestmgr.h33 * @ksize: Length of @key in bytes (0 if no key)
101 * @crypt_error: When @novrfy=0, the expected error from encrypt(). When
209 "\x5e\x32\x39\x6d\xc1\x1d\x7d\x50\x3b\x9f\x7a\xad\xf0\x2e\x25\x53"
234 "\xC9\x7F\xF3\xAD\x59\x50\xAC\xCF\xBC\x11\x1C\x76\xF1\xA9\x52\x94"
251 "\x59\x89\xaf\xf0\xba\x44\xd7\xf1\x1a\x50\x72\xef\x5e\x4a\xb6\xb7"
373 "\xA0\x86\xED\xF2\xB9\x50\x5C\x54\x5C\xBA\xE4\xA1\xB2\xA7\xAE\x2F"
411 "\x24\x3A\xC9\xCF\x6D\x8D\x17\x50\x94\x52\xD3\xE7\x0F\x2F\x7E\x94"
419 "\x1B\xAB\xC0\xCA\x88\x07\xAC\xF1\x7D\x35\x83\x67\x28\x2D\x50\xE9"
433 "\x0C\x45\xEB\xE1\x00\xDE\x72\x50\xB1\xA6\x0B\x76\xC5\x8D\xFC\x82"
450 "\x34\xF9\xA9\x33\x70\x11\xAD\x5A\xDC\x5F\xCF\x50\xF6\x23\x2F\x39"
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/phy/
Dintel,combo-phy.yaml18 pattern: "combophy(@.*|-[0-9a-f])*$"
89 reg = <0xd0a00000 0x40000>,
90 <0xd0a40000 0x1000>;
92 resets = <&rcu0 0x50 6>,
93 <&rcu0 0x50 17>,
94 <&rcu0 0x50 23>,
95 <&rcu0 0x50 24>;
97 intel,syscfg = <&sysconf 0>;
98 intel,hsio = <&hsiol 0>;
/Linux-v5.10/drivers/staging/ks7010/
Dks_wlan.h53 DEVICE_STATE_OFF = 0, /* this means hw_unavailable is != 0 */
63 #define SME_MODE_SET BIT(0)
187 u8 id; /* 0xdd = WPA or 0x30 = RSN */
192 #define WPA_INFO_ELEM_ID 0xdd
193 #define RSN_INFO_ELEM_ID 0x30
261 atomic_t status; /* initialvalue 0 */
268 atomic_t status; /* initialvalue 0 */
279 #define CIPHER_ID_WPA_NONE "\x00\x50\xf2\x00"
280 #define CIPHER_ID_WPA_WEP40 "\x00\x50\xf2\x01"
281 #define CIPHER_ID_WPA_TKIP "\x00\x50\xf2\x02"
[all …]
/Linux-v5.10/drivers/char/agp/
Dintel-agp.h9 #define INTEL_APSIZE 0xb4
10 #define INTEL_ATTBASE 0xb8
11 #define INTEL_AGPCTRL 0xb0
12 #define INTEL_NBXCFG 0x50
13 #define INTEL_ERRSTS 0x91
16 #define I830_GMCH_CTRL 0x52
17 #define I830_GMCH_ENABLED 0x4
18 #define I830_GMCH_MEM_MASK 0x1
19 #define I830_GMCH_MEM_64M 0x1
20 #define I830_GMCH_MEM_128M 0
[all …]
/Linux-v5.10/arch/m68k/atari/
Ddebug.c37 while (!(st_mfp.trn_stat & 0x80)) /* wait for tx buf empty */ in ata_mfp_out()
56 } while (!(atari_scc.cha_b_ctrl & 0x04)); /* wait for tx buf empty */ in ata_scc_out()
97 return 0; in ata_par_out()
103 sound_ym.wd_data = tmp & ~0x20; /* set strobe L */ in ata_par_out()
105 sound_ym.wd_data = tmp | 0x20; /* set strobe H */ in ata_par_out()
120 printer_present = 0; in atari_par_console_write()
125 printer_present = 0; in atari_par_console_write()
131 #if 0
134 while (!(st_mfp.rcv_stat & 0x80)) /* wait for rx buf filled */
143 } while (!(atari_scc.cha_b_ctrl & 0x01)); /* wait for rx buf filled */
[all …]
/Linux-v5.10/arch/x86/crypto/
Daegis128-aesni-asm.S30 .byte 0x00, 0x01, 0x01, 0x02, 0x03, 0x05, 0x08, 0x0d
31 .byte 0x15, 0x22, 0x37, 0x59, 0x90, 0xe9, 0x79, 0x62
33 .byte 0xdb, 0x3d, 0x18, 0x55, 0x6d, 0xc2, 0x2f, 0xf1
34 .byte 0x20, 0x11, 0x31, 0x42, 0x73, 0xb5, 0x28, 0xdd
39 .byte 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07
40 .byte 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
47 * STATE[0-4] - input state
49 * STATE[0-4] - output state (shifted positions)
79 and $0x1, %r8
83 and $0x1E, %r8
[all …]
/Linux-v5.10/arch/sparc/include/uapi/asm/
Dptrace.h16 #define PT_REGS_MAGIC 0x57ac6c00
142 #define UREG_G0 0
169 #define TRACEREG_SZ 0xa0
170 #define STACKFRAME_SZ 0xc0
172 #define TRACEREG32_SZ 0x50
173 #define STACKFRAME32_SZ 0x60
185 #define TRACEREG_SZ 0x50
186 #define STACKFRAME_SZ 0x60
193 #define PT_V9_G0 0x00
194 #define PT_V9_G1 0x08
[all …]
/Linux-v5.10/drivers/misc/cardreader/
Drtl8411.c23 return val & 0x0F; in rtl8411_get_ic_version()
28 u8 val = 0; in rtl8411b_is_qfn48()
32 if (val & 0x2) in rtl8411b_is_qfn48()
35 return 0; in rtl8411b_is_qfn48()
41 u32 reg1 = 0; in rtl8411_fetch_vendor_settings()
42 u8 reg3 = 0; in rtl8411_fetch_vendor_settings()
45 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg1); in rtl8411_fetch_vendor_settings()
53 pcr->card_drive_sel &= 0x3F; in rtl8411_fetch_vendor_settings()
57 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG3, reg3); in rtl8411_fetch_vendor_settings()
64 u32 reg = 0; in rtl8411b_fetch_vendor_settings()
[all …]
/Linux-v5.10/drivers/staging/rtl8712/
Dieee80211.c25 static const u8 WPA_OUI_TYPE[] = {0x00, 0x50, 0xf2, 1};
26 static const u8 WPA_CIPHER_SUITE_NONE[] = {0x00, 0x50, 0xf2, 0};
27 static const u8 WPA_CIPHER_SUITE_WEP40[] = {0x00, 0x50, 0xf2, 1};
28 static const u8 WPA_CIPHER_SUITE_TKIP[] = {0x00, 0x50, 0xf2, 2};
29 static const u8 WPA_CIPHER_SUITE_CCMP[] = {0x00, 0x50, 0xf2, 4};
30 static const u8 WPA_CIPHER_SUITE_WEP104[] = {0x00, 0x50, 0xf2, 5};
32 static const u8 RSN_CIPHER_SUITE_NONE[] = {0x00, 0x0f, 0xac, 0};
33 static const u8 RSN_CIPHER_SUITE_WEP40[] = {0x00, 0x0f, 0xac, 1};
34 static const u8 RSN_CIPHER_SUITE_TKIP[] = {0x00, 0x0f, 0xac, 2};
35 static const u8 RSN_CIPHER_SUITE_CCMP[] = {0x00, 0x0f, 0xac, 4};
[all …]
/Linux-v5.10/drivers/irqchip/
Dirq-renesas-h8s.c18 0x03, 0x02, 0x01, 0x00, 0x13, 0x12, 0x11, 0x10, /* 16 - 23 */
19 0x23, 0x22, 0x21, 0x20, 0x33, 0x32, 0x31, 0x30, /* 24 - 31 */
20 0x43, 0x42, 0x41, 0x40, 0x53, 0x53, 0x52, 0x52, /* 32 - 39 */
21 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, /* 40 - 47 */
22 0x50, 0x50, 0x50, 0x50, 0x63, 0x63, 0x63, 0x63, /* 48 - 55 */
23 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, /* 56 - 63 */
24 0x61, 0x61, 0x61, 0x61, 0x60, 0x60, 0x60, 0x60, /* 64 - 71 */
25 0x73, 0x73, 0x73, 0x73, 0x72, 0x72, 0x72, 0x72, /* 72 - 79 */
26 0x71, 0x71, 0x71, 0x71, 0x70, 0x83, 0x82, 0x81, /* 80 - 87 */
27 0x80, 0x80, 0x80, 0x80, 0x93, 0x93, 0x93, 0x93, /* 88 - 95 */
[all …]
/Linux-v5.10/arch/mips/boot/dts/pic32/
Dpic32mzda.dtsi34 #size-cells = <0>;
36 cpu@0 {
44 interrupts = <0 IRQ_TYPE_EDGE_RISING>;
49 #clock-cells = <0>;
57 #clock-cells = <0>;
65 reg = <0x1f801200 0x200>;
74 reg = <0x1f810000 0x1000>;
82 reg = <0x1f801400 0x400>;
89 reg = <0x1f860000 0x100>;
96 microchip,gpio-bank = <0>;
[all …]
/Linux-v5.10/fs/nls/
Dnls_ascii.c17 /* 0x00*/
18 0x0000, 0x0001, 0x0002, 0x0003,
19 0x0004, 0x0005, 0x0006, 0x0007,
20 0x0008, 0x0009, 0x000a, 0x000b,
21 0x000c, 0x000d, 0x000e, 0x000f,
22 /* 0x10*/
23 0x0010, 0x0011, 0x0012, 0x0013,
24 0x0014, 0x0015, 0x0016, 0x0017,
25 0x0018, 0x0019, 0x001a, 0x001b,
26 0x001c, 0x001d, 0x001e, 0x001f,
[all …]
/Linux-v5.10/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/
Dauxgm200.c36 nvkm_mask(device, 0x00d954 + (aux->ch * 0x50), 0x00310000, 0x00000000); in gm200_i2c_aux_fini()
44 const u32 ureq = unksel ? 0x00100000 : 0x00200000; in gm200_i2c_aux_init()
45 const u32 urep = unksel ? 0x01000000 : 0x02000000; in gm200_i2c_aux_init()
51 ctrl = nvkm_rd32(device, 0x00d954 + (aux->ch * 0x50)); in gm200_i2c_aux_init()
57 } while (ctrl & 0x03010000); in gm200_i2c_aux_init()
60 nvkm_mask(device, 0x00d954 + (aux->ch * 0x50), 0x00300000, ureq); in gm200_i2c_aux_init()
63 ctrl = nvkm_rd32(device, 0x00d954 + (aux->ch * 0x50)); in gm200_i2c_aux_init()
70 } while ((ctrl & 0x03000000) != urep); in gm200_i2c_aux_init()
72 return 0; in gm200_i2c_aux_init()
81 const u32 base = aux->ch * 0x50; in gm200_i2c_aux_xfer()
[all …]
Dauxg94.c36 nvkm_mask(device, 0x00e4e4 + (aux->ch * 0x50), 0x00310000, 0x00000000); in g94_i2c_aux_fini()
44 const u32 ureq = unksel ? 0x00100000 : 0x00200000; in g94_i2c_aux_init()
45 const u32 urep = unksel ? 0x01000000 : 0x02000000; in g94_i2c_aux_init()
51 ctrl = nvkm_rd32(device, 0x00e4e4 + (aux->ch * 0x50)); in g94_i2c_aux_init()
57 } while (ctrl & 0x03010000); in g94_i2c_aux_init()
60 nvkm_mask(device, 0x00e4e4 + (aux->ch * 0x50), 0x00300000, ureq); in g94_i2c_aux_init()
63 ctrl = nvkm_rd32(device, 0x00e4e4 + (aux->ch * 0x50)); in g94_i2c_aux_init()
70 } while ((ctrl & 0x03000000) != urep); in g94_i2c_aux_init()
72 return 0; in g94_i2c_aux_init()
81 const u32 base = aux->ch * 0x50; in g94_i2c_aux_xfer()
[all …]
/Linux-v5.10/drivers/cpufreq/
Dspeedstep-ich.c54 {0, SPEEDSTEP_HIGH, 0},
55 {0, SPEEDSTEP_LOW, 0},
56 {0, 0, CPUFREQ_TABLE_END},
71 pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase); in speedstep_find_register()
72 if (!(pmbase & 0x01)) { in speedstep_find_register()
77 pmbase &= 0xFFFFFFFE; in speedstep_find_register()
83 pr_debug("pmbase is 0x%x\n", pmbase); in speedstep_find_register()
84 return 0; in speedstep_find_register()
100 if (state > 0x1) in speedstep_set_state()
107 value = inb(pmbase + 0x50); in speedstep_set_state()
[all …]
/Linux-v5.10/drivers/mtd/nand/raw/
Ddenali.h17 #define DEVICE_RESET 0x0
20 #define TRANSFER_SPARE_REG 0x10
21 #define TRANSFER_SPARE_REG__FLAG BIT(0)
23 #define LOAD_WAIT_CNT 0x20
24 #define LOAD_WAIT_CNT__VALUE GENMASK(15, 0)
26 #define PROGRAM_WAIT_CNT 0x30
27 #define PROGRAM_WAIT_CNT__VALUE GENMASK(15, 0)
29 #define ERASE_WAIT_CNT 0x40
30 #define ERASE_WAIT_CNT__VALUE GENMASK(15, 0)
32 #define INT_MON_CYCCNT 0x50
[all …]

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