Home
last modified time | relevance | path

Searched +full:0 +full:x48000000 (Results 1 – 25 of 91) sorted by relevance

1234

/Linux-v5.10/arch/arm/mach-omap2/
Domap54xx.h17 #define L4_54XX_BASE 0x4a000000
18 #define L4_WK_54XX_BASE 0x4ae00000
19 #define L4_PER_54XX_BASE 0x48000000
20 #define L3_54XX_BASE 0x44000000
21 #define OMAP54XX_32KSYNCT_BASE 0x4ae04000
22 #define OMAP54XX_CM_CORE_AON_BASE 0x4a004000
23 #define OMAP54XX_CM_CORE_BASE 0x4a008000
24 #define OMAP54XX_PRM_BASE 0x4ae06000
25 #define OMAP54XX_PRCM_MPU_BASE 0x48243000
26 #define OMAP54XX_SCM_BASE 0x4a002000
[all …]
Diomap.h33 #define OMAP2_L3_IO_OFFSET 0x90000000
36 #define OMAP2_L4_IO_OFFSET 0xb2000000
39 #define OMAP4_L3_IO_OFFSET 0xb4000000
42 #define AM33XX_L4_WK_IO_OFFSET 0xb5000000
45 #define OMAP4_L3_PER_IO_OFFSET 0xb1100000
48 #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
58 #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
61 #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
65 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
70 /* 0x6e000000 --> 0xfe000000 */
[all …]
Dam33xx.h19 #define L4_SLOW_AM33XX_BASE 0x48000000
21 #define AM33XX_SCM_BASE 0x44E10000
23 #define AM33XX_PRCM_BASE 0x44E00000
24 #define AM43XX_PRCM_BASE 0x44DF0000
25 #define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + 0x3FC)
Dti81xx.h19 #define L4_SLOW_TI81XX_BASE 0x48000000
21 #define TI81XX_SCM_BASE 0x48140000
23 #define TI81XX_PRCM_BASE 0x48180000
27 * TI81XX register for checking device ID (it adds 0x204 to tap base while
28 * TI81XX DEVICE ID register is at offset 0x600 from control base).
31 TI81XX_CONTROL_DEVICE_ID - 0x204)
34 #define TI81XX_ARM_INTC_BASE 0x48200000
Domap44xx.h17 #define L4_44XX_BASE 0x4a000000
18 #define L4_WK_44XX_BASE 0x4a300000
19 #define L4_PER_44XX_BASE 0x48000000
20 #define L4_EMU_44XX_BASE 0x54000000
21 #define L3_44XX_BASE 0x44000000
22 #define OMAP44XX_EMIF1_BASE 0x4c000000
23 #define OMAP44XX_EMIF2_BASE 0x4d000000
24 #define OMAP44XX_DMM_BASE 0x4e000000
25 #define OMAP4430_32KSYNCT_BASE 0x4a304000
26 #define OMAP4430_CM1_BASE 0x4a004000
[all …]
Domap34xx.h17 #define L4_34XX_BASE 0x48000000
18 #define L4_WK_34XX_BASE 0x48300000
19 #define L4_PER_34XX_BASE 0x49000000
20 #define L4_EMU_34XX_BASE 0x54000000
21 #define L3_34XX_BASE 0x68000000
23 #define L4_WK_AM33XX_BASE 0x44C00000
25 #define OMAP3430_32KSYNCT_BASE 0x48320000
26 #define OMAP3430_CM_BASE 0x48004800
27 #define OMAP3430_PRM_BASE 0x48306800
28 #define OMAP343X_SMS_BASE 0x6C000000
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/arm/omap/
Dl4.txt27 reg = <0x48000000 0x800>,
28 <0x48000800 0x800>,
29 <0x48001000 0x400>,
30 <0x48001400 0x400>,
31 <0x48001800 0x400>,
32 <0x48001c00 0x400>;
36 ranges = <0 0x48000000 0x100000>;
/Linux-v5.10/arch/arm64/boot/dts/renesas/
Dr8a77961-ulcb.dts20 reg = <0x0 0x48000000 0x0 0x78000000>;
25 reg = <0x4 0x80000000 0x0 0x80000000>;
30 reg = <0x6 0x00000000 0x1 0x00000000>;
Dr8a77950-ulcb.dts20 reg = <0x0 0x48000000 0x0 0x38000000>;
25 reg = <0x5 0x00000000 0x0 0x40000000>;
30 reg = <0x6 0x00000000 0x0 0x40000000>;
35 reg = <0x7 0x00000000 0x0 0x40000000>;
Dr8a779a0-falcon-cpu.dtsi17 reg = <0x0 0x48000000 0x0 0x78000000>;
22 reg = <0x5 0x00000000 0x0 0x80000000>;
27 reg = <0x6 0x00000000 0x0 0x80000000>;
32 reg = <0x7 0x00000000 0x0 0x80000000>;
Dr8a77965-ulcb.dts20 reg = <0x0 0x48000000 0x0 0x78000000>;
31 clock-names = "du.0", "du.1", "du.3",
32 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a77960-ulcb.dts20 reg = <0x0 0x48000000 0x0 0x38000000>;
25 reg = <0x6 0x00000000 0x0 0x40000000>;
36 clock-names = "du.0", "du.1", "du.2",
37 "dclkin.0", "dclkin.1", "dclkin.2";
Dr8a774a1-hihope-rzg2m.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x6 0x00000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.2",
36 "dclkin.0", "dclkin.1", "dclkin.2";
Dr8a774a1-hihope-rzg2m-rev2.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x6 0x00000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.2",
36 "dclkin.0", "dclkin.1", "dclkin.2";
Dr8a774e1-hihope-rzg2h.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x5 0x00000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a774b1-hihope-rzg2n-rev2.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x4 0x80000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a774b1-hihope-rzg2n.dts19 reg = <0x0 0x48000000 0x0 0x78000000>;
24 reg = <0x4 0x80000000 0x0 0x80000000>;
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
Dr8a77951-ulcb.dts20 reg = <0x0 0x48000000 0x0 0x38000000>;
25 reg = <0x5 0x00000000 0x0 0x40000000>;
30 reg = <0x6 0x00000000 0x0 0x40000000>;
35 reg = <0x7 0x00000000 0x0 0x40000000>;
48 clock-names = "du.0", "du.1", "du.2", "du.3",
49 "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
/Linux-v5.10/Documentation/devicetree/bindings/interrupt-controller/
Dfaraday,ftintc010.txt22 reg = <0x48000000 0x1000>;
/Linux-v5.10/drivers/scsi/
D53c700_d.h_shipped28 ABSOLUTE Device_ID = 0 ; ID of target for command
29 ABSOLUTE MessageCount = 0 ; Number of bytes in message
30 ABSOLUTE MessageLocation = 0 ; Addr of message
31 ABSOLUTE CommandCount = 0 ; Number of bytes in command
32 ABSOLUTE CommandAddress = 0 ; Addr of Command
33 ABSOLUTE StatusAddress = 0 ; Addr to receive status return
34 ABSOLUTE ReceiveMsgAddress = 0 ; Addr to receive msg
42 ABSOLUTE SGScriptStartAddress = 0
45 ; this: 0xPRS where
48 ABSOLUTE AFTER_SELECTION = 0x100
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/dma/
Ddma-controller.yaml26 reg = <0x48000000 0x1000>;
27 interrupts = <0 12 0x4
28 0 13 0x4
29 0 14 0x4
30 0 15 0x4>;
34 dma-channel-mask = <0xfffe>;
/Linux-v5.10/arch/arm/mach-pxa/include/mach/
Daddr-map.h8 #define PXA_CS0_PHYS 0x00000000
9 #define PXA_CS1_PHYS 0x04000000
10 #define PXA_CS2_PHYS 0x08000000
11 #define PXA_CS3_PHYS 0x0C000000
12 #define PXA_CS4_PHYS 0x10000000
13 #define PXA_CS5_PHYS 0x14000000
15 #define PXA300_CS0_PHYS 0x00000000 /* PXA300/PXA310 _only_ */
16 #define PXA300_CS1_PHYS 0x30000000 /* PXA300/PXA310 _only_ */
17 #define PXA3xx_CS2_PHYS 0x10000000
18 #define PXA3xx_CS3_PHYS 0x14000000
[all …]
/Linux-v5.10/Documentation/arm/
Dixp4xx.rst78 1) A direct mapped window from 0x48000000 to 0x4bffffff (64MB).
87 for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus.
/Linux-v5.10/arch/arm/boot/dts/
Dox810se.dtsi17 #address-cells = <0>;
18 #size-cells = <0>;
29 /* Max 256MB @ 0x48000000 */
30 reg = <0x48000000 0x10000000>;
36 #clock-cells = <0>;
42 #clock-cells = <0>;
48 #clock-cells = <0>;
56 #clock-cells = <0>;
62 #clock-cells = <0>;
70 #clock-cells = <0>;
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/
Dresource-names.txt27 ranges = <0 0 0x48000000 0x00001000>, /* MPU path */
28 <1 0 0x49000000 0x00001000>; /* L3 path */
31 reg = <0 0x10 0x10>, <0 0x20 0x10>,
32 <1 0x10 0x10>, <1 0x20 0x10>;
41 reg = <0 0x40 0x10>, <1 0x40 0x10>;
49 reg = <0x4a064000 0x800>, <0x4a064800 0x200>,
50 <0x4a064c00 0x200>;

1234