Searched +full:0 +full:x43f90000 (Results 1 – 6 of 6) sorted by relevance
9 #define IMX1_UART1_BASE_ADDR 0x0020600010 #define IMX1_UART2_BASE_ADDR 0x0020700014 #define IMX21_UART1_BASE_ADDR 0x1000a00015 #define IMX21_UART2_BASE_ADDR 0x1000b00016 #define IMX21_UART3_BASE_ADDR 0x1000c00017 #define IMX21_UART4_BASE_ADDR 0x1000d00021 #define IMX25_UART1_BASE_ADDR 0x43f9000022 #define IMX25_UART2_BASE_ADDR 0x43f9400023 #define IMX25_UART3_BASE_ADDR 0x5000c00024 #define IMX25_UART4_BASE_ADDR 0x50008000[all …]
19 dummy 0109 reg = <0x53f80000 0x4000>;116 reg = <0x43f90000 0x4000>;
19 dummy 0175 reg = <0x53f80000 0x4000>;182 reg = <0x43f90000 0x4000>;
35 #size-cells = <0>;37 cpu@0 {40 reg = <0>;48 reg = <0x68000000 0x100000>;60 reg = <0x1fffc000 0x4000>;63 ranges = <0 0x1fffc000 0x4000>;70 reg = <0x43f00000 0x100000>;75 reg = <0x43f80000 0x4000>;79 #size-cells = <0>;85 reg = <0x43f84000 0x4000>;[all …]
39 #size-cells = <0>;41 cpu@0 {44 reg = <0>;52 reg = <0x68000000 0x10000000>;64 reg = <0x30000000 0x1000>;73 reg = <0x43f00000 0x100000>;78 #size-cells = <0>;80 reg = <0x43f80000 0x4000>;89 #size-cells = <0>;91 reg = <0x43f84000 0x4000>;[all …]
47 #size-cells = <0>;49 cpu@0 {52 reg = <0>;60 reg = <0x68000000 0x8000000>;66 #clock-cells = <0>;82 reg = <0x43f00000 0x100000>;87 reg = <0x43f00000 0x4000>;92 #size-cells = <0>;94 reg = <0x43f80000 0x4000>;103 #size-cells = <0>;[all …]