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/Linux-v5.10/Documentation/usb/
Dgadget_configfs.rst85 $ mkdir strings/0x409
89 $ echo <serial number> > strings/0x409/serialnumber
90 $ echo <manufacturer> > strings/0x409/manufacturer
91 $ echo <product> > strings/0x409/product
113 $ mkdir configs/c.1/strings/0x409
117 $ echo <configuration> > configs/c.1/strings/0x409/configuration
174 ./strings/0x409
175 ./strings/0x409/serialnumber
176 ./strings/0x409/product
177 ./strings/0x409/manufacturer
[all …]
Dacm.rst9 0. Disclaimer
75 B: Alloc= 0/900 us ( 0%), #Int= 0, #Iso= 0
80 C:* #Ifs= 1 Cfg#= 1 Atr=40 MxPwr= 0mA
81 I: If#= 0 Alt= 0 #EPs= 1 Cls=09(hub ) Sub=00 Prot=00 Driver=hub
83 T: Bus=01 Lev=01 Prnt=01 Port=01 Cnt=01 Dev#= 2 Spd=12 MxCh= 0
89 C: #Ifs= 1 Cfg#= 1 Atr=60 MxPwr= 0mA
90 I: If#= 0 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=ff Driver=acm
91 E: Ad=85(I) Atr=02(Bulk) MxPS= 64 Ivl= 0ms
92 E: Ad=04(O) Atr=02(Bulk) MxPS= 64 Ivl= 0ms
94 C:* #Ifs= 2 Cfg#= 2 Atr=60 MxPwr= 0mA
[all …]
/Linux-v5.10/arch/arc/include/asm/
Dmmu.h24 #define ARC_REG_MMU_BCR 0x06f
26 #define ARC_REG_TLBPD0 0x405
27 #define ARC_REG_TLBPD1 0x406
28 #define ARC_REG_TLBPD1HI 0 /* Dummy: allows code sharing with ARC700 */
29 #define ARC_REG_TLBINDEX 0x407
30 #define ARC_REG_TLBCOMMAND 0x408
31 #define ARC_REG_PID 0x409
32 #define ARC_REG_SCRATCH_DATA0 0x418
34 #define ARC_REG_TLBPD0 0x460
35 #define ARC_REG_TLBPD1 0x461
[all …]
/Linux-v5.10/drivers/gpu/drm/amd/display/include/
Ddpcd_defs.h31 #define DP_SINK_HW_REVISION_START 0x409
35 DPCD_REV_10 = 0x10,
36 DPCD_REV_11 = 0x11,
37 DPCD_REV_12 = 0x12,
38 DPCD_REV_13 = 0x13,
39 DPCD_REV_14 = 0x14
44 DOWNSTREAM_DP = 0,
51 LINK_TEST_PATTERN_NONE = 0,
58 TEST_COLOR_FORMAT_RGB = 0,
64 TEST_BIT_DEPTH_6 = 0,
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/usb/
Daspeed,usb-vhub.yaml76 const: 0
79 '^string@[0-9a-f]+$':
115 reg = <0x1e6a0000 0x300>;
121 pinctrl-0 = <&pinctrl_usb2ad_default>;
123 vhub-vendor-id = <0x1d6b>;
124 vhub-product-id = <0x0107>;
125 vhub-device-revision = <0x0100>;
128 #size-cells = <0>;
131 reg = <0x409>;
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_0_d.h27 #define mmIH_VMID_0_LUT 0xf50
28 #define mmIH_VMID_1_LUT 0xf51
29 #define mmIH_VMID_2_LUT 0xf52
30 #define mmIH_VMID_3_LUT 0xf53
31 #define mmIH_VMID_4_LUT 0xf54
32 #define mmIH_VMID_5_LUT 0xf55
33 #define mmIH_VMID_6_LUT 0xf56
34 #define mmIH_VMID_7_LUT 0xf57
35 #define mmIH_VMID_8_LUT 0xf58
36 #define mmIH_VMID_9_LUT 0xf59
[all …]
/Linux-v5.10/Documentation/core-api/
Dlibrs.rst46 * first consecutive root is 0
50 rs_decoder = init_rs (10, 0x409, 0, 1, 6);
62 e.g. for FLASH ECC, where the all 0xFF is inverted to an all 0x00. The
63 Reed-Solomon code for all 0x00 is all 0x00. The code is inverted before
64 storing to FLASH so it is 0xFF too. This prevents that reading from an
77 memset(par, 0, sizeof(par));
79 encode_rs8 (rs_decoder, data8, 512, par, 0);
116 numerr = decode_rs8 (rs_decoder, data8, par, 512, NULL, 0, NULL, 0, NULL);
135 numerr = decode_rs8 (rs_decoder, data8, par, 512, syn, 0, NULL, 0, NULL);
157 numerr = decode_rs8 (rs_decoder, NULL, NULL, 512, syn, 0, errpos, 0, corr);
[all …]
/Linux-v5.10/include/uapi/linux/
Delf.h26 #define PT_NULL 0
34 #define PT_LOOS 0x60000000 /* OS-specific */
35 #define PT_HIOS 0x6fffffff /* OS-specific */
36 #define PT_LOPROC 0x70000000
37 #define PT_HIPROC 0x7fffffff
38 #define PT_GNU_EH_FRAME 0x6474e550
39 #define PT_GNU_PROPERTY 0x6474e553
41 #define PT_GNU_STACK (PT_LOOS + 0x474e551)
47 * or equal to PN_XNUM(0xffff), it is set to sh_info field of the
48 * section header at index 0, and PN_XNUM is set to e_phnum
[all …]
/Linux-v5.10/drivers/gpu/drm/exynos/
Dexynos_drm_scaler.c70 { DRM_FORMAT_RGB565, SCALER_RGB_565, 0, 0 },
71 { DRM_FORMAT_XRGB1555, SCALER_ARGB1555, 0, 0 },
72 { DRM_FORMAT_ARGB1555, SCALER_ARGB1555, 0, 0 },
73 { DRM_FORMAT_XRGB4444, SCALER_ARGB4444, 0, 0 },
74 { DRM_FORMAT_ARGB4444, SCALER_ARGB4444, 0, 0 },
75 { DRM_FORMAT_XRGB8888, SCALER_ARGB8888, 0, 0 },
76 { DRM_FORMAT_ARGB8888, SCALER_ARGB8888, 0, 0 },
77 { DRM_FORMAT_RGBX8888, SCALER_RGBA8888, 0, 0 },
78 { DRM_FORMAT_RGBA8888, SCALER_RGBA8888, 0, 0 },
85 for (i = 0; i < ARRAY_SIZE(scaler_formats); i++) in scaler_get_format()
[all …]
/Linux-v5.10/drivers/ata/
Dsata_qstor.c39 QS_HCF_CNFG3 = 0x0003, /* host configuration offset */
40 QS_HID_HPHY = 0x0004, /* host physical interface info */
41 QS_HCT_CTRL = 0x00e4, /* global interrupt mask offset */
42 QS_HST_SFF = 0x0100, /* host status fifo offset */
43 QS_HVS_SERD3 = 0x0393, /* PHY enable offset */
47 QS_CNFG3_GSRST = 0x01, /* global chip reset */
48 QS_SERD3_PHY_ENA = 0xf0, /* PHY detection ENAble*/
51 QS_CCF_CPBA = 0x0710, /* chan CPB base address */
52 QS_CCF_CSEP = 0x0718, /* chan CPB separation factor */
53 QS_CFC_HUFT = 0x0800, /* host upstream fifo threshold */
[all …]
/Linux-v5.10/drivers/gpu/drm/tegra/
Ddc.h161 #define DC_CMD_GENERAL_INCR_SYNCPT 0x000
162 #define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x001
164 #define SYNCPT_CNTRL_SOFT_RESET (1 << 0)
165 #define DC_CMD_GENERAL_INCR_SYNCPT_ERROR 0x002
166 #define DC_CMD_WIN_A_INCR_SYNCPT 0x008
167 #define DC_CMD_WIN_A_INCR_SYNCPT_CNTRL 0x009
168 #define DC_CMD_WIN_A_INCR_SYNCPT_ERROR 0x00a
169 #define DC_CMD_WIN_B_INCR_SYNCPT 0x010
170 #define DC_CMD_WIN_B_INCR_SYNCPT_CNTRL 0x011
171 #define DC_CMD_WIN_B_INCR_SYNCPT_ERROR 0x012
[all …]
/Linux-v5.10/drivers/net/dsa/
Dmt7530.h12 #define MT7530_ALL_MEMBERS 0xff
15 ID_MT7530 = 0,
22 #define TRGMII_BASE(x) (0x10000 + (x))
25 #define ETHSYS_CLKCFG0 0x2c
28 #define SYSC_REG_RSTCTRL 0x34
32 #define MT7530_MFC 0x10
33 #define BC_FFP(x) (((x) & 0xff) << 24)
34 #define UNM_FFP(x) (((x) & 0xff) << 16)
35 #define UNM_FFP_MASK UNM_FFP(~0)
36 #define UNU_FFP(x) (((x) & 0xff) << 8)
[all …]
/Linux-v5.10/drivers/perf/
Dqcom_l2_pmu.c31 #define L2PMCR_NUM_EV_MASK 0x1F
33 #define L2PMCR 0x400
34 #define L2PMCNTENCLR 0x403
35 #define L2PMCNTENSET 0x404
36 #define L2PMINTENCLR 0x405
37 #define L2PMINTENSET 0x406
38 #define L2PMOVSCLR 0x407
39 #define L2PMOVSSET 0x408
40 #define L2PMCCNTCR 0x409
41 #define L2PMCCNTR 0x40A
[all …]
/Linux-v5.10/sound/pci/lx6464es/
Dlx_core.c23 0,
24 0x400,
25 0x401,
26 0x402,
27 0x403,
28 0x404,
29 0x405,
30 0x406,
31 0x407,
32 0x408,
[all …]
/Linux-v5.10/drivers/mtd/nand/raw/
Ddiskonchip.c37 #define CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS 0
43 0xfffc8000, 0xfffca000, 0xfffcc000, 0xfffce000,
44 0xfffd0000, 0xfffd2000, 0xfffd4000, 0xfffd6000,
45 0xfffd8000, 0xfffda000, 0xfffdc000, 0xfffde000,
46 0xfffe0000, 0xfffe2000, 0xfffe4000, 0xfffe6000,
47 0xfffe8000, 0xfffea000, 0xfffec000, 0xfffee000,
49 0xc8000, 0xca000, 0xcc000, 0xce000,
50 0xd0000, 0xd2000, 0xd4000, 0xd6000,
51 0xd8000, 0xda000, 0xdc000, 0xde000,
52 0xe0000, 0xe2000, 0xe4000, 0xe6000,
[all …]
/Linux-v5.10/lib/
Dbch.c97 #define dbg(_fmt, args...) do {} while (0)
118 0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0,
119 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0,
120 0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8,
121 0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8,
122 0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4,
123 0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4,
124 0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec,
125 0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc,
126 0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2,
[all …]
/Linux-v5.10/sound/soc/codecs/
Dwm2200.h14 #define WM2200_CLKSRC_MCLK1 0
19 #define WM2200_FLL_SRC_MCLK1 0
26 #define WM2200_SOFTWARE_RESET 0x00
27 #define WM2200_DEVICE_REVISION 0x01
28 #define WM2200_TONE_GENERATOR_1 0x0B
29 #define WM2200_CLOCKING_3 0x102
30 #define WM2200_CLOCKING_4 0x103
31 #define WM2200_FLL_CONTROL_1 0x111
32 #define WM2200_FLL_CONTROL_2 0x112
33 #define WM2200_FLL_CONTROL_3 0x113
[all …]
/Linux-v5.10/drivers/mfd/
Dcs47l15-tables.c19 { 0x8C, 0x5555 },
20 { 0x8C, 0xAAAA },
21 { 0x314, 0x0080 },
22 { 0x4A8, 0x6023 },
23 { 0x4A9, 0x6023 },
24 { 0x4D4, 0x0008 },
25 { 0x4CF, 0x0F00 },
26 { 0x4D7, 0x1B2B },
27 { 0x8C, 0xCCCC },
28 { 0x8C, 0x3333 },
[all …]
Dcs47l35-tables.c18 { 0x460, 0x0c40 },
19 { 0x461, 0xcd1a },
20 { 0x462, 0x0c40 },
21 { 0x463, 0xb53b },
22 { 0x464, 0x0c40 },
23 { 0x465, 0x7503 },
24 { 0x466, 0x0c40 },
25 { 0x467, 0x4a41 },
26 { 0x468, 0x0041 },
27 { 0x469, 0x3491 },
[all …]
Dcs47l92-tables.c21 { 0x3A2, 0x2C29 },
22 { 0x3A3, 0x0E00 },
23 { 0x281, 0x0000 },
24 { 0x282, 0x0000 },
25 { 0x4EA, 0x0100 },
26 { 0x22B, 0x0000 },
27 { 0x4A0, 0x0080 },
28 { 0x4A1, 0x0000 },
29 { 0x4A2, 0x0000 },
30 { 0x180B, 0x033F },
[all …]
/Linux-v5.10/fs/cifs/
Dcifspdu.h30 #define LANMAN_PROT 0
34 #define CIFS_PROT 0
37 #define BAD_PROT 0xFFFF
40 * Note some commands have minimal (wct=0,bcc=0), or uninteresting, responses
44 #define SMB_COM_CREATE_DIRECTORY 0x00 /* trivial response */
45 #define SMB_COM_DELETE_DIRECTORY 0x01 /* trivial response */
46 #define SMB_COM_CLOSE 0x04 /* triv req/rsp, timestamp ignored */
47 #define SMB_COM_FLUSH 0x05 /* triv req/rsp */
48 #define SMB_COM_DELETE 0x06 /* trivial response */
49 #define SMB_COM_RENAME 0x07 /* trivial response */
[all …]
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_11_0_d.h27 #define mmPIPE0_PG_CONFIG 0x2c0
28 #define mmPIPE0_PG_ENABLE 0x2c1
29 #define mmPIPE0_PG_STATUS 0x2c2
30 #define mmPIPE1_PG_CONFIG 0x2c3
31 #define mmPIPE1_PG_ENABLE 0x2c4
32 #define mmPIPE1_PG_STATUS 0x2c5
33 #define mmPIPE2_PG_CONFIG 0x2c6
34 #define mmPIPE2_PG_ENABLE 0x2c7
35 #define mmPIPE2_PG_STATUS 0x2c8
36 #define mmDCFEV0_PG_CONFIG 0x2db
[all …]
Ddce_10_0_d.h27 #define mmPIPE0_PG_CONFIG 0x2c0
28 #define mmPIPE0_PG_ENABLE 0x2c1
29 #define mmPIPE0_PG_STATUS 0x2c2
30 #define mmPIPE1_PG_CONFIG 0x2c3
31 #define mmPIPE1_PG_ENABLE 0x2c4
32 #define mmPIPE1_PG_STATUS 0x2c5
33 #define mmPIPE2_PG_CONFIG 0x2c6
34 #define mmPIPE2_PG_ENABLE 0x2c7
35 #define mmPIPE2_PG_STATUS 0x2c8
36 #define mmPIPE3_PG_CONFIG 0x2c9
[all …]
Ddce_11_2_d.h27 #define mmPIPE0_PG_CONFIG 0x2c0
28 #define mmPIPE0_PG_ENABLE 0x2c1
29 #define mmPIPE0_PG_STATUS 0x2c2
30 #define mmPIPE1_PG_CONFIG 0x2c3
31 #define mmPIPE1_PG_ENABLE 0x2c4
32 #define mmPIPE1_PG_STATUS 0x2c5
33 #define mmPIPE2_PG_CONFIG 0x2c6
34 #define mmPIPE2_PG_ENABLE 0x2c7
35 #define mmPIPE2_PG_STATUS 0x2c8
36 #define mmPIPE3_PG_CONFIG 0x2c9
[all …]
/Linux-v5.10/include/linux/mfd/madera/
Dregisters.h14 #define MADERA_SOFTWARE_RESET 0x00
15 #define MADERA_HARDWARE_REVISION 0x01
16 #define MADERA_CTRL_IF_CFG_1 0x08
17 #define MADERA_CTRL_IF_CFG_2 0x09
18 #define MADERA_CTRL_IF_CFG_3 0x0A
19 #define MADERA_WRITE_SEQUENCER_CTRL_0 0x16
20 #define MADERA_WRITE_SEQUENCER_CTRL_1 0x17
21 #define MADERA_WRITE_SEQUENCER_CTRL_2 0x18
22 #define MADERA_TONE_GENERATOR_1 0x20
23 #define MADERA_TONE_GENERATOR_2 0x21
[all …]

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