/Linux-v6.6/drivers/remoteproc/ |
D | mtk_common.h | 15 #define MT8183_SW_RSTN 0x0 16 #define MT8183_SW_RSTN_BIT BIT(0) 17 #define MT8183_SCP_TO_HOST 0x1C 18 #define MT8183_SCP_IPC_INT_BIT BIT(0) 20 #define MT8183_HOST_TO_SCP 0x28 21 #define MT8183_HOST_IPC_INT_BIT BIT(0) 22 #define MT8183_WDT_CFG 0x84 23 #define MT8183_SCP_CLK_SW_SEL 0x4000 24 #define MT8183_SCP_CLK_DIV_SEL 0x4024 25 #define MT8183_SCP_SRAM_PDN 0x402C [all …]
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/Linux-v6.6/drivers/gpu/host1x/hw/ |
D | hw_host1x08_common.h | 6 #define HOST1X_COMMON_OFA_MLOCK 0x4050 7 #define HOST1X_COMMON_NVJPG1_MLOCK 0x4070 8 #define HOST1X_COMMON_VIC_MLOCK 0x4078 9 #define HOST1X_COMMON_NVENC_MLOCK 0x407c 10 #define HOST1X_COMMON_NVDEC_MLOCK 0x4080 11 #define HOST1X_COMMON_NVJPG_MLOCK 0x4084
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/Linux-v6.6/arch/arm64/boot/dts/amlogic/ |
D | amlogic-c3.dtsi | 13 #size-cells = <0>; 15 cpu0: cpu@0 { 18 reg = <0x0 0x0>; 25 reg = <0x0 0x1>; 47 #clock-cells = <0>; 68 #address-cells = <0>; 70 reg = <0x0 0xfff01000 0 0x1000>, 71 <0x0 0xfff02000 0 0x2000>, 72 <0x0 0xfff04000 0 0x2000>, 73 <0x0 0xfff06000 0 0x2000>; [all …]
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D | meson-s4.dtsi | 13 #size-cells = <0>; 15 cpu0: cpu@0 { 18 reg = <0x0 0x0>; 25 reg = <0x0 0x1>; 32 reg = <0x0 0x2>; 39 reg = <0x0 0x3>; 61 #clock-cells = <0>; 79 #address-cells = <0>; 81 reg = <0x0 0xfff01000 0 0x1000>, 82 <0x0 0xfff02000 0 0x2000>, [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/mfd/ |
D | ti,j721e-system-controller.yaml | 48 "^mux-controller@[0-9a-f]+$": 53 "^clock-controller@[0-9a-f]+$": 59 "phy@[0-9a-f]+$": 65 "^chipid@[0-9a-f]+$": 84 reg = <0x00100000 0x1c000>; 91 reg = <0x00004080 0x50>; 95 <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */ 96 <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */ 97 <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */ 98 <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */ [all …]
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/Linux-v6.6/drivers/ntb/hw/intel/ |
D | ntb_hw_gen3.h | 50 #define GEN3_IMBAR1SZ_OFFSET 0x00d0 51 #define GEN3_IMBAR2SZ_OFFSET 0x00d1 52 #define GEN3_EMBAR1SZ_OFFSET 0x00d2 53 #define GEN3_EMBAR2SZ_OFFSET 0x00d3 54 #define GEN3_DEVCTRL_OFFSET 0x0098 55 #define GEN3_DEVSTS_OFFSET 0x009a 56 #define GEN3_UNCERRSTS_OFFSET 0x014c 57 #define GEN3_CORERRSTS_OFFSET 0x0158 58 #define GEN3_LINK_STATUS_OFFSET 0x01a2 60 #define GEN3_NTBCNTL_OFFSET 0x0000 [all …]
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/Linux-v6.6/drivers/dma/xilinx/ |
D | xdma-regs.h | 32 #define XDMA_DESC_MAGIC 0xad4bUL 34 #define XDMA_DESC_FLAGS_BITS GENMASK(7, 0) 35 #define XDMA_DESC_STOPPED BIT(0) 72 #define XDMA_CHAN_IDENTIFIER 0x0 73 #define XDMA_CHAN_CONTROL 0x4 74 #define XDMA_CHAN_CONTROL_W1S 0x8 75 #define XDMA_CHAN_CONTROL_W1C 0xc 76 #define XDMA_CHAN_STATUS 0x40 77 #define XDMA_CHAN_COMPLETED_DESC 0x48 78 #define XDMA_CHAN_ALIGNMENTS 0x4c [all …]
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/Linux-v6.6/drivers/gpu/drm/radeon/reg_srcs/ |
D | rv515 | 1 rv515 0x6d40 2 0x1434 SRC_Y_X 3 0x1438 DST_Y_X 4 0x143C DST_HEIGHT_WIDTH 5 0x146C DP_GUI_MASTER_CNTL 6 0x1474 BRUSH_Y_X 7 0x1478 DP_BRUSH_BKGD_CLR 8 0x147C DP_BRUSH_FRGD_CLR 9 0x1480 BRUSH_DATA0 10 0x1484 BRUSH_DATA1 [all …]
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/Linux-v6.6/arch/powerpc/include/asm/ |
D | spu.h | 23 #define MFC_PUT_CMD 0x20 24 #define MFC_PUTS_CMD 0x28 25 #define MFC_PUTR_CMD 0x30 26 #define MFC_PUTF_CMD 0x22 27 #define MFC_PUTB_CMD 0x21 28 #define MFC_PUTFS_CMD 0x2A 29 #define MFC_PUTBS_CMD 0x29 30 #define MFC_PUTRF_CMD 0x32 31 #define MFC_PUTRB_CMD 0x31 32 #define MFC_PUTL_CMD 0x24 [all …]
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/Linux-v6.6/drivers/net/ethernet/chelsio/cxgb4/ |
D | t4_pci_id_tbl.h | 46 * -- The PCI Function Number to use in the PCI Device ID Table. "0" 73 /* T4 and later ASICs use a PCI Device ID scheme of 0xVFPP where: 76 * F = "0" for PF 0..3; "4".."7" for PF4..7; and "8" for VFs 97 CH_PCI_ID_TABLE_FENTRY(0x4000), /* T440-dbg */ 98 CH_PCI_ID_TABLE_FENTRY(0x4001), /* T420-cr */ 99 CH_PCI_ID_TABLE_FENTRY(0x4002), /* T422-cr */ 100 CH_PCI_ID_TABLE_FENTRY(0x4003), /* T440-cr */ 101 CH_PCI_ID_TABLE_FENTRY(0x4004), /* T420-bch */ 102 CH_PCI_ID_TABLE_FENTRY(0x4005), /* T440-bch */ 103 CH_PCI_ID_TABLE_FENTRY(0x4006), /* T440-ch */ [all …]
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/Linux-v6.6/arch/arm/boot/dts/nxp/mxs/ |
D | imx28-pinfunc.h | 13 #define MX28_PAD_GPMI_D00__GPMI_D0 0x0000 14 #define MX28_PAD_GPMI_D01__GPMI_D1 0x0010 15 #define MX28_PAD_GPMI_D02__GPMI_D2 0x0020 16 #define MX28_PAD_GPMI_D03__GPMI_D3 0x0030 17 #define MX28_PAD_GPMI_D04__GPMI_D4 0x0040 18 #define MX28_PAD_GPMI_D05__GPMI_D5 0x0050 19 #define MX28_PAD_GPMI_D06__GPMI_D6 0x0060 20 #define MX28_PAD_GPMI_D07__GPMI_D7 0x0070 21 #define MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100 22 #define MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110 [all …]
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/Linux-v6.6/drivers/video/fbdev/ |
D | hpfb.c | 34 #define TC_NBLANK 0x4080 35 #define TC_WEN 0x4088 36 #define TC_REN 0x408c 37 #define TC_FBEN 0x4090 38 #define TC_PRR 0x40ea 41 #define RR_CLEAR 0x0 42 #define RR_COPY 0x3 43 #define RR_NOOP 0x5 44 #define RR_XOR 0x6 45 #define RR_INVERT 0xa [all …]
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D | gxt4500.c | 19 #define PCI_DEVICE_ID_IBM_GXT4500P 0x21c 20 #define PCI_DEVICE_ID_IBM_GXT6500P 0x21b 21 #define PCI_DEVICE_ID_IBM_GXT4000P 0x16e 22 #define PCI_DEVICE_ID_IBM_GXT6000P 0x170 27 #define CFG_ENDIAN0 0x40 30 #define STATUS 0x1000 31 #define CTRL_REG0 0x1004 32 #define CR0_HALT_DMA 0x4 33 #define CR0_RASTER_RESET 0x8 34 #define CR0_GEOM_RESET 0x10 [all …]
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/Linux-v6.6/include/linux/mfd/wm831x/ |
D | core.h | 25 #define WM831X_RESET_ID 0x00 26 #define WM831X_REVISION 0x01 27 #define WM831X_PARENT_ID 0x4000 28 #define WM831X_SYSVDD_CONTROL 0x4001 29 #define WM831X_THERMAL_MONITORING 0x4002 30 #define WM831X_POWER_STATE 0x4003 31 #define WM831X_WATCHDOG 0x4004 32 #define WM831X_ON_PIN_CONTROL 0x4005 33 #define WM831X_RESET_CONTROL 0x4006 34 #define WM831X_CONTROL_INTERFACE 0x4007 [all …]
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/Linux-v6.6/sound/soc/codecs/ |
D | adau1781.c | 24 #define ADAU1781_DMIC_BEEP_CTRL 0x4008 25 #define ADAU1781_LEFT_PGA 0x400e 26 #define ADAU1781_RIGHT_PGA 0x400f 27 #define ADAU1781_LEFT_PLAYBACK_MIXER 0x401c 28 #define ADAU1781_RIGHT_PLAYBACK_MIXER 0x401e 29 #define ADAU1781_MONO_PLAYBACK_MIXER 0x401f 30 #define ADAU1781_LEFT_LINEOUT 0x4025 31 #define ADAU1781_RIGHT_LINEOUT 0x4026 32 #define ADAU1781_SPEAKER 0x4027 33 #define ADAU1781_BEEP_ZC 0x4028 [all …]
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D | rt1011.c | 37 { RT1011_POWER_9, 0xa840 }, 39 { RT1011_ADC_SET_5, 0x0a20 }, 40 { RT1011_DAC_SET_2, 0xa032 }, 42 { RT1011_SPK_PRO_DC_DET_1, 0xb00c }, 43 { RT1011_SPK_PRO_DC_DET_2, 0xcccc }, 45 { RT1011_A_TIMING_1, 0x6054 }, 47 { RT1011_POWER_7, 0x3e55 }, 48 { RT1011_POWER_8, 0x0520 }, 49 { RT1011_BOOST_CON_1, 0xe188 }, 50 { RT1011_POWER_4, 0x16f2 }, [all …]
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/Linux-v6.6/arch/alpha/include/asm/ |
D | core_mcpcia.h | 58 * 00 00 Byte 1110 0x000 59 * 01 00 Byte 1101 0x020 60 * 10 00 Byte 1011 0x040 61 * 11 00 Byte 0111 0x060 63 * 00 01 Word 1100 0x008 64 * 01 01 Word 1001 0x028 <= Not supported in this code. 65 * 10 01 Word 0011 0x048 67 * 00 10 Tribyte 1000 0x010 68 * 01 10 Tribyte 0001 0x030 70 * 10 11 Longword 0000 0x058 [all …]
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/Linux-v6.6/tools/perf/pmu-events/arch/x86/westmereep-dp/ |
D | memory.json | 4 "EventCode": "0x5", 7 "UMask": "0x2" 11 "EventCode": "0xB7, 0xBB", 13 "MSRIndex": "0x1a6,0x1a7", 14 "MSRValue": "0x3011", 16 "UMask": "0x1" 20 "EventCode": "0xB7, 0xBB", 22 "MSRIndex": "0x1a6,0x1a7", 23 "MSRValue": "0xf811", 25 "UMask": "0x1" [all …]
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/Linux-v6.6/tools/perf/pmu-events/arch/x86/westmereep-sp/ |
D | memory.json | 4 "EventCode": "0xB7, 0xBB", 6 "MSRIndex": "0x1a6,0x1a7", 7 "MSRValue": "0x6011", 9 "UMask": "0x1" 13 "EventCode": "0xB7, 0xBB", 15 "MSRIndex": "0x1a6,0x1a7", 16 "MSRValue": "0xF811", 18 "UMask": "0x1" 22 "EventCode": "0xB7, 0xBB", 24 "MSRIndex": "0x1a6,0x1a7", [all …]
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/Linux-v6.6/drivers/net/ethernet/tehuti/ |
D | tehuti.h | 81 # define L32_64(x) (u32) ((u64)(x) & 0xffffffff) 83 # define H32_64(x) 0 105 # define NETDEV_TX_OK 0 134 #define GET_INT_COAL(x) GET_BITS_SHIFT(x, 15, 0) 189 * if len == 0 addr is dma 190 * if len != 0 addr is skb */ 207 u64 InUCast; /* 0x7200 */ 208 u64 InMCast; /* 0x7210 */ 209 u64 InBCast; /* 0x7220 */ 210 u64 InPkts; /* 0x7230 */ [all …]
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/Linux-v6.6/drivers/net/ethernet/agere/ |
D | et131x.h | 53 #define LBCIF_DWORD0_GROUP 0xAC 54 #define LBCIF_DWORD1_GROUP 0xB0 57 #define LBCIF_ADDRESS_REGISTER 0xAC 58 #define LBCIF_DATA_REGISTER 0xB0 59 #define LBCIF_CONTROL_REGISTER 0xB1 60 #define LBCIF_STATUS_REGISTER 0xB2 63 #define LBCIF_CONTROL_SEQUENTIAL_READ 0x01 64 #define LBCIF_CONTROL_PAGE_WRITE 0x02 65 #define LBCIF_CONTROL_EEPROM_RELOAD 0x08 66 #define LBCIF_CONTROL_TWO_BYTE_ADDR 0x20 [all …]
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/Linux-v6.6/drivers/net/ethernet/hisilicon/hns/ |
D | hns_dsaf_misc.c | 12 HNS_OP_RESET_FUNC = 0x1, 13 HNS_OP_SERDES_LP_FUNC = 0x2, 14 HNS_OP_LED_SET_FUNC = 0x3, 15 HNS_OP_GET_PORT_TYPE_FUNC = 0x4, 16 HNS_OP_GET_SFP_STAT_FUNC = 0x5, 17 HNS_OP_LOCATE_LED_SET_FUNC = 0x6, 21 HNS_DSAF_RESET_FUNC = 0x1, 22 HNS_PPE_RESET_FUNC = 0x2, 23 HNS_XGE_RESET_FUNC = 0x4, 24 HNS_GE_RESET_FUNC = 0x5, [all …]
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/Linux-v6.6/drivers/scsi/qla2xxx/ |
D | qla_dbg.c | 13 * | Module Init and Probe | 0x0199 | | 14 * | Mailbox commands | 0x1206 | 0x11a5-0x11ff | 15 * | Device Discovery | 0x2134 | 0x2112-0x2115 | 16 * | | | 0x2127-0x2128 | 17 * | Queue Command and IO tracing | 0x3074 | 0x300b | 18 * | | | 0x3027-0x3028 | 19 * | | | 0x303d-0x3041 | 20 * | | | 0x302e,0x3033 | 21 * | | | 0x3036,0x3038 | 22 * | | | 0x303a | [all …]
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/Linux-v6.6/drivers/gpu/drm/i915/gt/ |
D | intel_gt_regs.h | 11 #define VLV_GUNIT_BASE 0x180000 25 #define MTL_MIRROR_TARGET_WP1 _MMIO(0xc60) 26 #define MTL_CAGF_MASK REG_GENMASK(8, 0) 27 #define MTL_CC0 0x0 28 #define MTL_CC6 0x3 32 #define RPM_CONFIG0 _MMIO(0xd00) 35 #define GEN9_RPM_CONFIG0_CRYSTAL_CLOCK_FREQ_19_2_MHZ 0 38 #define GEN11_RPM_CONFIG0_CRYSTAL_CLOCK_FREQ_MASK (0x7 << GEN11_RPM_CONFIG0_CRYSTAL_CLOCK_FREQ_SH… 39 #define GEN11_RPM_CONFIG0_CRYSTAL_CLOCK_FREQ_24_MHZ 0 44 #define GEN10_RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK (0x3 << GEN10_RPM_CONFIG0_CTC_SHIFT_PARAMETER_… [all …]
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/Linux-v6.6/drivers/clk/imx/ |
D | clk-imx8mn.c | 334 hws[IMX8MN_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx8mn_clocks_probe() 343 base = devm_of_iomap(dev, np, 0, NULL); in imx8mn_clocks_probe() 350 …hws[IMX8MN_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel", base + 0x0, 0, 2, pll_ref_se… in imx8mn_clocks_probe() 351 …hws[IMX8MN_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel", base + 0x14, 0, 2, pll_ref_s… in imx8mn_clocks_probe() 352 …hws[IMX8MN_VIDEO_PLL_REF_SEL] = imx_clk_hw_mux("video_pll_ref_sel", base + 0x28, 0, 2, pll_ref_sel… in imx8mn_clocks_probe() 353 …hws[IMX8MN_DRAM_PLL_REF_SEL] = imx_clk_hw_mux("dram_pll_ref_sel", base + 0x50, 0, 2, pll_ref_sels,… in imx8mn_clocks_probe() 354 …hws[IMX8MN_GPU_PLL_REF_SEL] = imx_clk_hw_mux("gpu_pll_ref_sel", base + 0x64, 0, 2, pll_ref_sels, A… in imx8mn_clocks_probe() 355 …hws[IMX8MN_M7_ALT_PLL_REF_SEL] = imx_clk_hw_mux("m7_alt_pll_ref_sel", base + 0x74, 0, 2, pll_ref_s… in imx8mn_clocks_probe() 356 …hws[IMX8MN_ARM_PLL_REF_SEL] = imx_clk_hw_mux("arm_pll_ref_sel", base + 0x84, 0, 2, pll_ref_sels, A… in imx8mn_clocks_probe() 357 …hws[IMX8MN_SYS_PLL3_REF_SEL] = imx_clk_hw_mux("sys_pll3_ref_sel", base + 0x114, 0, 2, pll_ref_sels… in imx8mn_clocks_probe() [all …]
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