/Linux-v6.1/drivers/gpu/host1x/hw/ |
D | hw_host1x08_common.h | 6 #define HOST1X_COMMON_OFA_MLOCK 0x4050 7 #define HOST1X_COMMON_NVJPG1_MLOCK 0x4070 8 #define HOST1X_COMMON_VIC_MLOCK 0x4078 9 #define HOST1X_COMMON_NVENC_MLOCK 0x407c 10 #define HOST1X_COMMON_NVDEC_MLOCK 0x4080 11 #define HOST1X_COMMON_NVJPG_MLOCK 0x4084
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/Linux-v6.1/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
D | mcp77.c | 45 return nvkm_rd32(device, 0x004600); in read_div() 52 u32 ctrl = nvkm_rd32(device, base + 0); in read_pll() 55 u32 post_div = 0; in read_pll() 56 u32 clock = 0; in read_pll() 60 case 0x4020: in read_pll() 61 post_div = 1 << ((nvkm_rd32(device, 0x4070) & 0x000f0000) >> 16); in read_pll() 63 case 0x4028: in read_pll() 64 post_div = (nvkm_rd32(device, 0x4040) & 0x000f0000) >> 16; in read_pll() 70 N1 = (coef & 0x0000ff00) >> 8; in read_pll() 71 M1 = (coef & 0x000000ff); in read_pll() [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/pci/ |
D | ti,j721e-pci-ep.yaml | 87 reg = <0x00 0x02900000 0x00 0x1000>, 88 <0x00 0x02907000 0x00 0x400>, 89 <0x00 0x0d000000 0x00 0x00800000>, 90 <0x00 0x10000000 0x00 0x08000000>; 92 ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x4070>;
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D | ti,j721e-pci-host.yaml | 66 const: 0x104c 71 - const: 0xb00d 73 - const: 0xb00f 75 - const: 0xb010 111 reg = <0x00 0x02900000 0x00 0x1000>, 112 <0x00 0x02907000 0x00 0x400>, 113 <0x00 0x0d000000 0x00 0x00800000>, 114 <0x00 0x10000000 0x00 0x00001000>; 116 ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x4070>; 125 bus-range = <0x0 0xf>; [all …]
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/Linux-v6.1/drivers/net/wireless/intel/iwlwifi/pcie/ |
D | drv.c | 20 #define TRANS_CFG_MARKER BIT(0) 27 __builtin_choose_expr(_IS_A(cfg, iwl_cfg), 0, _invalid_type))) 38 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */ 39 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */ 40 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */ 41 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */ 42 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */ 43 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */ 44 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */ 45 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */ [all …]
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/Linux-v6.1/include/video/ |
D | permedia2.h | 17 #define PM2_REGS_SIZE 0x10000 19 #define PM2TAG(r) (u32 )(((r)-0x8000)>>3) 25 #define PM2R_RESET_STATUS 0x0000 26 #define PM2R_IN_FIFO_SPACE 0x0018 27 #define PM2R_OUT_FIFO_WORDS 0x0020 28 #define PM2R_APERTURE_ONE 0x0050 29 #define PM2R_APERTURE_TWO 0x0058 30 #define PM2R_FIFO_DISCON 0x0068 31 #define PM2R_CHIP_CONFIG 0x0070 33 #define PM2R_REBOOT 0x1000 [all …]
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/Linux-v6.1/drivers/media/pci/ivtv/ |
D | ivtv-cards.h | 13 #define IVTV_CARD_PVR_250 0 /* WinTV PVR 250 */ 58 #define PCI_VENDOR_ID_ICOMP 0x4444 59 #define PCI_DEVICE_ID_IVTV15 0x0803 60 #define PCI_DEVICE_ID_IVTV16 0x0016 63 #define IVTV_PCI_ID_HAUPPAUGE 0x0070 64 #define IVTV_PCI_ID_HAUPPAUGE_ALT1 0x0270 65 #define IVTV_PCI_ID_HAUPPAUGE_ALT2 0x4070 66 #define IVTV_PCI_ID_ADAPTEC 0x9005 67 #define IVTV_PCI_ID_ASUSTEK 0x1043 68 #define IVTV_PCI_ID_AVERMEDIA 0x1461 [all …]
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/Linux-v6.1/arch/arm/boot/dts/ |
D | imx28-pinfunc.h | 13 #define MX28_PAD_GPMI_D00__GPMI_D0 0x0000 14 #define MX28_PAD_GPMI_D01__GPMI_D1 0x0010 15 #define MX28_PAD_GPMI_D02__GPMI_D2 0x0020 16 #define MX28_PAD_GPMI_D03__GPMI_D3 0x0030 17 #define MX28_PAD_GPMI_D04__GPMI_D4 0x0040 18 #define MX28_PAD_GPMI_D05__GPMI_D5 0x0050 19 #define MX28_PAD_GPMI_D06__GPMI_D6 0x0060 20 #define MX28_PAD_GPMI_D07__GPMI_D7 0x0070 21 #define MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100 22 #define MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110 [all …]
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/Linux-v6.1/include/linux/mfd/wm831x/ |
D | core.h | 25 #define WM831X_RESET_ID 0x00 26 #define WM831X_REVISION 0x01 27 #define WM831X_PARENT_ID 0x4000 28 #define WM831X_SYSVDD_CONTROL 0x4001 29 #define WM831X_THERMAL_MONITORING 0x4002 30 #define WM831X_POWER_STATE 0x4003 31 #define WM831X_WATCHDOG 0x4004 32 #define WM831X_ON_PIN_CONTROL 0x4005 33 #define WM831X_RESET_CONTROL 0x4006 34 #define WM831X_CONTROL_INTERFACE 0x4007 [all …]
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/Linux-v6.1/tools/perf/pmu-events/arch/x86/westmereex/ |
D | memory.json | 4 "Counter": "0,1,2,3", 5 "EventCode": "0x5", 8 "UMask": "0x2" 13 "EventCode": "0xB7", 15 "MSRIndex": "0x1A6", 16 "MSRValue": "0x6011", 19 "UMask": "0x1" 24 "EventCode": "0xB7", 26 "MSRIndex": "0x1A6", 27 "MSRValue": "0xF811", [all …]
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/Linux-v6.1/tools/perf/pmu-events/arch/x86/nehalemex/ |
D | memory.json | 5 "EventCode": "0xB7", 7 "MSRIndex": "0x1A6", 8 "MSRValue": "0x6011", 11 "UMask": "0x1" 16 "EventCode": "0xB7", 18 "MSRIndex": "0x1A6", 19 "MSRValue": "0xF811", 22 "UMask": "0x1" 27 "EventCode": "0xB7", 29 "MSRIndex": "0x1A6", [all …]
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/Linux-v6.1/tools/perf/pmu-events/arch/x86/nehalemep/ |
D | memory.json | 5 "EventCode": "0xB7", 7 "MSRIndex": "0x1A6", 8 "MSRValue": "0x6011", 11 "UMask": "0x1" 16 "EventCode": "0xB7", 18 "MSRIndex": "0x1A6", 19 "MSRValue": "0xF811", 22 "UMask": "0x1" 27 "EventCode": "0xB7", 29 "MSRIndex": "0x1A6", [all …]
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/Linux-v6.1/drivers/net/ethernet/tehuti/ |
D | tehuti.h | 81 # define L32_64(x) (u32) ((u64)(x) & 0xffffffff) 83 # define H32_64(x) 0 105 # define NETDEV_TX_OK 0 134 #define GET_INT_COAL(x) GET_BITS_SHIFT(x, 15, 0) 189 * if len == 0 addr is dma 190 * if len != 0 addr is skb */ 207 u64 InUCast; /* 0x7200 */ 208 u64 InMCast; /* 0x7210 */ 209 u64 InBCast; /* 0x7220 */ 210 u64 InPkts; /* 0x7230 */ [all …]
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/Linux-v6.1/drivers/net/ethernet/agere/ |
D | et131x.h | 53 #define LBCIF_DWORD0_GROUP 0xAC 54 #define LBCIF_DWORD1_GROUP 0xB0 57 #define LBCIF_ADDRESS_REGISTER 0xAC 58 #define LBCIF_DATA_REGISTER 0xB0 59 #define LBCIF_CONTROL_REGISTER 0xB1 60 #define LBCIF_STATUS_REGISTER 0xB2 63 #define LBCIF_CONTROL_SEQUENTIAL_READ 0x01 64 #define LBCIF_CONTROL_PAGE_WRITE 0x02 65 #define LBCIF_CONTROL_EEPROM_RELOAD 0x08 66 #define LBCIF_CONTROL_TWO_BYTE_ADDR 0x20 [all …]
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/Linux-v6.1/tools/perf/pmu-events/arch/x86/westmereep-dp/ |
D | memory.json | 4 "Counter": "0,1,2,3", 5 "EventCode": "0x5", 8 "UMask": "0x2" 12 "Counter": "0,1,2,3", 13 "EventCode": "0xB7, 0xBB", 15 "MSRIndex": "0x1a6,0x1a7", 16 "MSRValue": "0x3011", 19 "UMask": "0x1" 23 "Counter": "0,1,2,3", 24 "EventCode": "0xB7, 0xBB", [all …]
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/Linux-v6.1/tools/perf/pmu-events/arch/x86/westmereep-sp/ |
D | memory.json | 4 "Counter": "0,1,2,3", 5 "EventCode": "0xB7, 0xBB", 7 "MSRIndex": "0x1a6,0x1a7", 8 "MSRValue": "0x6011", 11 "UMask": "0x1" 15 "Counter": "0,1,2,3", 16 "EventCode": "0xB7, 0xBB", 18 "MSRIndex": "0x1a6,0x1a7", 19 "MSRValue": "0xF811", 22 "UMask": "0x1" [all …]
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/Linux-v6.1/arch/powerpc/include/asm/ |
D | spu.h | 23 #define MFC_PUT_CMD 0x20 24 #define MFC_PUTS_CMD 0x28 25 #define MFC_PUTR_CMD 0x30 26 #define MFC_PUTF_CMD 0x22 27 #define MFC_PUTB_CMD 0x21 28 #define MFC_PUTFS_CMD 0x2A 29 #define MFC_PUTBS_CMD 0x29 30 #define MFC_PUTRF_CMD 0x32 31 #define MFC_PUTRB_CMD 0x31 32 #define MFC_PUTL_CMD 0x24 [all …]
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/Linux-v6.1/arch/arm64/boot/dts/ti/ |
D | k3-am64-main.dtsi | 13 #clock-cells = <0>; 15 clock-frequency = <0>; 22 reg = <0x00 0x70000000 0x00 0x200000>; 25 ranges = <0x0 0x00 0x70000000 0x200000>; 28 reg = <0x1c0000 0x20000>; 32 reg = <0x1e0000 0x1c000>; 36 reg = <0x1fc000 0x4000>; 42 reg = <0x0 0x43000000 0x0 0x20000>; 45 ranges = <0x0 0x0 0x43000000 0x20000>; 50 mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */ [all …]
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D | k3-j721e-main.dtsi | 14 #clock-cells = <0>; 16 clock-frequency = <0>; 20 #clock-cells = <0>; 22 clock-frequency = <0>; 29 reg = <0x0 0x70000000 0x0 0x800000>; 32 ranges = <0x0 0x0 0x70000000 0x800000>; 34 atf-sram@0 { 35 reg = <0x0 0x20000>; 41 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */ 44 ranges = <0x0 0x0 0x00100000 0x1c000>; [all …]
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/Linux-v6.1/drivers/scsi/qla2xxx/ |
D | qla_dbg.c | 13 * | Module Init and Probe | 0x0199 | | 14 * | Mailbox commands | 0x1206 | 0x11a5-0x11ff | 15 * | Device Discovery | 0x2134 | 0x210e-0x2115 | 16 * | | | 0x211c-0x2128 | 17 * | | | 0x212c-0x2134 | 18 * | Queue Command and IO tracing | 0x3074 | 0x300b | 19 * | | | 0x3027-0x3028 | 20 * | | | 0x303d-0x3041 | 21 * | | | 0x302d,0x3033 | 22 * | | | 0x3036,0x3038 | [all …]
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/Linux-v6.1/drivers/clk/imx/ |
D | clk-imx8mn.c | 334 hws[IMX8MN_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx8mn_clocks_probe() 343 base = of_iomap(np, 0); in imx8mn_clocks_probe() 350 …hws[IMX8MN_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel", base + 0x0, 0, 2, pll_ref_se… in imx8mn_clocks_probe() 351 …hws[IMX8MN_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel", base + 0x14, 0, 2, pll_ref_s… in imx8mn_clocks_probe() 352 …hws[IMX8MN_VIDEO_PLL1_REF_SEL] = imx_clk_hw_mux("video_pll1_ref_sel", base + 0x28, 0, 2, pll_ref_s… in imx8mn_clocks_probe() 353 …hws[IMX8MN_DRAM_PLL_REF_SEL] = imx_clk_hw_mux("dram_pll_ref_sel", base + 0x50, 0, 2, pll_ref_sels,… in imx8mn_clocks_probe() 354 …hws[IMX8MN_GPU_PLL_REF_SEL] = imx_clk_hw_mux("gpu_pll_ref_sel", base + 0x64, 0, 2, pll_ref_sels, A… in imx8mn_clocks_probe() 355 …hws[IMX8MN_VPU_PLL_REF_SEL] = imx_clk_hw_mux("vpu_pll_ref_sel", base + 0x74, 0, 2, pll_ref_sels, A… in imx8mn_clocks_probe() 356 …hws[IMX8MN_ARM_PLL_REF_SEL] = imx_clk_hw_mux("arm_pll_ref_sel", base + 0x84, 0, 2, pll_ref_sels, A… in imx8mn_clocks_probe() 357 …hws[IMX8MN_SYS_PLL3_REF_SEL] = imx_clk_hw_mux("sys_pll3_ref_sel", base + 0x114, 0, 2, pll_ref_sels… in imx8mn_clocks_probe() [all …]
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D | clk-imx8mq.c | 299 hws[IMX8MQ_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx8mq_clocks_probe() 309 base = of_iomap(np, 0); in imx8mq_clocks_probe() 314 …hws[IMX8MQ_ARM_PLL_REF_SEL] = imx_clk_hw_mux("arm_pll_ref_sel", base + 0x28, 16, 2, pll_ref_sels, … in imx8mq_clocks_probe() 315 …hws[IMX8MQ_GPU_PLL_REF_SEL] = imx_clk_hw_mux("gpu_pll_ref_sel", base + 0x18, 16, 2, pll_ref_sels, … in imx8mq_clocks_probe() 316 …hws[IMX8MQ_VPU_PLL_REF_SEL] = imx_clk_hw_mux("vpu_pll_ref_sel", base + 0x20, 16, 2, pll_ref_sels, … in imx8mq_clocks_probe() 317 …hws[IMX8MQ_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel", base + 0x0, 16, 2, pll_ref_s… in imx8mq_clocks_probe() 318 …hws[IMX8MQ_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel", base + 0x8, 16, 2, pll_ref_s… in imx8mq_clocks_probe() 319 …hws[IMX8MQ_VIDEO_PLL1_REF_SEL] = imx_clk_hw_mux("video_pll1_ref_sel", base + 0x10, 16, 2, pll_ref_… in imx8mq_clocks_probe() 320 …hws[IMX8MQ_SYS3_PLL1_REF_SEL] = imx_clk_hw_mux("sys3_pll1_ref_sel", base + 0x48, 0, 2, pll_ref_sel… in imx8mq_clocks_probe() 321 …hws[IMX8MQ_DRAM_PLL1_REF_SEL] = imx_clk_hw_mux("dram_pll1_ref_sel", base + 0x60, 0, 2, pll_ref_sel… in imx8mq_clocks_probe() [all …]
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D | clk-imx8mm.c | 314 hws[IMX8MM_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx8mm_clocks_probe() 323 base = of_iomap(np, 0); in imx8mm_clocks_probe() 328 …hws[IMX8MM_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel", base + 0x0, 0, 2, pll_ref_se… in imx8mm_clocks_probe() 329 …hws[IMX8MM_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel", base + 0x14, 0, 2, pll_ref_s… in imx8mm_clocks_probe() 330 …hws[IMX8MM_VIDEO_PLL1_REF_SEL] = imx_clk_hw_mux("video_pll1_ref_sel", base + 0x28, 0, 2, pll_ref_s… in imx8mm_clocks_probe() 331 …hws[IMX8MM_DRAM_PLL_REF_SEL] = imx_clk_hw_mux("dram_pll_ref_sel", base + 0x50, 0, 2, pll_ref_sels,… in imx8mm_clocks_probe() 332 …hws[IMX8MM_GPU_PLL_REF_SEL] = imx_clk_hw_mux("gpu_pll_ref_sel", base + 0x64, 0, 2, pll_ref_sels, A… in imx8mm_clocks_probe() 333 …hws[IMX8MM_VPU_PLL_REF_SEL] = imx_clk_hw_mux("vpu_pll_ref_sel", base + 0x74, 0, 2, pll_ref_sels, A… in imx8mm_clocks_probe() 334 …hws[IMX8MM_ARM_PLL_REF_SEL] = imx_clk_hw_mux("arm_pll_ref_sel", base + 0x84, 0, 2, pll_ref_sels, A… in imx8mm_clocks_probe() 335 …hws[IMX8MM_SYS_PLL3_REF_SEL] = imx_clk_hw_mux("sys_pll3_ref_sel", base + 0x114, 0, 2, pll_ref_sels… in imx8mm_clocks_probe() [all …]
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D | clk-imx8mp.c | 417 anatop_base = of_iomap(np, 0); in imx8mp_clocks_probe() 423 ccm_base = devm_platform_ioremap_resource(pdev, 0); in imx8mp_clocks_probe() 438 hws[IMX8MP_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx8mp_clocks_probe() 446 …hws[IMX8MP_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel", anatop_base + 0x0, 0, 2, pll… in imx8mp_clocks_probe() 447 …hws[IMX8MP_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel", anatop_base + 0x14, 0, 2, pl… in imx8mp_clocks_probe() 448 …hws[IMX8MP_VIDEO_PLL1_REF_SEL] = imx_clk_hw_mux("video_pll1_ref_sel", anatop_base + 0x28, 0, 2, pl… in imx8mp_clocks_probe() 449 …hws[IMX8MP_DRAM_PLL_REF_SEL] = imx_clk_hw_mux("dram_pll_ref_sel", anatop_base + 0x50, 0, 2, pll_re… in imx8mp_clocks_probe() 450 …hws[IMX8MP_GPU_PLL_REF_SEL] = imx_clk_hw_mux("gpu_pll_ref_sel", anatop_base + 0x64, 0, 2, pll_ref_… in imx8mp_clocks_probe() 451 …hws[IMX8MP_VPU_PLL_REF_SEL] = imx_clk_hw_mux("vpu_pll_ref_sel", anatop_base + 0x74, 0, 2, pll_ref_… in imx8mp_clocks_probe() 452 …hws[IMX8MP_ARM_PLL_REF_SEL] = imx_clk_hw_mux("arm_pll_ref_sel", anatop_base + 0x84, 0, 2, pll_ref_… in imx8mp_clocks_probe() [all …]
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/Linux-v6.1/drivers/net/ethernet/marvell/octeontx2/af/ |
D | rvu_reg.h | 12 #define RVU_AF_MSIXTR_BASE (0x10) 13 #define RVU_AF_ECO (0x20) 14 #define RVU_AF_BLK_RST (0x30) 15 #define RVU_AF_PF_BAR4_ADDR (0x40) 16 #define RVU_AF_RAS (0x100) 17 #define RVU_AF_RAS_W1S (0x108) 18 #define RVU_AF_RAS_ENA_W1S (0x110) 19 #define RVU_AF_RAS_ENA_W1C (0x118) 20 #define RVU_AF_GEN_INT (0x120) 21 #define RVU_AF_GEN_INT_W1S (0x128) [all …]
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