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/Linux-v5.10/Documentation/devicetree/bindings/i2c/
Di2c-pnx.txt9 - #size-cells: always 0
19 reg = <0x400a0000 0x100>;
21 interrupts = <51 0>;
23 #size-cells = <0>;
28 reg = <0x400a8000 0x100>;
30 interrupts = <50 0>;
32 #size-cells = <0>;
/Linux-v5.10/Documentation/devicetree/bindings/mailbox/
Dsprd-mailbox.yaml54 reg = <0x400a0000 0x8000>, <0x400a8000 0x8000>;
/Linux-v5.10/arch/arm/boot/dts/
Dlpc32xx.dtsi20 #size-cells = <0>;
22 cpu@0 {
25 reg = <0x0>;
32 #clock-cells = <0>;
39 #clock-cells = <0>;
49 ranges = <0x00000000 0x00000000 0x10000000>,
50 <0x20000000 0x20000000 0x30000000>,
51 <0xe0000000 0xe0000000 0x04000000>;
55 reg = <0x08000000 0x20000>;
59 ranges = <0x00000000 0x08000000 0x20000>;
[all …]
/Linux-v5.10/arch/arm/mach-lpc32xx/
Dlpc32xx.h17 * AHB 0 physical base addresses
19 #define LPC32XX_SLC_BASE 0x20020000
20 #define LPC32XX_SSP0_BASE 0x20084000
21 #define LPC32XX_SPI1_BASE 0x20088000
22 #define LPC32XX_SSP1_BASE 0x2008C000
23 #define LPC32XX_SPI2_BASE 0x20090000
24 #define LPC32XX_I2S0_BASE 0x20094000
25 #define LPC32XX_SD_BASE 0x20098000
26 #define LPC32XX_I2S1_BASE 0x2009C000
27 #define LPC32XX_MLC_BASE 0x200A8000
[all …]