Searched +full:0 +full:x32c00000 (Results 1 – 8 of 8) sorted by relevance
| /Linux-v5.15/Documentation/devicetree/bindings/mailbox/ |
| D | ti,secure-proxy.yaml | 22 pattern: "^mailbox@[0-9a-f]+$"
45 pattern: "^rx_[0-9]{3}$"
74 reg = <0x32c00000 0x100000>,
75 <0x32400000 0x100000>,
76 <0x32800000 0x100000>;
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| /Linux-v5.15/arch/arm64/boot/dts/freescale/ |
| D | imx8mm.dtsi | 44 #size-cells = <0>;
51 arm,psci-suspend-param = <0x0010033>;
59 A53_0: cpu@0 {
62 reg = <0x0>;
77 reg = <0x1>;
90 reg = <0x2>;
103 reg = <0x3>;
125 opp-supported-hw = <0xe>, <0x7>;
133 opp-supported-hw = <0xc>, <0x7>;
141 opp-supported-hw = <0x8>, <0x3>;
[all …]
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| D | imx8mq.dtsi | 47 #clock-cells = <0>;
54 #clock-cells = <0>;
61 #clock-cells = <0>;
68 #clock-cells = <0>;
75 #clock-cells = <0>;
82 #clock-cells = <0>;
89 #clock-cells = <0>;
96 #size-cells = <0>;
98 A53_0: cpu@0 {
101 reg = <0x0>;
[all …]
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| D | imx8mn.dtsi | 44 #size-cells = <0>;
51 arm,psci-suspend-param = <0x0010033>;
59 A53_0: cpu@0 {
62 reg = <0x0>;
77 reg = <0x1>;
90 reg = <0x2>;
103 reg = <0x3>;
125 opp-supported-hw = <0xb00>, <0x7>;
133 opp-supported-hw = <0x300>, <0x7>;
141 opp-supported-hw = <0x100>, <0x3>;
[all …]
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| /Linux-v5.15/arch/hexagon/kernel/ |
| D | vm_init_segtable.S | 16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
46 /* VA 0x00000000 */
59 /* VA 0x40000000 */
68 /* VA 0x80000000 */
74 /*0xa8*/.word X,X,X,X
77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000)
79 /*0xa9*/.word X,X,X,X
81 /*0xaa*/.word X,X,X,X
82 /*0xab*/.word X,X,X,X
83 /*0xac*/.word X,X,X,X
[all …]
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| /Linux-v5.15/arch/arm64/boot/dts/ti/ |
| D | k3-j7200-main.dtsi | 10 #clock-cells = <0>;
18 reg = <0x00 0x70000000 0x00 0x100000>;
21 ranges = <0x00 0x00 0x70000000 0x100000>;
23 atf-sram@0 {
24 reg = <0x00 0x20000>;
30 reg = <0x00 0x00100000 0x00 0x1c000>;
33 ranges = <0x00 0x00 0x00100000 0x1c000>;
38 mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
39 <0x4088 0x3>, <0x408c 0x3>; /* SERDES0 lane2/3 select */
45 mux-reg-masks = <0x4000 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */
[all …]
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| D | k3-am65-main.dtsi | 12 reg = <0x0 0x70000000 0x0 0x200000>;
15 ranges = <0x0 0x0 0x70000000 0x200000>;
17 atf-sram@0 {
18 reg = <0x0 0x20000>;
22 reg = <0xf0000 0x10000>;
26 reg = <0x100000 0x100000>;
37 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
38 <0x00 0x01880000 0x00 0x90000>; /* GICR */
47 reg = <0x00 0x01820000 0x00 0x10000>;
48 socionext,synquacer-pre-its = <0x1000000 0x400000>;
[all …]
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| D | k3-j721e-main.dtsi | 13 #clock-cells = <0>;
15 clock-frequency = <0>;
19 #clock-cells = <0>;
21 clock-frequency = <0>;
28 reg = <0x0 0x70000000 0x0 0x800000>;
31 ranges = <0x0 0x0 0x70000000 0x800000>;
33 atf-sram@0 {
34 reg = <0x0 0x20000>;
40 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */
43 ranges = <0x0 0x0 0x00100000 0x1c000>;
[all …]
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