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/Linux-v5.10/include/soc/rockchip/
Drk3399_grf.h13 #define RK3399_PMUGRF_OS_REG2 0x308
/Linux-v5.10/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hwio.h13 #define DISP_INTF_SEL 0x004
14 #define INTR_EN 0x010
15 #define INTR_STATUS 0x014
16 #define INTR_CLEAR 0x018
17 #define INTR2_EN 0x008
18 #define INTR2_STATUS 0x00c
19 #define INTR2_CLEAR 0x02c
20 #define HIST_INTR_EN 0x01c
21 #define HIST_INTR_STATUS 0x020
22 #define HIST_INTR_CLEAR 0x024
[all …]
/Linux-v5.10/include/dt-bindings/reset/
Dhisi,hi6220-resets.h9 #define PERIPH_RSTDIS0_MMC0 0x000
10 #define PERIPH_RSTDIS0_MMC1 0x001
11 #define PERIPH_RSTDIS0_MMC2 0x002
12 #define PERIPH_RSTDIS0_NANDC 0x003
13 #define PERIPH_RSTDIS0_USBOTG_BUS 0x004
14 #define PERIPH_RSTDIS0_POR_PICOPHY 0x005
15 #define PERIPH_RSTDIS0_USBOTG 0x006
16 #define PERIPH_RSTDIS0_USBOTG_32K 0x007
17 #define PERIPH_RSTDIS1_HIFI 0x100
18 #define PERIPH_RSTDIS1_DIGACODEC 0x105
[all …]
/Linux-v5.10/include/linux/bcma/
Dbcma_driver_gmac_cmn.h7 #define BCMA_GMAC_CMN_STAG0 0x000
8 #define BCMA_GMAC_CMN_STAG1 0x004
9 #define BCMA_GMAC_CMN_STAG2 0x008
10 #define BCMA_GMAC_CMN_STAG3 0x00C
11 #define BCMA_GMAC_CMN_PARSER_CTL 0x020
12 #define BCMA_GMAC_CMN_MIB_MAX_LEN 0x024
13 #define BCMA_GMAC_CMN_PHY_ACCESS 0x100
14 #define BCMA_GMAC_CMN_PA_DATA_MASK 0x0000ffff
15 #define BCMA_GMAC_CMN_PA_ADDR_MASK 0x001f0000
17 #define BCMA_GMAC_CMN_PA_REG_MASK 0x1f000000
[all …]
/Linux-v5.10/arch/s390/kernel/
Drelocate_kernel.S25 * 0xf000 is a page_mask
30 basr %r13,0 # base address
34 lg %r5,0(%r2) # read another word for indirection page
36 tml %r5,0x1 # is it a destination page?
39 nill %r6,0xf000 # mask it out and...
42 tml %r5,0x2 # is it a indirection page?
44 nill %r5,0xf000 # YES, mask out,
48 tml %r5,0x4 # is it the done indicator?
52 tml %r5,0x8 # it should be a source indicator...
55 nill %r8,0xf000 # masking
[all …]
/Linux-v5.10/arch/arm/mach-pxa/
Dmxm8x10.c329 .dev_id = "pxa2xx-mci.0",
374 [0] = {
376 .size = NB(0x002),
377 .offset = NB(0x000),
382 .size = NB(0x010),
383 .offset = NB(0x002),
388 .size = NB(0x36c),
389 .offset = NB(0x012)
393 .size = NB(0x082),
394 .offset = NB(0x37e),
[all …]
/Linux-v5.10/arch/parisc/include/asm/
Dropes.h47 #if DELAYED_RESOURCE_CNT > 0
56 #define SBA_SEARCH_SAMPLE 0x100
89 #define ASTRO_RUNWAY_PORT 0x582
90 #define IKE_MERCED_PORT 0x803
91 #define REO_MERCED_PORT 0x804
92 #define REOG_MERCED_PORT 0x805
93 #define PLUTO_MCKINLEY_PORT 0x880
111 #define SBA_PDIR_VALID_BIT 0x8000000000000000ULL
113 #define SBA_AGPGART_COOKIE 0x0000badbadc0ffeeULL
115 #define SBA_FUNC_ID 0x0000 /* function id */
[all …]
/Linux-v5.10/drivers/clk/meson/
Daxg.h19 #define HHI_MIPI_CNTL0 0x00
20 #define HHI_GP0_PLL_CNTL 0x40
21 #define HHI_GP0_PLL_CNTL2 0x44
22 #define HHI_GP0_PLL_CNTL3 0x48
23 #define HHI_GP0_PLL_CNTL4 0x4c
24 #define HHI_GP0_PLL_CNTL5 0x50
25 #define HHI_GP0_PLL_STS 0x54
26 #define HHI_GP0_PLL_CNTL1 0x58
27 #define HHI_HIFI_PLL_CNTL 0x80
28 #define HHI_HIFI_PLL_CNTL2 0x84
[all …]
/Linux-v5.10/drivers/media/common/b2c2/
Dflexcop-reg.h11 FLEXCOP_UNK = 0,
18 FC_UNK = 0,
32 FC_USB = 0,
47 #define fc_data_Tag_ID_DVB 0x3e
48 #define fc_data_Tag_ID_ATSC 0x3f
49 #define fc_data_Tag_ID_IDSB 0x8b
51 #define fc_key_code_default 0x1
52 #define fc_key_code_even 0x2
53 #define fc_key_code_odd 0x3
64 FC_WRITE = 0,
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/arm/hisilicon/controller/
Dsysctrl.yaml58 cpu 2, reg + 0x4;
59 cpu 3, reg + 0x8;
99 ranges = <0 0x802000 0x1000>;
100 reg = <0x802000 0x1000>;
102 smp-offset = <0x31c>;
103 resume-offset = <0x308>;
104 reboot-offset = <0x4>;
106 clock: clock@0 {
108 reg = <0 0x10000>;
116 reg = <0x10000000 0x1000>;
[all …]
/Linux-v5.10/arch/s390/include/uapi/asm/
Dsie.h6 { 0x10, "DIAG (0x10) release pages" }, \
7 { 0x44, "DIAG (0x44) time slice end" }, \
8 { 0x9c, "DIAG (0x9c) time slice end directed" }, \
9 { 0x204, "DIAG (0x204) logical-cpu utilization" }, \
10 { 0x258, "DIAG (0x258) page-reference services" }, \
11 { 0x288, "DIAG (0x288) watchdog functions" }, \
12 { 0x308, "DIAG (0x308) ipl functions" }, \
13 { 0x500, "DIAG (0x500) KVM virtio functions" }, \
14 { 0x501, "DIAG (0x501) KVM breakpoint" }
17 { 0x01, "SIGP sense" }, \
[all …]
/Linux-v5.10/tools/arch/s390/include/uapi/asm/
Dsie.h6 { 0x10, "DIAG (0x10) release pages" }, \
7 { 0x44, "DIAG (0x44) time slice end" }, \
8 { 0x9c, "DIAG (0x9c) time slice end directed" }, \
9 { 0x204, "DIAG (0x204) logical-cpu utilization" }, \
10 { 0x258, "DIAG (0x258) page-reference services" }, \
11 { 0x288, "DIAG (0x288) watchdog functions" }, \
12 { 0x308, "DIAG (0x308) ipl functions" }, \
13 { 0x500, "DIAG (0x500) KVM virtio functions" }, \
14 { 0x501, "DIAG (0x501) KVM breakpoint" }
17 { 0x01, "SIGP sense" }, \
[all …]
/Linux-v5.10/drivers/misc/habanalabs/include/goya/asic_reg/
Dpci_nrtr_regs.h22 #define mmPCI_NRTR_HBW_MAX_CRED 0x100
24 #define mmPCI_NRTR_LBW_MAX_CRED 0x120
26 #define mmPCI_NRTR_DBG_E_ARB 0x300
28 #define mmPCI_NRTR_DBG_W_ARB 0x304
30 #define mmPCI_NRTR_DBG_N_ARB 0x308
32 #define mmPCI_NRTR_DBG_S_ARB 0x30C
34 #define mmPCI_NRTR_DBG_L_ARB 0x310
36 #define mmPCI_NRTR_DBG_E_ARB_MAX 0x320
38 #define mmPCI_NRTR_DBG_W_ARB_MAX 0x324
40 #define mmPCI_NRTR_DBG_N_ARB_MAX 0x328
[all …]
/Linux-v5.10/drivers/clk/st/
Dclkgen-fsyn.c26 #define PLL_BW_GOODREF (0L)
78 .nrst = { CLKGEN_FIELD(0x2f0, 0x1, 0),
79 CLKGEN_FIELD(0x2f0, 0x1, 1),
80 CLKGEN_FIELD(0x2f0, 0x1, 2),
81 CLKGEN_FIELD(0x2f0, 0x1, 3) },
82 .npda = CLKGEN_FIELD(0x2f0, 0x1, 12),
83 .nsb = { CLKGEN_FIELD(0x2f0, 0x1, 8),
84 CLKGEN_FIELD(0x2f0, 0x1, 9),
85 CLKGEN_FIELD(0x2f0, 0x1, 10),
86 CLKGEN_FIELD(0x2f0, 0x1, 11) },
[all …]
/Linux-v5.10/drivers/misc/habanalabs/goya/
Dgoya_coresight.c20 #define SPMU_EVENT_TYPES_OFFSET 0x400
222 "Timeout while waiting for coresight, addr: 0x%llx, position: %d, up: %d\n", in goya_coresight_timeout()
227 return 0; in goya_coresight_timeout()
245 WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK); in goya_config_stm()
253 WREG32(base_reg + 0xE80, 0x80004); in goya_config_stm()
254 WREG32(base_reg + 0xD64, 7); in goya_config_stm()
255 WREG32(base_reg + 0xD60, 0); in goya_config_stm()
256 WREG32(base_reg + 0xD00, lower_32_bits(input->he_mask)); in goya_config_stm()
257 WREG32(base_reg + 0xD20, lower_32_bits(input->sp_mask)); in goya_config_stm()
258 WREG32(base_reg + 0xD60, 1); in goya_config_stm()
[all …]
/Linux-v5.10/arch/arm64/boot/dts/freescale/
Dimx8mp-pinfunc.h13 #define MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00 0x014 0x274 0x000 0x0 0x0
14 #define MX8MP_IOMUXC_GPIO1_IO00__CCM_ENET_PHY_REF_CLK_ROOT 0x014 0x274 0x000 0x1 0x0
15 #define MX8MP_IOMUXC_GPIO1_IO00__ISP_FL_TRIG_0 0x014 0x274 0x5D4 0x3 0x0
16 #define MX8MP_IOMUXC_GPIO1_IO00__CCM_EXT_CLK1 0x014 0x274 0x000 0x6 0x0
17 #define MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01 0x018 0x278 0x000 0x0 0x0
18 #define MX8MP_IOMUXC_GPIO1_IO01__PWM1_OUT 0x018 0x278 0x000 0x1 0x0
19 #define MX8MP_IOMUXC_GPIO1_IO01__ISP_SHUTTER_TRIG_0 0x018 0x278 0x5DC 0x3 0x0
20 #define MX8MP_IOMUXC_GPIO1_IO01__CCM_EXT_CLK2 0x018 0x278 0x000 0x6 0x0
21 #define MX8MP_IOMUXC_GPIO1_IO02__GPIO1_IO02 0x01C 0x27C 0x000 0x0 0x0
22 #define MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x01C 0x27C 0x000 0x1 0x0
[all …]
Dimx8mn-pinfunc.h14 …ne MX8MN_IOMUXC_BOOT_MODE2_CCMSRCGPCMIX_BOOT_MODE2 0x020 0x25C 0x000 0x0 0x0
15 …ne MX8MN_IOMUXC_BOOT_MODE2_I2C1_SCL 0x020 0x25C 0x55C 0x1 0x3
16 …ne MX8MN_IOMUXC_BOOT_MODE3_CCMSRCGPCMIX_BOOT_MODE3 0x024 0x260 0x000 0x0 0x0
17 …ne MX8MN_IOMUXC_BOOT_MODE3_I2C1_SDA 0x024 0x260 0x56C 0x1 0x3
18 …ne MX8MN_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x028 0x290 0x000 0x0 0x0
19 …ne MX8MN_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_ENET_PHY_REF_CLK_ROOT 0x028 0x290 0x000 0x1 0x0
20 …ne MX8MN_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x028 0x290 0x000 0x5 0x0
21 …ne MX8MN_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_EXT_CLK1 0x028 0x290 0x000 0x6 0x0
22 …ne MX8MN_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x02C 0x294 0x000 0x0 0x0
23 …ne MX8MN_IOMUXC_GPIO1_IO01_PWM1_OUT 0x02C 0x294 0x000 0x1 0x0
[all …]
/Linux-v5.10/arch/s390/boot/
Dtext_dma.S15 larl %r1,0f
16 ex 0,0(%r1)
18 0: br %r14
46 diag %r1,%r2,0x14
64 diag %r1,%r0,0x210
81 diag %r2,%r4,0x26c
94 diag %r2,%r2,0x0c
106 stctg %c0,%c15,0(%r4)
107 lg %r2,0(%r4) # Disable lowcore protection
108 nilh %r2,0xefff
[all …]
/Linux-v5.10/arch/s390/pci/
Dpci_event.c60 pr_err("%s: Event 0x%x reports an error for PCI function 0x%x\n", in __zpci_event_error()
90 case 0x0301: /* Reserved|Standby -> Configured */ in __zpci_event_availability()
104 /* the PCI function will be scanned once function 0 appears */ in __zpci_event_availability()
117 case 0x0302: /* Reserved -> Standby */ in __zpci_event_availability()
119 clp_add_pci_device(ccdf->fid, ccdf->fh, 0); in __zpci_event_availability()
124 case 0x0303: /* Deconfiguration requested */ in __zpci_event_availability()
140 case 0x0304: /* Configured -> Standby|Reserved */ in __zpci_event_availability()
158 case 0x0306: /* 0x308 or 0x302 for multiple devices */ in __zpci_event_availability()
162 case 0x0308: /* Standby -> Reserved */ in __zpci_event_availability()
/Linux-v5.10/drivers/media/pci/tw68/
Dtw68-reg.h23 #define TW68_DMAC 0x000
24 #define TW68_DMAP_SA 0x004
25 #define TW68_DMAP_EXE 0x008
26 #define TW68_DMAP_PP 0x00c
27 #define TW68_VBIC 0x010
28 #define TW68_SBUSC 0x014
29 #define TW68_SBUSSD 0x018
30 #define TW68_INTSTAT 0x01C
31 #define TW68_INTMASK 0x020
32 #define TW68_GPIOC 0x024
[all …]
/Linux-v5.10/drivers/media/platform/
Dvia-camera.h5 #define VCR_INTCTRL 0x300 /* Capture interrupt control */
6 #define VCR_IC_EAV 0x0001 /* End of active video status */
7 #define VCR_IC_EVBI 0x0002 /* End of VBI status */
8 #define VCR_IC_FBOTFLD 0x0004 /* "flipping" Bottom field is active */
9 #define VCR_IC_ACTBUF 0x0018 /* Active video buffer */
10 #define VCR_IC_VSYNC 0x0020 /* 0 = VB, 1 = active video */
11 #define VCR_IC_BOTFLD 0x0040 /* Bottom field is active */
12 #define VCR_IC_FFULL 0x0080 /* FIFO full */
13 #define VCR_IC_INTEN 0x0100 /* End of active video int. enable */
14 #define VCR_IC_VBIINT 0x0200 /* End of VBI int enable */
[all …]
/Linux-v5.10/drivers/net/wireless/rsi/
Drsi_hal.h34 #define FLASH_SIZE_ADDR 0x04000016
35 #define PING_BUFFER_ADDRESS 0x19000
36 #define PONG_BUFFER_ADDRESS 0x1a000
37 #define SWBL_REGIN 0x41050034
38 #define SWBL_REGOUT 0x4105003c
39 #define PING_WRITE 0x1
40 #define PONG_WRITE 0x2
45 #define REGIN_VALID 0xA
46 #define REGIN_INPUT 0xA0
47 #define REGOUT_VALID 0xAB
[all …]
/Linux-v5.10/drivers/misc/habanalabs/gaudi/
Dgaudi_coresight.c17 #define SPMU_EVENT_TYPES_OFFSET 0x400
382 "Timeout while waiting for coresight, addr: 0x%llx, position: %d, up: %d\n", in gaudi_coresight_timeout()
387 return 0; in gaudi_coresight_timeout()
405 WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK); in gaudi_config_stm()
413 WREG32(base_reg + 0xE80, 0x80004); in gaudi_config_stm()
414 WREG32(base_reg + 0xD64, 7); in gaudi_config_stm()
415 WREG32(base_reg + 0xD60, 0); in gaudi_config_stm()
416 WREG32(base_reg + 0xD00, lower_32_bits(input->he_mask)); in gaudi_config_stm()
417 WREG32(base_reg + 0xD60, 1); in gaudi_config_stm()
418 WREG32(base_reg + 0xD00, upper_32_bits(input->he_mask)); in gaudi_config_stm()
[all …]
/Linux-v5.10/arch/arm/boot/dts/
Dimx50-pinfunc.h13 #define MX50_PAD_KEY_COL0__KPP_COL_0 0x020 0x2cc 0x000 0x0 0x0
14 #define MX50_PAD_KEY_COL0__GPIO4_0 0x020 0x2cc 0x000 0x1 0x0
15 #define MX50_PAD_KEY_COL0__EIM_NANDF_CLE 0x020 0x2cc 0x000 0x2 0x0
16 #define MX50_PAD_KEY_COL0__CTI_TRIGIN7 0x020 0x2cc 0x000 0x6 0x0
17 #define MX50_PAD_KEY_COL0__USBPHY1_TXREADY 0x020 0x2cc 0x000 0x7 0x0
18 #define MX50_PAD_KEY_ROW0__KPP_ROW_0 0x024 0x2d0 0x000 0x0 0x0
19 #define MX50_PAD_KEY_ROW0__GPIO4_1 0x024 0x2d0 0x000 0x1 0x0
20 #define MX50_PAD_KEY_ROW0__EIM_NANDF_ALE 0x024 0x2d0 0x000 0x2 0x0
21 #define MX50_PAD_KEY_ROW0__CTI_TRIGIN_ACK7 0x024 0x2d0 0x000 0x6 0x0
22 #define MX50_PAD_KEY_ROW0__USBPHY1_RXVALID 0x024 0x2d0 0x000 0x7 0x0
[all …]
/Linux-v5.10/drivers/staging/fbtft/
Dfb_bd663474.c28 gpiod_set_value(par->gpio.cs, 0); /* Activate chip */ in init_display()
35 write_reg(par, 0x000, 0x0001); /*oscillator 0: stop, 1: operation */ in init_display()
39 write_reg(par, 0x100, 0x0000); /* power supply setup */ in init_display()
40 write_reg(par, 0x101, 0x0000); in init_display()
41 write_reg(par, 0x102, 0x3110); in init_display()
42 write_reg(par, 0x103, 0xe200); in init_display()
43 write_reg(par, 0x110, 0x009d); in init_display()
44 write_reg(par, 0x111, 0x0022); in init_display()
45 write_reg(par, 0x100, 0x0120); in init_display()
48 write_reg(par, 0x100, 0x3120); in init_display()
[all …]

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