Searched +full:0 +full:x30001000 (Results 1 – 4 of 4) sorted by relevance
44 reg = <0x30001000 0x1000>;
16 #define MX25_USB_PHY_CTRL_OFFSET 0x0819 #define MX25_EHCI_INTERFACE_SINGLE_UNI (2 << 0)20 #define MX25_EHCI_INTERFACE_DIFF_UNI (0 << 0)21 #define MX25_EHCI_INTERFACE_MASK (0xf)24 #define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT)30 #define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)43 #define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x0844 #define MX53_USB_OTG_PHY_CTRL_1_OFFSET 0x0c45 #define MX53_USB_CTRL_1_OFFSET 0x1046 #define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK (0x11 << 2)[all …]
61 reg = <0x0 0x48211000 0x0 0x1000>,62 <0x0 0x48212000 0x0 0x2000>,63 <0x0 0x48214000 0x0 0x2000>,64 <0x0 0x48216000 0x0 0x2000>;73 reg = <0x0 0x48281000 0x0 0x1000>;79 #size-cells = <0>;81 cpu0: cpu@0 {84 reg = <0>;109 opp-supported-hw = <0xFF 0x01>;119 opp-supported-hw = <0xFF 0x02>;[all …]
32 #clock-cells = <0>;37 #clock-cells = <0>;44 #size-cells = <0>;46 CPU0: cpu@0 {49 reg = <0x0 0x0>;50 clocks = <&cpufreq_hw 0>;56 qcom,freq-domain = <&cpufreq_hw 0>;76 reg = <0x0 0x100>;77 clocks = <&cpufreq_hw 0>;83 qcom,freq-domain = <&cpufreq_hw 0>;[all …]
