Searched +full:0 +full:x30000000 (Results 1 – 25 of 398) sorted by relevance
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| /Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
| D | uvd_4_2_sh_mask.h | 27 #define UVD_SEMA_ADDR_LOW__ADDR_22_3_MASK 0xfffff
28 #define UVD_SEMA_ADDR_LOW__ADDR_22_3__SHIFT 0x0
29 #define UVD_SEMA_ADDR_HIGH__ADDR_42_23_MASK 0xfffff
30 #define UVD_SEMA_ADDR_HIGH__ADDR_42_23__SHIFT 0x0
31 #define UVD_SEMA_CMD__REQ_CMD_MASK 0xf
32 #define UVD_SEMA_CMD__REQ_CMD__SHIFT 0x0
33 #define UVD_SEMA_CMD__WR_PHASE_MASK 0x30
34 #define UVD_SEMA_CMD__WR_PHASE__SHIFT 0x4
35 #define UVD_SEMA_CMD__MODE_MASK 0x40
36 #define UVD_SEMA_CMD__MODE__SHIFT 0x6
[all …]
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| D | uvd_5_0_sh_mask.h | 27 #define UVD_SEMA_ADDR_LOW__ADDR_22_3_MASK 0xfffff
28 #define UVD_SEMA_ADDR_LOW__ADDR_22_3__SHIFT 0x0
29 #define UVD_SEMA_ADDR_HIGH__ADDR_42_23_MASK 0xfffff
30 #define UVD_SEMA_ADDR_HIGH__ADDR_42_23__SHIFT 0x0
31 #define UVD_SEMA_CMD__REQ_CMD_MASK 0xf
32 #define UVD_SEMA_CMD__REQ_CMD__SHIFT 0x0
33 #define UVD_SEMA_CMD__WR_PHASE_MASK 0x30
34 #define UVD_SEMA_CMD__WR_PHASE__SHIFT 0x4
35 #define UVD_SEMA_CMD__MODE_MASK 0x40
36 #define UVD_SEMA_CMD__MODE__SHIFT 0x6
[all …]
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| D | uvd_6_0_sh_mask.h | 27 #define UVD_SEMA_ADDR_LOW__ADDR_22_3_MASK 0xfffff
28 #define UVD_SEMA_ADDR_LOW__ADDR_22_3__SHIFT 0x0
29 #define UVD_SEMA_ADDR_HIGH__ADDR_42_23_MASK 0xfffff
30 #define UVD_SEMA_ADDR_HIGH__ADDR_42_23__SHIFT 0x0
31 #define UVD_SEMA_CMD__REQ_CMD_MASK 0xf
32 #define UVD_SEMA_CMD__REQ_CMD__SHIFT 0x0
33 #define UVD_SEMA_CMD__WR_PHASE_MASK 0x30
34 #define UVD_SEMA_CMD__WR_PHASE__SHIFT 0x4
35 #define UVD_SEMA_CMD__MODE_MASK 0x40
36 #define UVD_SEMA_CMD__MODE__SHIFT 0x6
[all …]
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| D | uvd_3_1_sh_mask.h | 27 #define UVD_SEMA_ADDR_LOW__ADDR_22_3_MASK 0xfffff
28 #define UVD_SEMA_ADDR_LOW__ADDR_22_3__SHIFT 0x0
29 #define UVD_SEMA_ADDR_HIGH__ADDR_42_23_MASK 0xfffff
30 #define UVD_SEMA_ADDR_HIGH__ADDR_42_23__SHIFT 0x0
31 #define UVD_SEMA_CMD__REQ_CMD_MASK 0xf
32 #define UVD_SEMA_CMD__REQ_CMD__SHIFT 0x0
33 #define UVD_SEMA_CMD__WR_PHASE_MASK 0x30
34 #define UVD_SEMA_CMD__WR_PHASE__SHIFT 0x4
35 #define UVD_SEMA_CMD__MODE_MASK 0x40
36 #define UVD_SEMA_CMD__MODE__SHIFT 0x6
[all …]
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| /Linux-v6.6/arch/arm/mach-sa1100/include/mach/ |
| D | hardware.h | 17 #define UNCACHEABLE_ADDR 0xfa050000 /* ICIP */
31 #define VIO_BASE 0xf8000000 /* virtual start of IO space */
33 #define PIO_START 0x80000000 /* physical start of IO space */
36 IOMEM( (((x)&0x00ffffff) | (((x)&0x30000000)>>VIO_SHIFT)) + VIO_BASE )
38 ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START )
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| /Linux-v6.6/drivers/net/wireless/broadcom/b43/ |
| D | dma.h | 19 #define B43_DMA32_TXCTL 0x00
20 #define B43_DMA32_TXENABLE 0x00000001
21 #define B43_DMA32_TXSUSPEND 0x00000002
22 #define B43_DMA32_TXLOOPBACK 0x00000004
23 #define B43_DMA32_TXFLUSH 0x00000010
24 #define B43_DMA32_TXPARITYDISABLE 0x00000800
25 #define B43_DMA32_TXADDREXT_MASK 0x00030000
27 #define B43_DMA32_TXRING 0x04
28 #define B43_DMA32_TXINDEX 0x08
29 #define B43_DMA32_TXSTATUS 0x0C
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| /Linux-v6.6/arch/mips/boot/dts/brcm/ |
| D | bcm97435svmb.dts | 11 memory@0 {
13 reg = <0x00000000 0x10000000>,
14 <0x20000000 0x30000000>,
15 <0x90000000 0x40000000>;
135 brcm,scb-sizes = <0 0x40000000 0 0x40000000>;
136 dma-ranges = <0x43000000 0x00000000 0x00000000 0x00000000 0x0 0x10000000
137 0x43000000 0x00000000 0x10000000 0x20000000 0x0 0x30000000
138 0x43000000 0x00000000 0x40000000 0x90000000 0x0 0x40000000>;
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| D | bcm97425svmb.dts | 11 memory@0 {
13 reg = <0x00000000 0x10000000>,
14 <0x20000000 0x30000000>,
15 <0x90000000 0x40000000>;
119 flash@0 {
121 reg = <0>;
133 flash0.cfe@0 {
134 reg = <0x0 0x200000>;
138 reg = <0x200000 0x40000>;
142 reg = <0x240000 0x10000>;
[all …]
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| /Linux-v6.6/Documentation/devicetree/bindings/arm/stm32/ |
| D | st,mlahb.yaml | 61 reg = <0x10000000 0x40000>;
63 dma-ranges = <0x00000000 0x38000000 0x10000>,
64 <0x10000000 0x10000000 0x60000>,
65 <0x30000000 0x30000000 0x60000>;
68 reg = <0x10000000 0x40000>;
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| /Linux-v6.6/arch/arm/boot/dts/st/ |
| D | spear300.dtsi | 15 ranges = <0x60000000 0x60000000 0x50000000
16 0xd0000000 0xd0000000 0x30000000>;
20 reg = <0x99000000 0x1000>;
25 reg = <0x60000000 0x1000>;
34 reg = <0x94000000 0x1000 /* FSMC Register */
35 0x80000000 0x0010 /* NAND Base DATA */
36 0x80020000 0x0010 /* NAND Base ADDR */
37 0x80010000 0x0010>; /* NAND Base CMD */
44 reg = <0x70000000 0x100>;
51 reg = <0x50000000 0x1000>;
[all …]
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| D | spear310.dtsi | 15 ranges = <0x40000000 0x40000000 0x10000000
16 0xb0000000 0xb0000000 0x10000000
17 0xd0000000 0xd0000000 0x30000000>;
21 reg = <0xb4000000 0x1000>;
29 reg = <0x44000000 0x1000 /* FSMC Register */
30 0x40000000 0x0010 /* NAND Base DATA */
31 0x40020000 0x0010 /* NAND Base ADDR */
32 0x40010000 0x0010>; /* NAND Base CMD */
39 reg = <0xb4000000 0x1000>;
49 ranges = <0xb0000000 0xb0000000 0x10000000
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| D | spear3xx.dtsi | 14 #address-cells = <0>;
15 #size-cells = <0>;
25 reg = <0 0x40000000>;
32 ranges = <0xd0000000 0xd0000000 0x30000000>;
37 reg = <0xf1100000 0x1000>;
43 reg = <0xfc400000 0x1000>;
51 reg = <0xe0800000 0x8000>;
62 reg = <0xfc000000 0x1000>;
69 reg = <0xd0100000 0x1000>;
72 #size-cells = <0>;
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| D | spear320.dtsi | 15 ranges = <0x40000000 0x40000000 0x80000000
16 0xd0000000 0xd0000000 0x30000000>;
20 reg = <0xb3000000 0x1000>;
26 reg = <0x90000000 0x1000>;
36 reg = <0x4c000000 0x1000 /* FSMC Register */
37 0x50000000 0x0010 /* NAND Base DATA */
38 0x50020000 0x0010 /* NAND Base ADDR */
39 0x50010000 0x0010>; /* NAND Base CMD */
46 reg = <0x70000000 0x100>;
54 reg = <0xb3000000 0x1000>;
[all …]
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| /Linux-v6.6/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/ |
| D | phytbl_lcn.c | 10 0x00000000,
11 0x00000000,
12 0x00000000,
13 0x00000000,
14 0x00000000,
15 0x00000000,
16 0x00000000,
17 0x00000000,
18 0x00000004,
19 0x00000000,
[all …]
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| /Linux-v6.6/Documentation/devicetree/bindings/pci/ |
| D | rcar-pci-host.yaml | 103 reg = <0 0xfe000000 0 0x80000>;
106 bus-range = <0x00 0xff>;
108 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
109 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
110 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
111 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
112 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>,
113 <0x42000000 2 0x00000000 2 0x00000000 0 0x40000000>;
118 interrupt-map-mask = <0 0 0 0>;
119 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
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| /Linux-v6.6/arch/arm64/boot/dts/ti/ |
| D | k3-am64.dtsi | 53 ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
54 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
55 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
56 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
57 <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
58 <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
59 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
60 <0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */
61 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x00000100>, /* Main RTI0 */
62 <0x00 0x0e010000 0x00 0x0e010000 0x00 0x00000100>, /* Main RTI1 */
[all …]
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| /Linux-v6.6/arch/powerpc/include/asm/ |
| D | reg_booke.h | 26 #define MSR_CM_LG 31 /* Computation Mode (0=32-bit, 1=64-bit) */
54 #define SPRN_DECAR 0x036 /* Decrementer Auto Reload Register */
55 #define SPRN_IVPR 0x03F /* Interrupt Vector Prefix Register */
56 #define SPRN_USPRG0 0x100 /* User Special Purpose Register General 0 */
57 #define SPRN_SPRG3R 0x103 /* Special Purpose Register General 3 Read */
58 #define SPRN_SPRG4R 0x104 /* Special Purpose Register General 4 Read */
59 #define SPRN_SPRG5R 0x105 /* Special Purpose Register General 5 Read */
60 #define SPRN_SPRG6R 0x106 /* Special Purpose Register General 6 Read */
61 #define SPRN_SPRG7R 0x107 /* Special Purpose Register General 7 Read */
62 #define SPRN_SPRG4W 0x114 /* Special Purpose Register General 4 Write */
[all …]
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| /Linux-v6.6/arch/sh/include/mach-se/mach/ |
| D | se7206.h | 5 #define PA_SMSC 0x30000000
6 #define PA_MRSHPC 0x34000000
7 #define PA_LED 0x31400000
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| /Linux-v6.6/Documentation/devicetree/bindings/remoteproc/ |
| D | st,stm32-rproc.yaml | 168 reg = <0x10000000 0x40000>,
169 <0x30000000 0x40000>,
170 <0x38000000 0x10000>;
174 st,syscfg-holdboot = <&rcc 0x10C 0x1>;
175 st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>;
176 st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>;
182 reg = <0x10000000 0x40000>,
183 <0x30000000 0x40000>,
184 <0x38000000 0x10000>;
188 st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>;
[all …]
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| /Linux-v6.6/drivers/gpu/drm/msm/ |
| D | msm_mdss.h | 11 /* can be read from register 0x58 */
19 #define UBWC_1_0 0x10000000
20 #define UBWC_2_0 0x20000000
21 #define UBWC_3_0 0x30000000
22 #define UBWC_4_0 0x40000000
23 #define UBWC_4_3 0x40030000
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| /Linux-v6.6/drivers/net/ethernet/broadcom/ |
| D | bgmac.h | 9 #define BGMAC_DEV_CTL 0x000
10 #define BGMAC_DC_TSM 0x00000002
11 #define BGMAC_DC_CFCO 0x00000004
12 #define BGMAC_DC_RLSS 0x00000008
13 #define BGMAC_DC_MROR 0x00000010
14 #define BGMAC_DC_FCM_MASK 0x00000060
16 #define BGMAC_DC_NAE 0x00000080
17 #define BGMAC_DC_TF 0x00000100
18 #define BGMAC_DC_RDS_MASK 0x00030000
20 #define BGMAC_DC_TDS_MASK 0x000c0000
[all …]
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| /Linux-v6.6/Documentation/devicetree/bindings/ata/ |
| D | atmel-at91_cf.txt | 8 optional and may be set to 0 if not present.
13 reg = <0x50000000 0x30000000>;
14 gpios = <&pioC 13 0 /* irq */
15 &pioC 15 0 /* detect */
16 0 /* vcc */
17 &pioC 5 0 /* reset */
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| /Linux-v6.6/include/video/ |
| D | tgafb.h | 20 #define TGA_TYPE_8PLANE 0
28 #define TGA_ROM_OFFSET 0x0000000
29 #define TGA_REGS_OFFSET 0x0100000
30 #define TGA_8PLANE_FB_OFFSET 0x0200000
31 #define TGA_24PLANE_FB_OFFSET 0x0804000
32 #define TGA_24PLUSZ_FB_OFFSET 0x1004000
34 #define TGA_FOREGROUND_REG 0x0020
35 #define TGA_BACKGROUND_REG 0x0024
36 #define TGA_PLANEMASK_REG 0x0028
37 #define TGA_PIXELMASK_ONESHOT_REG 0x002c
[all …]
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| /Linux-v6.6/Documentation/devicetree/bindings/firmware/ |
| D | nvidia,tegra186-bpmp.yaml | 147 reg = <0x03c00000 0xa0000>;
155 reg = <0x30000000 0x50000>;
158 ranges = <0x0 0x30000000 0x50000>;
161 reg = <0x4e000 0x1000>;
167 reg = <0x4f000 0x1000>;
191 #size-cells = <0>;
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| /Linux-v6.6/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| D | gt215.c | 46 u32 sctl = nvkm_rd32(device, 0x4120 + (idx * 4)); in read_vco()
48 switch (sctl & 0x00000030) { in read_vco()
49 case 0x00000000: in read_vco()
51 case 0x00000020: in read_vco()
52 return read_pll(clk, 0x41, 0x00e820); in read_vco()
53 case 0x00000030: in read_vco()
54 return read_pll(clk, 0x42, 0x00e8a0); in read_vco()
56 return 0; in read_vco()
66 /* refclk for the 0xe8xx plls is a fixed frequency */ in read_clk()
67 if (idx >= 0x40) { in read_clk()
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