Searched +full:0 +full:x25c00 (Results 1 – 5 of 5) sorted by relevance
19 The K3 SoCs containing ICSSG v1.0 (eg: AM65x SR1.0) also have two Auxiliary21 containing the revised ICSSG v1.1 (eg: J721E, AM65x SR2.0) have an extra two46 - ti,am654-tx-pru # for Tx_PRUs in K3 AM65x SR2.0 SoCs79 pattern: "^rtu@[0-9a-f]+$"91 pattern: "^txpru@[0-9a-f]+"95 pattern: "^pru@[0-9a-f]+$"108 pruss_tm: target-module@300000 { /* 0x4a300000, ap 9 04.0 */112 ranges = <0x0 0x300000 0x80000>;114 pruss: pruss@0 {116 reg = <0x0 0x80000>;[all …]
12 reg = <0x0 0x70000000 0x0 0x200000>;15 ranges = <0x0 0x0 0x70000000 0x200000>;17 atf-sram@0 {18 reg = <0x0 0x20000>;22 reg = <0xf0000 0x10000>;26 reg = <0x100000 0x100000>;37 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */38 <0x00 0x01880000 0x00 0x90000>, /* GICR */39 <0x00 0x6f000000 0x00 0x2000>, /* GICC */40 <0x00 0x6f010000 0x00 0x1000>, /* GICH */[all …]
13 #clock-cells = <0>;15 clock-frequency = <0>;22 reg = <0x00 0x70000000 0x00 0x200000>;25 ranges = <0x0 0x00 0x70000000 0x200000>;28 reg = <0x1c0000 0x20000>;32 reg = <0x1e0000 0x1c000>;36 reg = <0x1fc000 0x4000>;42 reg = <0x0 0x43000000 0x0 0x20000>;45 ranges = <0x0 0x0 0x43000000 0x20000>;50 mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */[all …]
14 #clock-cells = <0>;16 clock-frequency = <0>;20 #clock-cells = <0>;22 clock-frequency = <0>;29 reg = <0x0 0x70000000 0x0 0x800000>;32 ranges = <0x0 0x0 0x70000000 0x800000>;34 atf-sram@0 {35 reg = <0x0 0x20000>;41 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */44 ranges = <0x0 0x0 0x00100000 0x1c000>;[all …]
54 #size-cells = <0>;56 cpu0: cpu@0 {60 reg = <0x0>;68 secondary-boot-reg = <0xffff0fec>;69 reg = <0x1>;82 ranges = <0x00000000 0x19000000 0x00023000>;86 a9pll: arm_clk@0 {87 #clock-cells = <0>;90 reg = <0x00000 0x1000>;95 reg = <0x20200 0x100>;[all …]
