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/Linux-v6.1/drivers/reset/
Dreset-uniphier.c20 #define UNIPHIER_RESET_ACTIVE_LOW BIT(0)
45 UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */
46 UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (Ether, HSC, MIO) */
51 UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */
52 UNIPHIER_RESETX(6, 0x2000, 12), /* Ether */
53 UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (HSC, MIO, RLE) */
54 UNIPHIER_RESETX(12, 0x2000, 6), /* GIO (Ether, SATA, USB3) */
55 UNIPHIER_RESETX(14, 0x2000, 17), /* USB30 */
56 UNIPHIER_RESETX(15, 0x2004, 17), /* USB31 */
57 UNIPHIER_RESETX(28, 0x2000, 18), /* SATA0 */
[all …]
/Linux-v6.1/drivers/usb/serial/
Dpl2303.h6 #define BENQ_VENDOR_ID 0x04a5
7 #define BENQ_PRODUCT_ID_S81 0x4027
9 #define PL2303_VENDOR_ID 0x067b
10 #define PL2303_PRODUCT_ID 0x2303
11 #define PL2303_PRODUCT_ID_TB 0x2304
12 #define PL2303_PRODUCT_ID_GC 0x23a3
13 #define PL2303_PRODUCT_ID_GB 0x23b3
14 #define PL2303_PRODUCT_ID_GT 0x23c3
15 #define PL2303_PRODUCT_ID_GL 0x23d3
16 #define PL2303_PRODUCT_ID_GE 0x23e3
[all …]
/Linux-v6.1/drivers/net/wireless/realtek/rtw89/
Drtw8852a_rfk_table.c8 RTW89_DECL_RFK_WM(0x12a8, 0x00000001, 0x00000001),
9 RTW89_DECL_RFK_WM(0x12a8, 0x0000000e, 0x00000002),
10 RTW89_DECL_RFK_WM(0x32a8, 0x00000001, 0x00000001),
11 RTW89_DECL_RFK_WM(0x32a8, 0x0000000e, 0x00000002),
12 RTW89_DECL_RFK_WM(0x12bc, 0x000000f0, 0x00000005),
13 RTW89_DECL_RFK_WM(0x12bc, 0x00000f00, 0x00000005),
14 RTW89_DECL_RFK_WM(0x12bc, 0x000f0000, 0x00000005),
15 RTW89_DECL_RFK_WM(0x12bc, 0x0000f000, 0x00000005),
16 RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x00000033),
17 RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000033),
[all …]
/Linux-v6.1/sound/soc/codecs/
Drt5514.h15 #define RT5514_DEVICE_ID 0x10ec5514
17 #define RT5514_RESET 0x2000
18 #define RT5514_PWR_ANA1 0x2004
19 #define RT5514_PWR_ANA2 0x2008
20 #define RT5514_I2S_CTRL1 0x2010
21 #define RT5514_I2S_CTRL2 0x2014
22 #define RT5514_VAD_CTRL6 0x2030
23 #define RT5514_EXT_VAD_CTRL 0x206c
24 #define RT5514_DIG_IO_CTRL 0x2070
25 #define RT5514_PAD_CTRL1 0x2080
[all …]
Dmax98373.h7 #define MAX98373_R2000_SW_RESET 0x2000
8 #define MAX98373_R2001_INT_RAW1 0x2001
9 #define MAX98373_R2002_INT_RAW2 0x2002
10 #define MAX98373_R2003_INT_RAW3 0x2003
11 #define MAX98373_R2004_INT_STATE1 0x2004
12 #define MAX98373_R2005_INT_STATE2 0x2005
13 #define MAX98373_R2006_INT_STATE3 0x2006
14 #define MAX98373_R2007_INT_FLAG1 0x2007
15 #define MAX98373_R2008_INT_FLAG2 0x2008
16 #define MAX98373_R2009_INT_FLAG3 0x2009
[all …]
/Linux-v6.1/drivers/clk/samsung/
Dclk-exynos5260.h15 #define MUX_SEL_AUD 0x0200
16 #define MUX_ENABLE_AUD 0x0300
17 #define MUX_STAT_AUD 0x0400
18 #define MUX_IGNORE_AUD 0x0500
19 #define DIV_AUD0 0x0600
20 #define DIV_AUD1 0x0604
21 #define DIV_STAT_AUD0 0x0700
22 #define DIV_STAT_AUD1 0x0704
23 #define EN_ACLK_AUD 0x0800
24 #define EN_PCLK_AUD 0x0900
[all …]
Dclk-fsd.c25 /* Register Offset definitions for CMU_CMU (0x11c10000) */
26 #define PLL_LOCKTIME_PLL_SHARED0 0x0
27 #define PLL_LOCKTIME_PLL_SHARED1 0x4
28 #define PLL_LOCKTIME_PLL_SHARED2 0x8
29 #define PLL_LOCKTIME_PLL_SHARED3 0xc
30 #define PLL_CON0_PLL_SHARED0 0x100
31 #define PLL_CON0_PLL_SHARED1 0x120
32 #define PLL_CON0_PLL_SHARED2 0x140
33 #define PLL_CON0_PLL_SHARED3 0x160
34 #define MUX_CMU_CIS0_CLKMUX 0x1000
[all …]
/Linux-v6.1/sound/soc/amd/acp/
Dchip_offset_byte.h14 #define ACPAXI2AXI_ATU_CTRL 0xC40
15 #define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_5 0xC20
16 #define ACPAXI2AXI_ATU_BASE_ADDR_GRP_5 0xC24
18 #define ACP_PGFSM_CONTROL 0x141C
19 #define ACP_PGFSM_STATUS 0x1420
20 #define ACP_SOFT_RESET 0x1000
21 #define ACP_CONTROL 0x1004
24 (adata->acp_base + adata->rsrc->irq_reg_offset + offset + (ctrl * 0x04))
26 #define ACP_EXTERNAL_INTR_ENB(adata) ACP_EXTERNAL_INTR_REG_ADDR(adata, 0x0, 0x0)
27 #define ACP_EXTERNAL_INTR_CNTL(adata, ctrl) ACP_EXTERNAL_INTR_REG_ADDR(adata, 0x4, ctrl)
[all …]
/Linux-v6.1/drivers/media/platform/qcom/venus/
Dhfi_venus_io.h9 #define VBIF_BASE 0x80000
11 #define VBIF_AXI_HALT_CTRL0 0x208
12 #define VBIF_AXI_HALT_CTRL1 0x20c
14 #define VBIF_AXI_HALT_CTRL0_HALT_REQ BIT(0)
15 #define VBIF_AXI_HALT_CTRL1_HALT_ACK BIT(0)
18 #define CPU_BASE 0xc0000
20 #define CPU_CS_BASE (CPU_BASE + 0x12000)
21 #define CPU_IC_BASE (CPU_BASE + 0x1f000)
22 #define CPU_BASE_V6 0xa0000
24 #define CPU_IC_BASE_V6 (CPU_BASE_V6 + 0x138)
[all …]
/Linux-v6.1/drivers/net/wwan/t7xx/
Dt7xx_port.h34 #define PORT_CH_ID_MASK GENMASK(7, 0)
37 * The channel number consists of peer_id(15:12) , channel_id(11:0)
39 * 0:reserved, 1: to sAP, 2: to MD
43 PORT_CH_CONTROL_RX = 0x2000,
44 PORT_CH_CONTROL_TX = 0x2001,
45 PORT_CH_UART1_RX = 0x2006, /* META */
46 PORT_CH_UART1_TX = 0x2008,
47 PORT_CH_UART2_RX = 0x200a, /* AT */
48 PORT_CH_UART2_TX = 0x200c,
49 PORT_CH_MD_LOG_RX = 0x202a, /* MD logging */
[all …]
/Linux-v6.1/drivers/media/platform/samsung/s5p-mfc/
Dregs-mfc.h20 #define S5P_FIMV_START_ADDR 0x0000
21 #define S5P_FIMV_END_ADDR 0xe008
23 #define S5P_FIMV_SW_RESET 0x0000
24 #define S5P_FIMV_RISC_HOST_INT 0x0008
27 #define S5P_FIMV_HOST2RISC_CMD 0x0030
28 #define S5P_FIMV_HOST2RISC_ARG1 0x0034
29 #define S5P_FIMV_HOST2RISC_ARG2 0x0038
30 #define S5P_FIMV_HOST2RISC_ARG3 0x003c
31 #define S5P_FIMV_HOST2RISC_ARG4 0x0040
34 #define S5P_FIMV_RISC2HOST_CMD 0x0044
[all …]
/Linux-v6.1/drivers/clk/qcom/
Ddispcc-qcm2290.c40 .l = 0x28,
41 .alpha = 0x0,
43 .vco_val = 0x2 << 20,
45 .main_output_mask = BIT(0),
46 .config_ctl_val = 0x4001055B,
50 .offset = 0x0,
67 { P_BI_TCXO, 0 },
78 { P_BI_TCXO, 0 },
87 { P_BI_TCXO, 0 },
98 { P_BI_TCXO, 0 },
[all …]
Ddispcc-sm6115.c50 .l = 0x28,
51 .alpha = 0x0,
53 .vco_val = 0x2 << 20,
55 .main_output_mask = BIT(0),
56 .config_ctl_val = 0x4001055B,
60 .offset = 0x0,
75 { 0x0, 1 },
79 .offset = 0x0,
97 { P_BI_TCXO, 0 },
107 { P_BI_TCXO, 0 },
[all …]
/Linux-v6.1/include/uapi/linux/
Dmedia-bus-format.h16 * These bus formats uniquely identify data formats on the data bus. Format 0
35 #define MEDIA_BUS_FMT_FIXED 0x0001
37 /* RGB - next is 0x1022 */
38 #define MEDIA_BUS_FMT_RGB444_1X12 0x1016
39 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001
40 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002
41 #define MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE 0x1003
42 #define MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE 0x1004
43 #define MEDIA_BUS_FMT_RGB565_1X16 0x1017
44 #define MEDIA_BUS_FMT_BGR565_2X8_BE 0x1005
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/display/msm/
Ddpu-msm8998.yaml62 "^display-controller@[0-9a-f]+$":
121 port@0:
130 - port@0
164 reg = <0x0c900000 0x1000>;
178 iommus = <&mmss_smmu 0>;
185 reg = <0x0c901000 0x8f000>,
186 <0x0c9a8e00 0xf0>,
187 <0x0c9b0000 0x2008>,
188 <0x0c9b8000 0x1040>;
199 interrupts = <0>;
[all …]
Ddpu-sdm845.yaml65 "^display-controller@[0-9a-f]+$":
118 port@0:
127 - port@0
164 reg = <0x0ae00000 0x1000>;
176 iommus = <&apps_smmu 0x880 0x8>,
177 <&apps_smmu 0xc80 0x8>;
182 reg = <0x0ae01000 0x8f000>,
183 <0x0aeb0000 0x2008>;
193 interrupts = <0>;
199 #size-cells = <0>;
[all …]
Ddpu-qcm2290.yaml74 "^display-controller@[0-9a-f]+$":
129 port@0:
134 - port@0
171 reg = <0x05e00000 0x1000>;
186 iommus = <&apps_smmu 0x420 0x2>,
187 <&apps_smmu 0x421 0x0>;
192 reg = <0x05e01000 0x8f000>,
193 <0x05eb0000 0x2008>;
207 interrupts = <0>;
211 #size-cells = <0>;
[all …]
Ddpu-sc7180.yaml73 "^display-controller@[0-9a-f]+$":
130 port@0:
139 - port@0
176 reg = <0xae00000 0x1000>;
191 iommus = <&apps_smmu 0x800 0x2>;
196 reg = <0x0ae01000 0x8f000>,
197 <0x0aeb0000 0x2008>;
211 interrupts = <0>;
217 #size-cells = <0>;
219 port@0 {
[all …]
Ddpu-sc7280.yaml72 "^display-controller@[0-9a-f]+$":
128 port@0:
137 - port@0
174 reg = <0xae00000 0x1000>;
191 iommus = <&apps_smmu 0x900 0x402>;
196 reg = <0x0ae01000 0x8f000>,
197 <0x0aeb0000 0x2008>;
215 interrupts = <0>;
221 #size-cells = <0>;
223 port@0 {
[all …]
/Linux-v6.1/include/linux/mfd/mt6359p/
Dregisters.h9 #define MT6359P_CHIP_VER 0x5930
12 #define MT6359P_HWCID 0x8
13 #define MT6359P_TOP_TRAP 0x50
14 #define MT6359P_TOP_TMA_KEY 0x3a8
15 #define MT6359P_BUCK_VCORE_ELR_NUM 0x152a
16 #define MT6359P_BUCK_VCORE_ELR0 0x152c
17 #define MT6359P_BUCK_VGPU11_SSHUB_CON0 0x15aa
18 #define MT6359P_BUCK_VGPU11_ELR0 0x15b4
19 #define MT6359P_LDO_VSRAM_PROC1_ELR 0x1b44
20 #define MT6359P_LDO_VSRAM_PROC2_ELR 0x1b46
[all …]
/Linux-v6.1/drivers/mfd/
Dsi476x-prop.c25 for (i = 0; i < size; i++) in si476x_core_element_is_in_array()
38 for (i = 0; i < size; i++) in si476x_core_element_is_in_range()
49 0x0000, in si476x_core_is_valid_property_a10()
50 0x0500, 0x0501, in si476x_core_is_valid_property_a10()
51 0x0600, in si476x_core_is_valid_property_a10()
52 0x0709, 0x070C, 0x070D, 0x70E, 0x710, in si476x_core_is_valid_property_a10()
53 0x0718, in si476x_core_is_valid_property_a10()
54 0x1207, 0x1208, in si476x_core_is_valid_property_a10()
55 0x2007, in si476x_core_is_valid_property_a10()
56 0x2300, in si476x_core_is_valid_property_a10()
[all …]
/Linux-v6.1/arch/loongarch/include/asm/
Dloongson.h20 #define LOONGSON_LIO_BASE 0x18000000
21 #define LOONGSON_LIO_SIZE 0x00100000 /* 1M */
24 #define LOONGSON_BOOT_BASE 0x1c000000
25 #define LOONGSON_BOOT_SIZE 0x02000000 /* 32M */
28 #define LOONGSON_REG_BASE 0x1fe00000
29 #define LOONGSON_REG_SIZE 0x00100000 /* 1M */
34 #define LOONGSON_GPIODATA LOONGSON_REG(0x11c)
35 #define LOONGSON_GPIOIE LOONGSON_REG(0x120)
36 #define LOONGSON_REG_GPIO_BASE (LOONGSON_REG_BASE + 0x11c)
46 " st.w %[v], %[hw], 0 \n" in xconf_writel()
[all …]
/Linux-v6.1/include/scsi/
Dscsi.h26 #define SCSI_MAX_PROT_SG_SEGMENTS 0xFFFF
32 #define SCAN_WILD_CARD ~0
56 #define SCSI_W_LUN_BASE 0xc100
63 return (lun & 0xff00) == SCSI_W_LUN_BASE; in scsi_is_wlun()
76 if (status < 0) in scsi_status_is_check_condition()
78 status &= 0xfe; in scsi_status_is_check_condition()
85 #define EXTENDED_MODIFY_DATA_POINTER 0x00
86 #define EXTENDED_SDTR 0x01
87 #define EXTENDED_EXTENDED_IDENTIFY 0x02 /* SCSI-I only */
88 #define EXTENDED_WDTR 0x03
[all …]
/Linux-v6.1/include/linux/soc/samsung/
Dexynos-regs-pmu.h17 #define S5P_CENTRAL_SEQ_CONFIGURATION 0x0200
21 #define S5P_CENTRAL_SEQ_OPTION 0x0208
42 #define EXYNOS_SWRESET 0x0400
44 #define S5P_WAKEUP_STAT 0x0600
46 #define EXYNOS_EINT_WAKEUP_MASK_DISABLED 0xffffffff
47 #define EXYNOS_EINT_WAKEUP_MASK 0x0604
48 #define S5P_WAKEUP_MASK 0x0608
49 #define S5P_WAKEUP_MASK2 0x0614
52 #define EXYNOS4_MIPI_PHY_CONTROL(n) (0x0710 + (n) * 4)
54 #define EXYNOS4_PHY_ENABLE (1 << 0)
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/
Dmetrics.json31 "MetricExpr": "armv8_pmuv3_0@event\\=0x201d@ / CPU_CYCLES",
45 … "MetricExpr": "(bad_speculation * BR_MIS_PRED) / (BR_MIS_PRED + armv8_pmuv3_0@event\\=0x2013@)",
59 …"MetricExpr": "(EXE_STALL_CYCLE - (MEM_STALL_ANYLOAD + armv8_pmuv3_0@event\\=0x7005@)) / CPU_CYCLE…
66 "MetricExpr": "(MEM_STALL_ANYLOAD + armv8_pmuv3_0@event\\=0x7005@) / CPU_CYCLES",
94 "MetricExpr": "(armv8_pmuv3_0@event\\=0x2013@ * 5) / CPU_CYCLES",
101 "MetricExpr": "(armv8_pmuv3_0@event\\=0x1001@ * 5) / CPU_CYCLES",
108 "MetricExpr": "armv8_pmuv3_0@event\\=0x1010@ / BR_MIS_PRED",
115 … "MetricExpr": "(armv8_pmuv3_0@event\\=0x1013@ + armv8_pmuv3_0@event\\=0x1016@) / BR_MIS_PRED",
122 "MetricExpr": "armv8_pmuv3_0@event\\=0x100d@ / BR_MIS_PRED",
129 …RED - armv8_pmuv3_0@event\\=0x1010@ - armv8_pmuv3_0@event\\=0x1013@ - armv8_pmuv3_0@event\\=0x1016…
[all …]

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