Searched +full:0 +full:x20000000 (Results 1 – 25 of 1170) sorted by relevance
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30 size = <0 0x1000000>;31 alignment = <0 0x1000000>;34 size = <0 0x400000>;35 alignment = <0 0x400000>;38 size = <0 0x2000000>;39 alignment = <0 0x2000000>;44 ranges = <0x00000000 0xf 0x00000000 0x01008000>;48 ranges = <0x0 0xf 0xf4000000 0x200000>;52 ranges = <0x0 0xf 0xf4200000 0x200000>;56 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;[all …]
19 reg = <0xf 0xffe05000 0 0x1000>;21 ranges = <0x0 0x0 0xf 0xe8000000 0x0800000022 0x1 0x0 0xf 0xe0000000 0x0800000023 0x2 0x0 0xf 0xffa00000 0x0004000024 0x3 0x0 0xf 0xffdf0000 0x0000800025 0x4 0x0 0xf 0xffa40000 0x0004000026 0x5 0x0 0xf 0xffa80000 0x0004000027 0x6 0x0 0xf 0xffac0000 0x00040000>;31 ranges = <0x0 0xf 0xffe00000 0x100000>;35 reg = <0xf 0xffe08000 0 0x1000>;[all …]
45 ranges = <0x0 0x0 0xf 0xe8000000 0x0800000046 0x1 0x0 0xf 0xe0000000 0x0800000047 0x2 0x0 0xf 0xff800000 0x0004000048 0x3 0x0 0xf 0xffdf0000 0x00008000>;49 reg = <0xf 0xffe05000 0 0x1000>;53 ranges = <0x0 0xf 0xffe00000 0x100000>;57 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x2000000058 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;59 reg = <0xf 0xffe09000 0 0x1000>;60 pcie@0 {[all …]
19 reg = <0 0xffe05000 0 0x1000>;21 ranges = <0x0 0x0 0x0 0xe8000000 0x0800000022 0x1 0x0 0x0 0xe0000000 0x0800000023 0x2 0x0 0x0 0xffa00000 0x0004000024 0x3 0x0 0x0 0xffdf0000 0x0000800025 0x4 0x0 0x0 0xffa40000 0x0004000026 0x5 0x0 0x0 0xffa80000 0x0004000027 0x6 0x0 0x0 0xffac0000 0x00040000>;31 ranges = <0x0 0 0xffe00000 0x100000>;35 reg = <0 0xffe08000 0 0x1000>;[all …]
19 ranges = <0x0 0x0 0x0 0xe8000000 0x0800000020 0x1 0x0 0x0 0xe0000000 0x0800000021 0x2 0x0 0x0 0xffa00000 0x0004000022 0x3 0x0 0x0 0xffdf0000 0x0000800023 0x4 0x0 0x0 0xffa40000 0x0004000024 0x5 0x0 0x0 0xffa80000 0x0004000025 0x6 0x0 0x0 0xffac0000 0x00040000>;26 reg = <0 0xffe05000 0 0x1000>;30 ranges = <0x0 0x0 0xffe00000 0x100000>;34 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000[all …]
18 reg = <0xf 0xffe05000 0 0x1000>;21 ranges = <0x0 0x0 0xf 0xef000000 0x0100000022 0x1 0x0 0xf 0xffa00000 0x0004000023 0x2 0x0 0xf 0xffb00000 0x00020000>;27 ranges = <0x0 0xf 0xffe00000 0x100000>;31 reg = <0xf 0xffe09000 0 0x1000>;32 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x2000000033 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;34 pcie@0 {35 ranges = <0x2000000 0x0 0xc0000000[all …]
41 ranges = <0x0 0x0 0xf 0xee000000 0x0200000042 0x1 0x0 0xf 0xff800000 0x0001000043 0x3 0x0 0xf 0xffb00000 0x00000020>;44 reg = <0xf 0xffe1e000 0 0x2000>;48 ranges = <0x0 0xf 0xffe00000 0x100000>;52 reg = <0xf 0xffe09000 0 0x1000>;53 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x2000000054 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;55 pcie@0 {56 ranges = <0x2000000 0x0 0xc0000000[all …]
45 ranges = <0x0 0x0 0x0 0xe8000000 0x0800000046 0x1 0x0 0x0 0xe0000000 0x0800000047 0x2 0x0 0x0 0xff800000 0x0004000048 0x3 0x0 0x0 0xffdf0000 0x00008000>;49 reg = <0x0 0xffe05000 0 0x1000>;53 ranges = <0x0 0x0 0xffe00000 0x100000>;57 ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x2000000058 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;59 reg = <0x0 0xffe09000 0 0x1000>;60 pcie@0 {[all …]
56 reg = <0xf 0xfe124000 0 0x2000>;57 ranges = <0 0 0xf 0xe8000000 0x0800000058 2 0 0xf 0xff800000 0x0001000059 3 0 0xf 0xffdf0000 0x00008000>;61 nor@0,0 {65 reg = <0x0 0x0 0x8000000>;71 nand@2,0 {75 reg = <0x2 0x0 0x10000>;89 size = <0 0x1000000>;90 alignment = <0 0x1000000>;[all …]
68 size = <0 0x1000000>;69 alignment = <0 0x1000000>;72 size = <0 0x400000>;73 alignment = <0 0x400000>;76 size = <0 0x2000000>;77 alignment = <0 0x2000000>;82 ranges = <0x00000000 0xf 0x00000000 0x01008000>;86 ranges = <0x0 0xf 0xf4000000 0x200000>;90 ranges = <0x0 0xf 0xf4200000 0x200000>;94 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;[all …]
45 reg = <0xf 0xffe05000 0 0x1000>;46 ranges = <0x0 0x0 0xf 0xef000000 0x0100000047 0x1 0x0 0xf 0xff800000 0x00040000>;51 ranges = <0x0 0xf 0xffe00000 0x100000>;55 reg = <0xf 0xffe09000 0 0x1000>;56 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x2000000057 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;58 pcie@0 {59 ranges = <0x2000000 0x0 0xe000000060 0x2000000 0x0 0xe0000000[all …]
18 reg = <0 0xffe05000 0 0x1000>;21 ranges = <0x0 0x0 0x0 0xef000000 0x0100000022 0x1 0x0 0x0 0xffa00000 0x0004000023 0x2 0x0 0x0 0xffb00000 0x00020000>;27 ranges = <0x0 0x0 0xffe00000 0x100000>;31 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x2000000032 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;33 reg = <0 0xffe09000 0 0x1000>;34 pcie@0 {35 ranges = <0x2000000 0x0 0xa0000000[all …]
45 reg = <0xf 0xffe05000 0 0x1000>;48 ranges = <0x0 0x0 0xf 0xef000000 0x0100000049 0x1 0x0 0xf 0xff800000 0x0004000050 0x2 0x0 0xf 0xffb00000 0x00020000>;54 ranges = <0x0 0xf 0xffe00000 0x100000>;58 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x2000000059 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;60 reg = <0xf 0xffe09000 0 0x1000>;61 pcie@0 {62 ranges = <0x2000000 0x0 0xa0000000[all …]
46 reg = <0xf 0xffe05000 0 0x1000>;49 ranges = <0x0 0x0 0xf 0xef000000 0x0100000050 0x1 0x0 0xf 0xff800000 0x0004000051 0x2 0x0 0xf 0xffb00000 0x0002000052 0x3 0x0 0xf 0xffa00000 0x00020000>;56 ranges = <0x0 0xf 0xffe00000 0x100000>;60 reg = <0xf 0xffe08000 0 0x1000>;65 reg = <0xf 0xffe09000 0 0x1000>;66 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x2000000067 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;[all …]
45 reg = <0xf 0xffe05000 0 0x1000>;48 ranges = <0x0 0x0 0xf 0xef000000 0x0100000049 0x1 0x0 0xf 0xff800000 0x0004000050 0x2 0x0 0xf 0xffb00000 0x0004000051 0x3 0x0 0xf 0xffa00000 0x00020000>;55 ranges = <0x0 0xf 0xffe00000 0x100000>;59 reg = <0xf 0xffe09000 0 0x1000>;60 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x2000000061 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;62 pcie@0 {[all …]
45 reg = <0xf 0xffe05000 0x0 0x1000>;48 ranges = <0x0 0x0 0xf 0xec000000 0x0400000049 0x1 0x0 0xf 0xffa00000 0x0004000050 0x2 0x0 0xf 0xffb00000 0x00020000>;54 ranges = <0x0 0xf 0xffe00000 0x100000>;58 reg = <0xf 0xffe09000 0x0 0x1000>;59 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x2000000060 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;61 pcie@0 {62 ranges = <0x2000000 0x0 0xe0000000[all …]
45 reg = <0xf 0xffe05000 0x0 0x1000>;48 ranges = <0x0 0x0 0xf 0xec000000 0x0200000049 0x1 0x0 0xf 0xffa00000 0x0004000050 0x2 0x0 0xf 0xffb00000 0x00020000>;54 ranges = <0x0 0xf 0xffe00000 0x100000>;58 reg = <0xf 0xffe09000 0x0 0x1000>;59 ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x2000000060 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;61 pcie@0 {62 ranges = <0x2000000 0x0 0xe0000000[all …]
45 reg = <0xf 0xffe05000 0 0x1000>;48 ranges = <0x0 0x0 0xf 0xef000000 0x0100000049 0x1 0x0 0xf 0xff800000 0x00040000>;53 ranges = <0x0 0xf 0xffe00000 0x100000>;57 reg = <0xf 0xffe09000 0 0x1000>;58 ranges = <0x2000000 0x0 0xe0000000 0xe 0x20000000 0x0 0x2000000059 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;60 pcie@0 {61 ranges = <0x2000000 0x0 0xe000000062 0x2000000 0x0 0xe0000000[all …]
50 ranges = <0x0 0x0 0xffe00000 0x100000>;55 reg = <0x1a>;61 reg = <0x68>;65 reg = <0x4c>;69 reg = <0x21>;73 reg = <0x24>;77 reg = <0x26>;81 reg = <0x29>;86 flash@0 {90 reg = <0>;[all …]
67 size = <0 0x1000000>;68 alignment = <0 0x1000000>;71 size = <0 0x400000>;72 alignment = <0 0x400000>;75 size = <0 0x2000000>;76 alignment = <0 0x2000000>;81 ranges = <0x00000000 0xf 0x00000000 0x01008000>;85 ranges = <0x0 0xf 0xf4000000 0x200000>;89 ranges = <0x0 0xf 0xf4200000 0x200000>;93 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;[all …]
16 reg = <0 0 0x0 0x8000000>; // 128M at 0x020 reg = <0xf 0xe0005000 0 0x1000>;22 ranges = <0x0 0x0 0xf 0xff000000 0x0100000023 0x1 0x0 0xf 0xf8004000 0x00001000>;28 ranges = <0 0xf 0xe0000000 0x100000>;32 reg = <0xf 0xe0008000 0 0x1000>;33 ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x1000000034 0x1000000 0x0 0x00000000 0xf 0xe2000000 0x0 0x800000>;39 reg = <0xf 0xe0009000 0 0x1000>;40 ranges = <0x2000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000[all …]
30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in31 the reg property contained in bits 7 down to 049 this property is required and must be set to 0.52 required and matches the CPUID[11:0] register bits.54 Bits [11:0] in the reg cell must be set to55 bits [11:0] in CPU ID register.57 All other bits in the reg cell must be set to 0.60 required and matches the CPU MPIDR[23:0] register63 Bits [23:0] in the reg cell must be set to64 bits [23:0] in MPIDR.[all …]
87 (ie socket/cluster/core/thread) (where N = {0, 1, ...} is the node number; nodes89 sequential N value, starting from 0).187 #size-cells = <0>;276 CPU0: cpu@0 {279 reg = <0x0 0x0>;281 cpu-release-addr = <0 0x20000000>;287 reg = <0x0 0x1>;289 cpu-release-addr = <0 0x20000000>;295 reg = <0x0 0x100>;297 cpu-release-addr = <0 0x20000000>;[all …]
7 http://0x04.net/cgit/index.cgi/rules-ng-ng8 git clone git://0x04.net/rules-ng-ng43 #define PIPE_ID_PIPE_3D 0x0000000044 #define PIPE_ID_PIPE_2D 0x0000000145 #define SYNC_RECIPIENT_FE 0x0000000146 #define SYNC_RECIPIENT_RA 0x0000000547 #define SYNC_RECIPIENT_PE 0x0000000748 #define SYNC_RECIPIENT_DE 0x0000000b49 #define SYNC_RECIPIENT_BLT 0x0000001050 #define ENDIAN_MODE_NO_SWAP 0x00000000[all …]
