Searched +full:0 +full:x1a (Results 1 – 25 of 1018) sorted by relevance
12345678910>>...41
| /Linux-v6.6/Documentation/hwmon/ |
| D | adm1021.rst | 10 Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
18 Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
26 Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
34 Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
42 Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
50 Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
58 Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
66 Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
74 Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
82 Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
[all …]
|
| D | lm90.rst | 10 Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
18 Addresses scanned: I2C 0x4c
28 Addresses scanned: I2C 0x4c and 0x4d
38 Addresses scanned: I2C 0x4c and 0x4d
48 Addresses scanned: I2C 0x4c
58 Addresses scanned: I2C 0x4c - 0x4e
66 Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
74 Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
82 Addresses scanned: I2C 0x4c and 0x4d
92 Addresses scanned: I2C 0x4c and 0x4d
[all …]
|
| /Linux-v6.6/arch/arm/boot/dts/rockchip/ |
| D | rk3288-veyron-jerry.dts | 25 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
45 #size-cells = <0>;
52 0x01 0x00 0x06 0x00 0x08 0x02 0x89 0x01
53 0x24 0x00 0x67 0x09 0x14 0x01 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
54 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
55 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x02 0x00 0x0f
56 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
57 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
58 0x24 0x00 0x67 0x09 0x14 0x03 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
59 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
[all …]
|
| /Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/athub/ |
| D | athub_3_0_0_sh_mask.h | 29 …R_SRC_APRTR0__BASE_ADDR__SHIFT 0x0
30 …RTR0__BASE_ADDR_MASK 0x7FFFFFFFL
32 …R_SRC_APRTR1__BASE_ADDR__SHIFT 0x0
33 …RTR1__BASE_ADDR_MASK 0x7FFFFFFFL
35 …R_SRC_APRTR2__BASE_ADDR__SHIFT 0x0
36 …RTR2__BASE_ADDR_MASK 0x7FFFFFFFL
38 …R_SRC_APRTR3__BASE_ADDR__SHIFT 0x0
39 …RTR3__BASE_ADDR_MASK 0x7FFFFFFFL
41 …R_SRC_APRTR4__BASE_ADDR__SHIFT 0x0
42 …RTR4__BASE_ADDR_MASK 0x7FFFFFFFL
[all …]
|
| D | athub_1_0_sh_mask.h | 27 #define ATC_ATS_CNTL__DISABLE_ATC__SHIFT 0x0
28 #define ATC_ATS_CNTL__DISABLE_PRI__SHIFT 0x1
29 #define ATC_ATS_CNTL__DISABLE_PASID__SHIFT 0x2
30 #define ATC_ATS_CNTL__CREDITS_ATS_RPB__SHIFT 0x8
31 #define ATC_ATS_CNTL__INVALIDATION_LOG_KEEP_ORDER__SHIFT 0x14
32 #define ATC_ATS_CNTL__TRANS_LOG_KEEP_ORDER__SHIFT 0x15
33 #define ATC_ATS_CNTL__TRANS_EXE_RETURN__SHIFT 0x16
34 #define ATC_ATS_CNTL__DISABLE_ATC_MASK 0x00000001L
35 #define ATC_ATS_CNTL__DISABLE_PRI_MASK 0x00000002L
36 #define ATC_ATS_CNTL__DISABLE_PASID_MASK 0x00000004L
[all …]
|
| D | athub_2_1_0_sh_mask.h | 27 …ATS_MODE_CNTL__HOST_TRANS_ENABLE__SHIFT 0x0
28 …ATS_MODE_CNTL__CONSOLE_IOV_ENABLE__SHIFT 0x1
29 …_CNTL__HOST_TRANS_ENABLE_MASK 0x00000001L
30 …_CNTL__CONSOLE_IOV_ENABLE_MASK 0x00000002L
32 …SHARED_VIRT_RESET_REQ__VF__SHIFT 0x0
33 …HARED_VIRT_RESET_REQ__PF__SHIFT 0x1f
34 …IRT_RESET_REQ__VF_MASK 0x7FFFFFFFL
35 …IRT_RESET_REQ__PF_MASK 0x80000000L
37 …SHARED_ACTIVE_FCN_ID__VFID__SHIFT 0x0
38 …HARED_ACTIVE_FCN_ID__VF__SHIFT 0x1f
[all …]
|
| D | athub_1_8_0_sh_mask.h | 29 …S_CNTL__DISABLE_ATC__SHIFT 0x0
30 …S_CNTL__DISABLE_PRI__SHIFT 0x1
31 …S_CNTL__DISABLE_PASID__SHIFT 0x2
32 …S_CNTL__CREDITS_ATS_RPB__SHIFT 0x8
33 …_CNTL__DEBUG_ECO__SHIFT 0x10
34 …_CNTL__TRANS_EXE_RETURN__SHIFT 0x16
35 …DISABLE_ATC_MASK 0x00000001L
36 …DISABLE_PRI_MASK 0x00000002L
37 …DISABLE_PASID_MASK 0x00000004L
38 …CREDITS_ATS_RPB_MASK 0x00003F00L
[all …]
|
| D | athub_2_0_0_sh_mask.h | 27 …S_CNTL__DISABLE_ATC__SHIFT 0x0
28 …S_CNTL__DISABLE_PRI__SHIFT 0x1
29 …S_CNTL__DISABLE_PASID__SHIFT 0x2
30 …S_CNTL__CREDITS_ATS_RPB__SHIFT 0x8
31 …_CNTL__INVALIDATION_LOG_KEEP_ORDER__SHIFT 0x14
32 …_CNTL__TRANS_LOG_KEEP_ORDER__SHIFT 0x15
33 …_CNTL__TRANS_EXE_RETURN__SHIFT 0x16
34 …DISABLE_ATC_MASK 0x00000001L
35 …DISABLE_PRI_MASK 0x00000002L
36 …DISABLE_PASID_MASK 0x00000004L
[all …]
|
| /Linux-v6.6/crypto/ |
| D | testmgr.h | 33 * @ksize: Length of @key in bytes (0 if no key)
103 * @crypt_error: When @novrfy=0, the expected error from encrypt(). When
225 "\x9f\x6e\xbd\x4c\x55\x84\x0c\x9b\xcf\x1a\x4b\x51\x1e\x9e\x0c\x06",
256 "\x01\x99\xEB\x9F\x44\xAE\xF4\xFD\xA4\x93\xB8\x1A\x9E\x3D\x84\xF6"
289 "\x59\x89\xaf\xf0\xba\x44\xd7\xf1\x1a\x50\x72\xef\x5e\x4a\xb6\xb7"
301 "\xDB\x10\x1A\xC2\xA3\xF1\xDC\xFF\x13\x6B\xED\x44\xDF\xF0\x02\x6D"
304 "\x41\xE4\x25\x99\xAC\xFC\xD2\x0F\x02\xD3\xD1\x54\x06\x1A\x51\x77"
308 "\xB6\xF6\xBC\xCD\x49\x34\x3A\x8F\x26\x94\xE3\x28\x82\x1A\x7C\x8F"
309 "\x59\x9F\x45\xE8\x5D\x1A\x45\x76\x04\x56\x05\xA1\xD0\x1B\x8C\x77"
312 "\x61\xC3\x89\x55\xF0\xAE\x1A\x9C\x22\xEE\x19\x05\x8D\x32\xFE\xEC"
[all …]
|
| /Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/mmhub/ |
| D | mmhub_3_0_0_sh_mask.h | 29 …RDCLI0__VIRT_CHAN__SHIFT 0x0
30 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3
31 …RDCLI0__URG_HIGH__SHIFT 0x4
32 …RDCLI0__URG_LOW__SHIFT 0x8
33 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc
34 …RDCLI0__MAX_BW__SHIFT 0xd
35 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15
36 …DCLI0__MIN_BW__SHIFT 0x16
37 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19
38 …DCLI0__MAX_OSD__SHIFT 0x1a
[all …]
|
| D | mmhub_3_0_2_sh_mask.h | 29 …RDCLI0__VIRT_CHAN__SHIFT 0x0
30 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3
31 …RDCLI0__URG_HIGH__SHIFT 0x4
32 …RDCLI0__URG_LOW__SHIFT 0x8
33 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc
34 …RDCLI0__MAX_BW__SHIFT 0xd
35 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15
36 …DCLI0__MIN_BW__SHIFT 0x16
37 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19
38 …DCLI0__MAX_OSD__SHIFT 0x1a
[all …]
|
| D | mmhub_3_0_1_sh_mask.h | 29 …RDCLI0__VIRT_CHAN__SHIFT 0x0
30 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3
31 …RDCLI0__URG_HIGH__SHIFT 0x4
32 …RDCLI0__URG_LOW__SHIFT 0x8
33 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc
34 …RDCLI0__MAX_BW__SHIFT 0xd
35 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15
36 …DCLI0__MIN_BW__SHIFT 0x16
37 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19
38 …DCLI0__MAX_OSD__SHIFT 0x1a
[all …]
|
| D | mmhub_1_8_0_sh_mask.h | 29 …RDCLI0__VIRT_CHAN__SHIFT 0x0
30 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3
31 …RDCLI0__URG_HIGH__SHIFT 0x4
32 …RDCLI0__URG_LOW__SHIFT 0x8
33 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc
34 …RDCLI0__MAX_BW__SHIFT 0xd
35 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15
36 …DCLI0__MIN_BW__SHIFT 0x16
37 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19
38 …DCLI0__MAX_OSD__SHIFT 0x1a
[all …]
|
| D | mmhub_1_7_sh_mask.h | 29 …RDCLI0__VIRT_CHAN__SHIFT 0x0
30 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3
31 …RDCLI0__URG_HIGH__SHIFT 0x4
32 …RDCLI0__URG_LOW__SHIFT 0x8
33 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc
34 …RDCLI0__MAX_BW__SHIFT 0xd
35 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15
36 …DCLI0__MIN_BW__SHIFT 0x16
37 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19
38 …DCLI0__MAX_OSD__SHIFT 0x1a
[all …]
|
| D | mmhub_2_0_0_sh_mask.h | 27 …RDCLI0__VIRT_CHAN__SHIFT 0x0
28 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3
29 …RDCLI0__URG_HIGH__SHIFT 0x4
30 …RDCLI0__URG_LOW__SHIFT 0x8
31 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc
32 …RDCLI0__MAX_BW__SHIFT 0xd
33 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15
34 …DCLI0__MIN_BW__SHIFT 0x16
35 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19
36 …DCLI0__MAX_OSD__SHIFT 0x1a
[all …]
|
| D | mmhub_2_3_0_sh_mask.h | 27 …RDCLI0__VIRT_CHAN__SHIFT 0x0
28 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3
29 …RDCLI0__URG_HIGH__SHIFT 0x4
30 …RDCLI0__URG_LOW__SHIFT 0x8
31 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc
32 …RDCLI0__MAX_BW__SHIFT 0xd
33 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15
34 …DCLI0__MIN_BW__SHIFT 0x16
35 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19
36 …DCLI0__MAX_OSD__SHIFT 0x1a
[all …]
|
| D | mmhub_9_4_1_sh_mask.h | 27 …RDCLI0__VIRT_CHAN__SHIFT 0x0
28 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3
29 …RDCLI0__URG_HIGH__SHIFT 0x4
30 …RDCLI0__URG_LOW__SHIFT 0x8
31 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc
32 …RDCLI0__MAX_BW__SHIFT 0xd
33 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15
34 …DCLI0__MIN_BW__SHIFT 0x16
35 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19
36 …DCLI0__MAX_OSD__SHIFT 0x1a
[all …]
|
| D | mmhub_9_1_sh_mask.h | 27 …RDCLI0__VIRT_CHAN__SHIFT 0x0
28 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3
29 …RDCLI0__URG_HIGH__SHIFT 0x4
30 …RDCLI0__URG_LOW__SHIFT 0x8
31 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc
32 …RDCLI0__MAX_BW__SHIFT 0xd
33 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15
34 …DCLI0__MIN_BW__SHIFT 0x16
35 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19
36 …DCLI0__MAX_OSD__SHIFT 0x1a
[all …]
|
| /Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_7_2_sh_mask.h | 27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff
28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0
29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff
30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0
31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff
32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0
33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff
34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0
35 #define CB_COLOR_CONTROL__DEGAMMA_ENABLE_MASK 0x8
36 #define CB_COLOR_CONTROL__DEGAMMA_ENABLE__SHIFT 0x3
[all …]
|
| D | gfx_8_0_sh_mask.h | 27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff
28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0
29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff
30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0
31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff
32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0
33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff
34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0
35 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK 0x1
36 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT 0x0
[all …]
|
| D | gfx_8_1_sh_mask.h | 27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff
28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0
29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff
30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0
31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff
32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0
33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff
34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0
35 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK 0x1
36 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT 0x0
[all …]
|
| /Linux-v6.6/kernel/bpf/preload/iterators/ |
| D | iterators.lskel-big-endian.h | 27 int fd = skel_link_create(prog_fd, 0, BPF_TRACE_ITER); in iterators_bpf__dump_bpf_map__attach()
29 if (fd > 0) in iterators_bpf__dump_bpf_map__attach()
38 int fd = skel_link_create(prog_fd, 0, BPF_TRACE_ITER); in iterators_bpf__dump_bpf_prog__attach()
40 if (fd > 0) in iterators_bpf__dump_bpf_prog__attach()
48 int ret = 0; in iterators_bpf__attach()
50 ret = ret < 0 ? ret : iterators_bpf__dump_bpf_map__attach(skel); in iterators_bpf__attach()
51 ret = ret < 0 ? ret : iterators_bpf__dump_bpf_prog__attach(skel); in iterators_bpf__attach()
52 return ret < 0 ? ret : 0; in iterators_bpf__attach()
96 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\ in iterators_bpf__load()
97 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\ in iterators_bpf__load()
[all …]
|
| /Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_4_3_sh_mask.h | 29 …NTL__READ_TIMEOUT__SHIFT 0x0
30 …TL__REPORT_LAST_RDERR__SHIFT 0x1f
31 …D_TIMEOUT_MASK 0x000000FFL
32 …ORT_LAST_RDERR_MASK 0x80000000L
34 …KEW_CNTL__SKEW_TOP_THRESHOLD__SHIFT 0x0
35 …KEW_CNTL__SKEW_COUNT__SHIFT 0x6
36 …__SKEW_TOP_THRESHOLD_MASK 0x0000003FL
37 …__SKEW_COUNT_MASK 0x00000FC0L
39 …TATUS2__ME0PIPE1_CMDFIFO_AVAIL__SHIFT 0x0
40 …TATUS2__ME0PIPE1_CF_RQ_PENDING__SHIFT 0x4
[all …]
|
| D | gc_9_0_sh_mask.h | 25 …DC_CNT__DRAMRD_CMDMEM_SEC_COUNT__SHIFT 0x0
26 …DC_CNT__DRAMRD_CMDMEM_DED_COUNT__SHIFT 0x2
27 …DC_CNT__DRAMWR_CMDMEM_SEC_COUNT__SHIFT 0x4
28 …DC_CNT__DRAMWR_CMDMEM_DED_COUNT__SHIFT 0x6
29 …DC_CNT__DRAMWR_DATAMEM_SEC_COUNT__SHIFT 0x8
30 …DC_CNT__DRAMWR_DATAMEM_DED_COUNT__SHIFT 0xa
31 …DC_CNT__RRET_TAGMEM_SEC_COUNT__SHIFT 0xc
32 …DC_CNT__RRET_TAGMEM_DED_COUNT__SHIFT 0xe
33 …C_CNT__WRET_TAGMEM_SEC_COUNT__SHIFT 0x10
34 …C_CNT__WRET_TAGMEM_DED_COUNT__SHIFT 0x12
[all …]
|
| D | gc_9_4_1_sh_mask.h | 26 …C_TAG_CNT__DED_COUNT__SHIFT 0x0
27 …C_TAG_CNT__SEC_COUNT__SHIFT 0x2
28 …T__DED_COUNT_MASK 0x00000003L
29 …T__SEC_COUNT_MASK 0x0000000CL
31 …C_ROQ_CNT__DED_COUNT_ME1__SHIFT 0x0
32 …C_ROQ_CNT__SEC_COUNT_ME1__SHIFT 0x2
33 …C_ROQ_CNT__DED_COUNT_ME2__SHIFT 0x4
34 …C_ROQ_CNT__SEC_COUNT_ME2__SHIFT 0x6
35 …T__DED_COUNT_ME1_MASK 0x00000003L
36 …T__SEC_COUNT_ME1_MASK 0x0000000CL
[all …]
|
12345678910>>...41
