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Searched +full:0 +full:x17cd (Results 1 – 11 of 11) sorted by relevance

/Linux-v6.1/Documentation/devicetree/bindings/pci/
Dcdns,cdns-pcie-host.yaml47 bus-range = <0x0 0xff>;
48 linux,pci-domain = <0>;
49 vendor-id = <0x17cd>;
50 device-id = <0x0200>;
52 reg = <0x0 0xfb000000 0x0 0x01000000>,
53 <0x0 0x41000000 0x0 0x00001000>;
56 ranges = <0x02000000 0x0 0x42000000 0x0 0x42000000 0x0 0x1000000>,
57 <0x01000000 0x0 0x43000000 0x0 0x43000000 0x0 0x0010000>;
58 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
60 #interrupt-cells = <0x1>;
[all …]
/Linux-v6.1/drivers/net/ethernet/cadence/
Dmacb_pci.c22 #define CDNS_VENDOR_ID 0x17cd
23 #define CDNS_DEVICE_ID 0xe007
38 if (err < 0) { in macb_probe()
46 memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res)); in macb_probe()
47 res[0].start = pci_resource_start(pdev, 0); in macb_probe()
48 res[0].end = pci_resource_end(pdev, 0); in macb_probe()
49 res[0].name = PCI_DRIVER_NAME; in macb_probe()
50 res[0].flags = IORESOURCE_MEM; in macb_probe()
51 res[1].start = pci_irq_vector(pdev, 0); in macb_probe()
56 &res[0].start); in macb_probe()
[all …]
/Linux-v6.1/drivers/usb/cdns3/
Dcdns3-pci-wrap.c23 #define RES_IRQ_HOST_ID 0
30 #define PCI_BAR_HOST 0
32 #define PCI_BAR_OTG 0
34 #define PCI_DEV_FN_HOST_DEVICE 0
40 #define CDNS_VENDOR_ID 0x17cd
41 #define CDNS_DEVICE_ID 0x0100
76 * for GADGET/HOST PCI (devfn) function number is 0, in cdns3_pci_probe()
108 /* function 0: host(BAR_0) + device(BAR_1).*/ in cdns3_pci_probe()
149 memset(&plat_info, 0, sizeof(plat_info)); in cdns3_pci_probe()
189 { 0, }
Dcdnsp-pci.c21 #define PCI_BAR_HOST 0
22 #define PCI_BAR_OTG 0
25 #define PCI_DEV_FN_HOST_DEVICE 0
31 #define CDNS_VENDOR_ID 0x17cd
32 #define CDNS_DEVICE_ID 0x0100
33 #define CDNS_DRD_IF (PCI_CLASS_SERIAL_USB << 8 | 0x80)
68 * For GADGET/HOST PCI (devfn) function number is 0, in cdnsp_pci_probe()
102 /* For GADGET device function number is 0. */ in cdnsp_pci_probe()
103 if (pdev->devfn == 0) { in cdnsp_pci_probe()
106 /* Function 0: host(BAR_0) + device(BAR_1).*/ in cdnsp_pci_probe()
[all …]
/Linux-v6.1/include/linux/
Dpci_ids.h15 #define PCI_CLASS_NOT_DEFINED 0x0000
16 #define PCI_CLASS_NOT_DEFINED_VGA 0x0001
18 #define PCI_BASE_CLASS_STORAGE 0x01
19 #define PCI_CLASS_STORAGE_SCSI 0x0100
20 #define PCI_CLASS_STORAGE_IDE 0x0101
21 #define PCI_CLASS_STORAGE_FLOPPY 0x0102
22 #define PCI_CLASS_STORAGE_IPI 0x0103
23 #define PCI_CLASS_STORAGE_RAID 0x0104
24 #define PCI_CLASS_STORAGE_SATA 0x0106
25 #define PCI_CLASS_STORAGE_SATA_AHCI 0x010601
[all …]
/Linux-v6.1/sound/soc/codecs/
Drt1011.c39 { RT1011_POWER_9, 0xa840 },
41 { RT1011_ADC_SET_5, 0x0a20 },
42 { RT1011_DAC_SET_2, 0xa032 },
44 { RT1011_SPK_PRO_DC_DET_1, 0xb00c },
45 { RT1011_SPK_PRO_DC_DET_2, 0xcccc },
47 { RT1011_A_TIMING_1, 0x6054 },
49 { RT1011_POWER_7, 0x3e55 },
50 { RT1011_POWER_8, 0x0520 },
51 { RT1011_BOOST_CON_1, 0xe188 },
52 { RT1011_POWER_4, 0x16f2 },
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h26 #define ixATTR00 0x0000
27 #define ixATTR01 0x0001
28 #define ixATTR02 0x0002
29 #define ixATTR03 0x0003
30 #define ixATTR04 0x0004
31 #define ixATTR05 0x0005
32 #define ixATTR06 0x0006
33 #define ixATTR07 0x0007
34 #define ixATTR08 0x0008
35 #define ixATTR09 0x0009
[all …]
Ddce_8_0_d.h27 #define mmPIPE0_PG_CONFIG 0x1760
28 #define mmPIPE0_PG_ENABLE 0x1761
29 #define mmPIPE0_PG_STATUS 0x1762
30 #define mmPIPE1_PG_CONFIG 0x1764
31 #define mmPIPE1_PG_ENABLE 0x1765
32 #define mmPIPE1_PG_STATUS 0x1766
33 #define mmPIPE2_PG_CONFIG 0x1768
34 #define mmPIPE2_PG_ENABLE 0x1769
35 #define mmPIPE2_PG_STATUS 0x176a
36 #define mmPIPE3_PG_CONFIG 0x176c
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_offset.h27 // base address: 0x48
28 …VGA_MEM_WRITE_PAGE_ADDR 0x0000
29 …ne mmVGA_MEM_WRITE_PAGE_ADDR_BASE_IDX 0
30 …VGA_MEM_READ_PAGE_ADDR 0x0001
31 …ne mmVGA_MEM_READ_PAGE_ADDR_BASE_IDX 0
35 // base address: 0x3b4
36 …CRTC8_IDX 0x002d
38 …CRTC8_DATA 0x002d
40 …GENFC_WT 0x002e
42 …GENS1 0x002e
[all …]
Ddcn_1_0_offset.h27 // base address: 0x1300000
31 // base address: 0x1300000
35 // base address: 0x1300000
39 // base address: 0x1300000
43 // base address: 0x1300000
47 // base address: 0x1300020
51 // base address: 0x1300040
55 // base address: 0x1300060
59 // base address: 0x1300080
63 // base address: 0x13000a0
[all …]
Ddcn_2_0_0_offset.h27 // base address: 0x0
28 …VGA_MEM_WRITE_PAGE_ADDR 0x0000
29 …ne mmVGA_MEM_WRITE_PAGE_ADDR_BASE_IDX 0
30 …VGA_MEM_READ_PAGE_ADDR 0x0001
31 …ne mmVGA_MEM_READ_PAGE_ADDR_BASE_IDX 0
32 …VGA_RENDER_CONTROL 0x0000
34 …VGA_SEQUENCER_RESET_CONTROL 0x0001
36 …VGA_MODE_CONTROL 0x0002
38 …VGA_SURFACE_PITCH_SELECT 0x0003
40 …VGA_MEMORY_BASE_ADDRESS 0x0004
[all …]