/Linux-v6.1/drivers/soc/mediatek/ |
D | mt8186-pm-domains.h | 21 .ctl_offs = 0x308, 22 .pwr_sta_offs = 0x16C, 23 .pwr_sta2nd_offs = 0x170, 31 .ctl_offs = 0x30c, 32 .pwr_sta_offs = 0x16C, 33 .pwr_sta2nd_offs = 0x170, 59 .ctl_offs = 0x310, 60 .pwr_sta_offs = 0x16C, 61 .pwr_sta2nd_offs = 0x170, 69 .ctl_offs = 0x314, [all …]
|
D | mt8195-pm-domains.h | 21 .ctl_offs = 0x328, 22 .pwr_sta_offs = 0x174, 23 .pwr_sta2nd_offs = 0x178, 40 .ctl_offs = 0x32C, 41 .pwr_sta_offs = 0x174, 42 .pwr_sta2nd_offs = 0x178, 59 .ctl_offs = 0x330, 60 .pwr_sta_offs = 0x174, 61 .pwr_sta2nd_offs = 0x178, 67 .ctl_offs = 0x334, [all …]
|
/Linux-v6.1/drivers/staging/rts5208/ |
D | ms.h | 19 #define MS_EXTRA_SIZE 0x9 21 #define WRT_PRTCT 0x01 24 #define MS_NO_ERROR 0x00 25 #define MS_CRC16_ERROR 0x80 26 #define MS_TO_ERROR 0x40 27 #define MS_NO_CARD 0x20 28 #define MS_NO_MEMORY 0x10 29 #define MS_CMD_NK 0x08 30 #define MS_FLASH_READ_ERROR 0x04 31 #define MS_FLASH_WRITE_ERROR 0x02 [all …]
|
/Linux-v6.1/arch/mips/mm/ |
D | cex-sb1.S | 31 * the L1 and L2) since it is fetched as 0xa0000100. 35 * (0x170-0x17f) are used to preserve k0, k1, and ra. 48 sd k0,0x170($0) 49 sd k1,0x178($0) 69 mtc0 $0,C0_CERR_D 101 andi k0,0x1fe0 108 cache Index_Invalidate_I,(0<<13)(k0) 117 ld k0,0x170($0) 118 ld k1,0x178($0) 140 bnezl $0, 1f
|
/Linux-v6.1/Documentation/fault-injection/ |
D | nvme-fault-injection.rst | 33 name fault_inject, interval 1, probability 100, space 0, times 1 34 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.15.0-rc8+ #2 39 dump_stack+0x5c/0x7d 40 should_fail+0x148/0x170 41 nvme_should_fail+0x2f/0x50 [nvme_core] 42 nvme_process_cq+0xe7/0x1d0 [nvme] 43 nvme_irq+0x1e/0x40 [nvme] 44 __handle_irq_event_percpu+0x3a/0x190 45 handle_irq_event_percpu+0x30/0x70 46 handle_irq_event+0x36/0x60 [all …]
|
/Linux-v6.1/arch/sparc/kernel/ |
D | kprobes.c | 31 * - Set regs->tpc to point to kprobe->ainsn.insn[0] 52 if ((unsigned long) p->addr & 0x3UL) in arch_prepare_kprobe() 55 p->ainsn.insn[0] = *p->addr; in arch_prepare_kprobe() 56 flushi(&p->ainsn.insn[0]); in arch_prepare_kprobe() 62 return 0; in arch_prepare_kprobe() 111 regs->tpc = (unsigned long) &p->ainsn.insn[0]; in prepare_singlestep() 120 int ret = 0; in kprobe_handler() 207 if (regs->tnpc == regs->tpc + 0x4UL) in relbranch_fixup() 208 return real_pc + 0x8UL; in relbranch_fixup() 213 if ((insn & 0xc0000000) == 0x40000000 || in relbranch_fixup() [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/sound/ |
D | sprd-mcdt.txt | 17 reg = <0 0x41490000 0 0x170>;
|
/Linux-v6.1/drivers/phy/qualcomm/ |
D | phy-qcom-qmp-pcs-v5.h | 10 #define QPHY_V5_PCS_LOCK_DETECT_CONFIG1 0x0c4 11 #define QPHY_V5_PCS_LOCK_DETECT_CONFIG2 0x0c8 12 #define QPHY_V5_PCS_LOCK_DETECT_CONFIG3 0x0cc 13 #define QPHY_V5_PCS_LOCK_DETECT_CONFIG6 0x0d8 14 #define QPHY_V5_PCS_REFGEN_REQ_CONFIG1 0x0dc 15 #define QPHY_V5_PCS_G3S2_PRE_GAIN 0x170 16 #define QPHY_V5_PCS_RX_SIGDET_LVL 0x188 17 #define QPHY_V5_PCS_RCVR_DTCT_DLY_P1U2_L 0x190 18 #define QPHY_V5_PCS_RCVR_DTCT_DLY_P1U2_H 0x194 19 #define QPHY_V5_PCS_RATE_SLEW_CNTRL1 0x198 [all …]
|
D | phy-qcom-qmp-qserdes-pll.h | 10 #define QSERDES_PLL_BG_TIMER 0x00c 11 #define QSERDES_PLL_SSC_PER1 0x01c 12 #define QSERDES_PLL_SSC_PER2 0x020 13 #define QSERDES_PLL_SSC_STEP_SIZE1_MODE0 0x024 14 #define QSERDES_PLL_SSC_STEP_SIZE2_MODE0 0x028 15 #define QSERDES_PLL_SSC_STEP_SIZE1_MODE1 0x02c 16 #define QSERDES_PLL_SSC_STEP_SIZE2_MODE1 0x030 17 #define QSERDES_PLL_BIAS_EN_CLKBUFLR_EN 0x03c 18 #define QSERDES_PLL_CLK_ENABLE1 0x040 19 #define QSERDES_PLL_SYS_CLK_CTRL 0x044 [all …]
|
D | phy-qcom-qmp-qserdes-com-v3.h | 11 #define QSERDES_V3_COM_ATB_SEL1 0x000 12 #define QSERDES_V3_COM_ATB_SEL2 0x004 13 #define QSERDES_V3_COM_FREQ_UPDATE 0x008 14 #define QSERDES_V3_COM_BG_TIMER 0x00c 15 #define QSERDES_V3_COM_SSC_EN_CENTER 0x010 16 #define QSERDES_V3_COM_SSC_ADJ_PER1 0x014 17 #define QSERDES_V3_COM_SSC_ADJ_PER2 0x018 18 #define QSERDES_V3_COM_SSC_PER1 0x01c 19 #define QSERDES_V3_COM_SSC_PER2 0x020 20 #define QSERDES_V3_COM_SSC_STEP_SIZE1 0x024 [all …]
|
/Linux-v6.1/tools/testing/selftests/kvm/lib/x86_64/ |
D | svm.c | 48 memset(svm->msr_hva, 0, getpagesize()); in vcpu_alloc_svm() 79 memset(vmcb, 0, sizeof(*vmcb)); in generic_svm_setup() 80 asm volatile ("vmsave %0\n\t" : : "a" (vmcb_gpa) : "memory"); in generic_svm_setup() 81 vmcb_set_seg(&save->es, get_es(), 0, -1U, data_seg_attr); in generic_svm_setup() 82 vmcb_set_seg(&save->cs, get_cs(), 0, -1U, code_seg_attr); in generic_svm_setup() 83 vmcb_set_seg(&save->ss, get_ss(), 0, -1U, data_seg_attr); in generic_svm_setup() 84 vmcb_set_seg(&save->ds, get_ds(), 0, -1U, data_seg_attr); in generic_svm_setup() 85 vmcb_set_seg(&save->gdtr, 0, get_gdt().address, get_gdt().size, 0); in generic_svm_setup() 86 vmcb_set_seg(&save->idtr, 0, get_idt().address, get_idt().size, 0); in generic_svm_setup() 89 save->cpl = 0; in generic_svm_setup() [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/phy/ |
D | qcom,qmp-pcie-phy.yaml | 68 "^phy@[0-9a-f]+$": 86 const: 0 92 const: 0 208 "^phy@[0-9a-f]+$": 231 "^phy@[0-9a-f]+$": 251 "^phy@[0-9a-f]+$": 264 reg = <0x01c0e000 0x1c0>; 267 ranges = <0x0 0x01c0e000 0x1000>; 282 reg = <0x200 0x170>, 283 <0x400 0x200>, [all …]
|
/Linux-v6.1/drivers/ata/ |
D | pata_legacy.c | 70 module_param(probe_all, int, 0); 74 static int probe_mask = ~0; 75 module_param(probe_mask, int, 0); 79 module_param(autospeed, int, 0); 83 module_param(pio_mask, int, 0); 86 static int iordy_mask = 0xFFFFFFFF; 87 module_param(iordy_mask, int, 0); 91 module_param(ht6560a, int, 0); 95 module_param(ht6560b, int, 0); 99 module_param(opti82c611a, int, 0); [all …]
|
/Linux-v6.1/include/dt-bindings/clock/ |
D | dm816.h | 8 #define DM816_CLKCTRL_OFFSET 0x0 12 #define DM816_USB_OTG_HS_CLKCTRL DM816_CLKCTRL_INDEX(0x58) 15 #define DM816_UART1_CLKCTRL DM816_CLKCTRL_INDEX(0x150) 16 #define DM816_UART2_CLKCTRL DM816_CLKCTRL_INDEX(0x154) 17 #define DM816_UART3_CLKCTRL DM816_CLKCTRL_INDEX(0x158) 18 #define DM816_GPIO1_CLKCTRL DM816_CLKCTRL_INDEX(0x15c) 19 #define DM816_GPIO2_CLKCTRL DM816_CLKCTRL_INDEX(0x160) 20 #define DM816_I2C1_CLKCTRL DM816_CLKCTRL_INDEX(0x164) 21 #define DM816_I2C2_CLKCTRL DM816_CLKCTRL_INDEX(0x168) 22 #define DM816_TIMER1_CLKCTRL DM816_CLKCTRL_INDEX(0x170) [all …]
|
/Linux-v6.1/drivers/tty/serial/8250/ |
D | 8250_boca.c | 13 SERIAL8250_PORT(0x100, 12), 14 SERIAL8250_PORT(0x108, 12), 15 SERIAL8250_PORT(0x110, 12), 16 SERIAL8250_PORT(0x118, 12), 17 SERIAL8250_PORT(0x120, 12), 18 SERIAL8250_PORT(0x128, 12), 19 SERIAL8250_PORT(0x130, 12), 20 SERIAL8250_PORT(0x138, 12), 21 SERIAL8250_PORT(0x140, 12), 22 SERIAL8250_PORT(0x148, 12), [all …]
|
/Linux-v6.1/arch/arm/mach-davinci/ |
D | clock.h | 13 #define PLLCTL 0x100 14 #define PLLCTL_PLLEN BIT(0) 21 #define PLLM 0x110 22 #define PLLM_PLLM_MASK 0xff 24 #define PREDIV 0x114 25 #define PLLDIV1 0x118 26 #define PLLDIV2 0x11c 27 #define PLLDIV3 0x120 28 #define POSTDIV 0x128 29 #define BPDIV 0x12c [all …]
|
/Linux-v6.1/arch/arm64/boot/dts/freescale/ |
D | imx8mm-pinfunc.h | 14 #define MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x028 0x290 0x000 0x0 0… 15 #define MX8MM_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_ENET_PHY_REF_CLK_ROOT 0x028 0x290 0x4C0 0x1 0… 16 #define MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x028 0x290 0x000 0x5 0… 17 #define MX8MM_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_EXT_CLK1 0x028 0x290 0x000 0x6 0… 18 #define MX8MM_IOMUXC_GPIO1_IO00_SJC_FAIL 0x028 0x290 0x000 0x7 0… 19 #define MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x02C 0x294 0x000 0x0 0… 20 #define MX8MM_IOMUXC_GPIO1_IO01_PWM1_OUT 0x02C 0x294 0x000 0x1 0… 21 #define MX8MM_IOMUXC_GPIO1_IO01_ANAMIX_REF_CLK_24M 0x02C 0x294 0x4BC 0x5 0… 22 #define MX8MM_IOMUXC_GPIO1_IO01_CCMSRCGPCMIX_EXT_CLK2 0x02C 0x294 0x000 0x6 0… 23 #define MX8MM_IOMUXC_GPIO1_IO01_SJC_ACTIVE 0x02C 0x294 0x000 0x7 0… [all …]
|
D | imx8mq-pinfunc.h | 15 #define MX8MQ_IOMUXC_PMIC_STBY_REQ_CCMSRCGPCMIX_PMIC_STBY_REQ 0x014 0x27C 0x000 0x0 0… 16 #define MX8MQ_IOMUXC_PMIC_ON_REQ_SNVSMIX_PMIC_ON_REQ 0x018 0x280 0x000 0x0 0… 17 #define MX8MQ_IOMUXC_ONOFF_SNVSMIX_ONOFF 0x01C 0x284 0x000 0x0 0… 18 #define MX8MQ_IOMUXC_POR_B_SNVSMIX_POR_B 0x020 0x288 0x000 0x0 0… 19 #define MX8MQ_IOMUXC_RTC_RESET_B_SNVSMIX_RTC_RESET_B 0x024 0x28C 0x000 0x0 0… 20 #define MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x028 0x290 0x000 0x0 0… 21 #define MX8MQ_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_ENET_PHY_REF_CLK_ROOT 0x028 0x290 0x4C0 0x1 0… 22 #define MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x028 0x290 0x000 0x5 0… 23 #define MX8MQ_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_EXT_CLK1 0x028 0x290 0x000 0x6 0… 24 #define MX8MQ_IOMUXC_GPIO1_IO00_SJC_FAIL 0x028 0x290 0x000 0x7 0… [all …]
|
/Linux-v6.1/drivers/input/serio/ |
D | i8042-io.h | 20 # define I8042_AUX_IRQ (RTC_PORT(0) == 0x170 ? 9 : 12) /* Jensen is special */ 39 #define I8042_COMMAND_REG 0x64 40 #define I8042_STATUS_REG 0x64 41 #define I8042_DATA_REG 0x60 79 return 0; in i8042_platform_init()
|
/Linux-v6.1/drivers/media/platform/mediatek/jpeg/ |
D | mtk_jpeg_enc_hw.h | 15 #define JPEG_ENC_INT_STATUS_DONE BIT(0) 16 #define JPEG_ENC_INT_STATUS_MASK_ALLIRQ 0x13 18 #define JPEG_ENC_DST_ADDR_OFFSET_MASK GENMASK(3, 0) 20 #define JPEG_ENC_CTRL_YUV_FORMAT_MASK 0x18 24 #define JPEG_ENC_CTRL_ENABLE_BIT BIT(0) 25 #define JPEG_ENC_RESET_BIT BIT(0) 27 #define JPEG_ENC_YUV_FORMAT_YUYV 0 32 #define JPEG_ENC_QUALITY_Q60 0x0 33 #define JPEG_ENC_QUALITY_Q80 0x1 34 #define JPEG_ENC_QUALITY_Q90 0x2 [all …]
|
/Linux-v6.1/drivers/scsi/ |
D | fdomain_isa.c | 10 static int io[MAXBOARDS_PARAM] = { 0, 0, 0, 0 }; 11 module_param_hw_array(io, int, ioport, NULL, 0); 12 MODULE_PARM_DESC(io, "base I/O address of controller (0x140, 0x150, 0x160, 0x170)"); 14 static int irq[MAXBOARDS_PARAM] = { 0, 0, 0, 0 }; 15 module_param_hw_array(irq, int, irq, NULL, 0); 16 MODULE_PARM_DESC(irq, "IRQ of controller (0=auto [default])"); 18 static int scsi_id[MAXBOARDS_PARAM] = { 0, 0, 0, 0 }; 19 module_param_hw_array(scsi_id, int, other, NULL, 0); 23 0xc8000, 24 0xca000, [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/pinctrl/ |
D | fsl,imxrt1170.yaml | 71 reg = <0x400e8000 0x4000>; 74 <0x16C 0x3B0 0x620 0x0 0x0 0xf1>, 75 <0x170 0x3B4 0x61C 0x0 0x0 0xf1>;
|
/Linux-v6.1/drivers/usb/host/ |
D | ehci-fsl.h | 9 #define FSL_SOC_USB_SBUSCFG 0x90 10 #define SBUSCFG_INCR8 0x02 /* INCR8, specified */ 11 #define FSL_SOC_USB_ULPIVP 0x170 12 #define FSL_SOC_USB_PORTSC1 0x184 14 #define PORT_PTS_UTMI (0<<30) 18 #define FSL_SOC_USB_PORTSC2 0x188 19 #define FSL_SOC_USB_USBMODE 0x1a8 20 #define USBMODE_CM_MASK (3 << 0) /* controller mode mask */ 21 #define USBMODE_CM_HOST (3 << 0) /* controller mode: host */ 24 #define FSL_SOC_USB_USBGENCTRL 0x200 [all …]
|
/Linux-v6.1/arch/arm/boot/dts/ |
D | imx6dl-pinfunc.h | 13 #define MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x04c 0x360 0x000 0x0 0x0 14 #define MX6QDL_PAD_CSI0_DAT10__AUD3_RXC 0x04c 0x360 0x000 0x1 0x0 15 #define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x04c 0x360 0x7f8 0x2 0x0 16 #define MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x04c 0x360 0x000 0x3 0x0 17 #define MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x04c 0x360 0x8fc 0x3 0x0 18 #define MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x04c 0x360 0x000 0x5 0x0 19 #define MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x04c 0x360 0x000 0x7 0x0 20 #define MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x050 0x364 0x000 0x0 0x0 21 #define MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS 0x050 0x364 0x000 0x1 0x0 22 #define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0 0x050 0x364 0x800 0x2 0x0 [all …]
|
/Linux-v6.1/drivers/mmc/host/ |
D | sdhci-esdhc.h | 27 #define ESDHC_HOST_CONTROL_LE 0x20 34 #define ESDHC_PRSSTAT 0x24 35 #define ESDHC_CLOCK_GATE_OFF 0x00000080 36 #define ESDHC_CLOCK_STABLE 0x00000008 39 #define ESDHC_PROCTL 0x28 40 #define ESDHC_VOLT_SEL 0x00000400 41 #define ESDHC_CTRL_4BITBUS (0x1 << 1) 42 #define ESDHC_CTRL_8BITBUS (0x2 << 1) 43 #define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1) 44 #define ESDHC_HOST_CONTROL_RES 0x01 [all …]
|