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/Linux-v5.15/fs/ufs/
Dballoc.c160 overflow = 0; in ufs_free_blocks()
282 for (j = 0; j < pos; ++j) in ufs_change_blocknr()
299 ll_rw_block(REQ_OP_READ, 0, 1, &bh); in ufs_change_blocknr()
334 memset(bh->b_data, 0, inode->i_sb->s_blocksize); in ufs_clear_frags()
390 return 0; in ufs_new_fragments()
397 return 0; in ufs_new_fragments()
408 return 0; in ufs_new_fragments()
413 goal = 0; in ufs_new_fragments()
414 if (goal == 0) in ufs_new_fragments()
422 if (oldcount == 0) { in ufs_new_fragments()
[all …]
/Linux-v5.15/drivers/net/wireless/broadcom/b43/
Dradio_2057.c17 { 0x0E, 0x20 }, { 0x31, 0x00 }, { 0x32, 0x00 }, { 0x33, 0x00 },
18 { 0x35, 0x26 }, { 0x3C, 0xff }, { 0x3D, 0xff }, { 0x3E, 0xff },
19 { 0x3F, 0xff }, { 0x62, 0x33 }, { 0x8A, 0xf0 }, { 0x8B, 0x10 },
20 { 0x8C, 0xf0 }, { 0x91, 0x3f }, { 0x92, 0x36 }, { 0xA4, 0x8c },
21 { 0xA8, 0x55 }, { 0xAF, 0x01 }, { 0x10F, 0xf0 }, { 0x110, 0x10 },
22 { 0x111, 0xf0 }, { 0x116, 0x3f }, { 0x117, 0x36 }, { 0x129, 0x8c },
23 { 0x12D, 0x55 }, { 0x134, 0x01 }, { 0x15E, 0x00 }, { 0x15F, 0x00 },
24 { 0x160, 0x00 }, { 0x161, 0x00 }, { 0x162, 0x00 }, { 0x163, 0x00 },
25 { 0x169, 0x02 }, { 0x16A, 0x00 }, { 0x16B, 0x00 }, { 0x16C, 0x00 },
26 { 0x1A4, 0x00 }, { 0x1A5, 0x00 }, { 0x1A6, 0x00 }, { 0x1AA, 0x00 },
[all …]
Dradio_2059.c17 { 0x051, 0x70 }, { 0x05a, 0x03 }, { 0x079, 0x01 }, { 0x082, 0x70 },
18 { 0x083, 0x00 }, { 0x084, 0x70 }, { 0x09a, 0x7f }, { 0x0b6, 0x10 },
19 { 0x188, 0x05 },
61 RADIOREGS(0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c,
62 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73,
63 0x00, 0x00, 0x00, 0xd0, 0x00),
64 PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443),
68 RADIOREGS(0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71,
69 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73,
70 0x00, 0x00, 0x00, 0xd0, 0x00),
[all …]
/Linux-v5.15/arch/arm/mach-omap2/
Dopp4xxx_data.c40 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c),
41 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
42 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23),
43 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27),
44 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITROSB_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITROSB, 0xfa, 0x27),
45 VOLT_DATA_DEFINE(0, 0, 0, 0),
53 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c),
54 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
55 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23),
56 VOLT_DATA_DEFINE(0, 0, 0, 0),
[all …]
/Linux-v5.15/arch/arm64/include/asm/
Dmodule.h42 * (AAPCS64) must assume that a veneer that alters IP0 (x16) and/or
45 * is exactly what we are dealing with here, we are free to use x16
48 __le32 adrp; /* adrp x16, .... */
49 __le32 add; /* add x16, x16, #0x.... */
50 __le32 br; /* br x16 */
57 ((u64)place & 0xfff) >= 0xff8; in is_forbidden_offset_for_adrp()
/Linux-v5.15/arch/arm/boot/dts/
Drk3288-veyron-jerry.dts25 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
45 #size-cells = <0>;
52 0x01 0x00 0x06 0x00 0x08 0x02 0x89 0x01
53 0x24 0x00 0x67 0x09 0x14 0x01 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
54 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
55 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x02 0x00 0x0f
56 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
57 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
58 0x24 0x00 0x67 0x09 0x14 0x03 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
59 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
[all …]
/Linux-v5.15/arch/arm64/kernel/
Dsmccc-call.S20 ldr_l x16, smccc_has_sve_hint
21 cbz x16, 2f
23 get_current_task x16
24 ldr x16, [x16, #TSK_TI_FLAGS]
25 tbnz x16, #TIF_FOREIGN_FPSTATE, 1f // Any live FP state?
26 tbnz x16, #TIF_SVE, 2f // Does that state include SVE?
40 \instr #0
92 ldp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS]
94 \instr #0
108 stp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS]
/Linux-v5.15/crypto/
Dtestmgr.h33 * @ksize: Length of @key in bytes (0 if no key)
101 * @crypt_error: When @novrfy=0, the expected error from encrypt(). When
192 "\x9C\xE6\x16\xCE\x62\x4A\x11\xE0\x08\x6D\x34\x1E\xBC\xAC\xA0\xA1"
254 "\x13\xb4\xc1\xa1\x11\xfc\x40\x2f\x4c\x9d\xdf\x16\x76\x11\x20\x6b",
415 "\x6D\x28\x1B\xA9\x62\xC0\xB8\x16\xA7\x8B\xF9\xBB\xCC\xB4\x15\x7F"
432 "\xD7\xDC\x16\x99\x92\xBE\xCB\x40\x0C\xCE\x7C\x3B\x46\xA2\x5B\x5D"
453 "\x88\x04\x4A\x78\x62\x18\x2E\xF5\xFB\x9B\xEF\x15\xD8\x16\x47\xC6"
468 "\xD3\x1F\x16\x0D\x05\xAB\x4F\xC6\x52\xC8\x6B\x36\x51\x7D\x1D\x27"
491 "\x16\x73\x51\xB9\x9F\x88\x0B\xCD\x30\xF3\x97\xCC\x2B\x6B\xA4\x0E"
508 "\xF5\xC6\xA0\x51\xB7\x0E\xB9\xEC\xE7\x0D\x22\xF6\x1A\xD3\xFE\x16"
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/mmhub/
Dmmhub_9_1_sh_mask.h27 …RDCLI0__VIRT_CHAN__SHIFT 0x0
28 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3
29 …RDCLI0__URG_HIGH__SHIFT 0x4
30 …RDCLI0__URG_LOW__SHIFT 0x8
31 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc
32 …RDCLI0__MAX_BW__SHIFT 0xd
33 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15
34 …DCLI0__MIN_BW__SHIFT 0x16
35 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19
36 …DCLI0__MAX_OSD__SHIFT 0x1a
[all …]
Dmmhub_1_0_sh_mask.h27 …RDCLI0__VIRT_CHAN__SHIFT 0x0
28 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3
29 …RDCLI0__URG_HIGH__SHIFT 0x4
30 …RDCLI0__URG_LOW__SHIFT 0x8
31 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc
32 …RDCLI0__MAX_BW__SHIFT 0xd
33 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15
34 …DCLI0__MIN_BW__SHIFT 0x16
35 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19
36 …DCLI0__MAX_OSD__SHIFT 0x1a
[all …]
Dmmhub_1_7_sh_mask.h29 …RDCLI0__VIRT_CHAN__SHIFT 0x0
30 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3
31 …RDCLI0__URG_HIGH__SHIFT 0x4
32 …RDCLI0__URG_LOW__SHIFT 0x8
33 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc
34 …RDCLI0__MAX_BW__SHIFT 0xd
35 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15
36 …DCLI0__MIN_BW__SHIFT 0x16
37 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19
38 …DCLI0__MAX_OSD__SHIFT 0x1a
[all …]
Dmmhub_9_3_0_sh_mask.h27 …RDCLI0__VIRT_CHAN__SHIFT 0x0
28 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3
29 …RDCLI0__URG_HIGH__SHIFT 0x4
30 …RDCLI0__URG_LOW__SHIFT 0x8
31 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc
32 …RDCLI0__MAX_BW__SHIFT 0xd
33 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15
34 …DCLI0__MIN_BW__SHIFT 0x16
35 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19
36 …DCLI0__MAX_OSD__SHIFT 0x1a
[all …]
Dmmhub_2_0_0_sh_mask.h27 …RDCLI0__VIRT_CHAN__SHIFT 0x0
28 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3
29 …RDCLI0__URG_HIGH__SHIFT 0x4
30 …RDCLI0__URG_LOW__SHIFT 0x8
31 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc
32 …RDCLI0__MAX_BW__SHIFT 0xd
33 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15
34 …DCLI0__MIN_BW__SHIFT 0x16
35 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19
36 …DCLI0__MAX_OSD__SHIFT 0x1a
[all …]
Dmmhub_9_4_1_sh_mask.h27 …RDCLI0__VIRT_CHAN__SHIFT 0x0
28 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3
29 …RDCLI0__URG_HIGH__SHIFT 0x4
30 …RDCLI0__URG_LOW__SHIFT 0x8
31 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc
32 …RDCLI0__MAX_BW__SHIFT 0xd
33 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15
34 …DCLI0__MIN_BW__SHIFT 0x16
35 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19
36 …DCLI0__MAX_OSD__SHIFT 0x1a
[all …]
Dmmhub_2_3_0_sh_mask.h27 …RDCLI0__VIRT_CHAN__SHIFT 0x0
28 …RDCLI0__CHECK_TLB_CREDIT__SHIFT 0x3
29 …RDCLI0__URG_HIGH__SHIFT 0x4
30 …RDCLI0__URG_LOW__SHIFT 0x8
31 …RDCLI0__MAX_BW_ENABLE__SHIFT 0xc
32 …RDCLI0__MAX_BW__SHIFT 0xd
33 …DCLI0__MIN_BW_ENABLE__SHIFT 0x15
34 …DCLI0__MIN_BW__SHIFT 0x16
35 …DCLI0__OSD_LIMITER_ENABLE__SHIFT 0x19
36 …DCLI0__MAX_OSD__SHIFT 0x1a
[all …]
/Linux-v5.15/drivers/media/dvb-frontends/
Drtl2832_priv.h242 {DVBT_DAGC_TRG_VAL, 0x39},
243 {DVBT_AGC_TARG_VAL_0, 0x0},
244 {DVBT_AGC_TARG_VAL_8_1, 0x5a},
245 {DVBT_AAGC_LOOP_GAIN, 0x16},
246 {DVBT_LOOP_GAIN2_3_0, 0x6},
247 {DVBT_LOOP_GAIN2_4, 0x1},
248 {DVBT_LOOP_GAIN3, 0x16},
249 {DVBT_VTOP1, 0x35},
250 {DVBT_VTOP2, 0x21},
251 {DVBT_VTOP3, 0x21},
[all …]
/Linux-v5.15/Documentation/dev-tools/
Dkfence.rst29 CONFIG_KFENCE_SAMPLE_INTERVAL=0
41 ``CONFIG_KFENCE_SAMPLE_INTERVAL``. Setting ``kfence.sample_interval=0``
68 BUG: KFENCE: out-of-bounds read in test_out_of_bounds_read+0xa6/0x234
70 Out-of-bounds read at 0xffff8c3f2e291fff (1B left of kfence-#72):
71 test_out_of_bounds_read+0xa6/0x234
72 kunit_try_run_case+0x61/0xa0
73 kunit_generic_run_threadfn_adapter+0x16/0x30
74 kthread+0x176/0x1b0
75 ret_from_fork+0x22/0x30
77 kfence-#72: 0xffff8c3f2e292000-0xffff8c3f2e29201f, size=32, cache=kmalloc-32
[all …]
/Linux-v5.15/drivers/net/wireless/realtek/rtl8xxxu/
Drtl8xxxu_8192c.c37 .reg_0e00 = 0x07090c0c,
38 .reg_0e04 = 0x01020405,
39 .reg_0e08 = 0x00000000,
40 .reg_086c = 0x00000000,
42 .reg_0e10 = 0x0b0c0c0e,
43 .reg_0e14 = 0x01030506,
44 .reg_0e18 = 0x0b0c0d0e,
45 .reg_0e1c = 0x01030509,
47 .reg_0830 = 0x07090c0c,
48 .reg_0834 = 0x01020405,
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_1_sh_mask.h26 …C_TAG_CNT__DED_COUNT__SHIFT 0x0
27 …C_TAG_CNT__SEC_COUNT__SHIFT 0x2
28 …T__DED_COUNT_MASK 0x00000003L
29 …T__SEC_COUNT_MASK 0x0000000CL
31 …C_ROQ_CNT__DED_COUNT_ME1__SHIFT 0x0
32 …C_ROQ_CNT__SEC_COUNT_ME1__SHIFT 0x2
33 …C_ROQ_CNT__DED_COUNT_ME2__SHIFT 0x4
34 …C_ROQ_CNT__SEC_COUNT_ME2__SHIFT 0x6
35 …T__DED_COUNT_ME1_MASK 0x00000003L
36 …T__SEC_COUNT_ME1_MASK 0x0000000CL
[all …]
/Linux-v5.15/drivers/gpu/drm/amd/include/ivsrcid/
Divsrcid_vislands30.h30 #define VISLANDS30_IV_SRCID_D1_V_UPDATE_INT 7 // 0x07
31 #define VISLANDS30_IV_EXTID_D1_V_UPDATE_INT 0
33 #define VISLANDS30_IV_SRCID_D1_GRPH_PFLIP 8 // 0x08
34 #define VISLANDS30_IV_EXTID_D1_GRPH_PFLIP 0
36 #define VISLANDS30_IV_SRCID_D2_V_UPDATE_INT 9 // 0x09
37 #define VISLANDS30_IV_EXTID_D2_V_UPDATE_INT 0
39 #define VISLANDS30_IV_SRCID_D2_GRPH_PFLIP 10 // 0x0a
40 #define VISLANDS30_IV_EXTID_D2_GRPH_PFLIP 0
42 #define VISLANDS30_IV_SRCID_D3_V_UPDATE_INT 11 // 0x0b
43 #define VISLANDS30_IV_EXTID_D3_V_UPDATE_INT 0
[all …]
/Linux-v5.15/include/linux/platform_data/
Ddavinci_asp.h62 * _| |_| |_ x16 _| |_| |_| |_| |_ x16 _| |_| |_
71 * _| |_ x16 _| |_| |_ x16 _| |_| |_| |_| |_| |_| |
95 MCASP_VERSION_1 = 0, /* DM646x */
103 MCBSP_CLKR = 0, /* as in DM365 */
107 #define INACTIVE_MODE 0
111 #define DAVINCI_MCASP_IIS_MODE 0
/Linux-v5.15/net/core/
Dptp_classifier.c16 * jneq #0x800, test_ipv6 ; ETH_P_IP ?
20 * jset #0x1fff, drop_ipv4 ; don't allow fragments
21 * ldxb 4*([14]&0xf) ; load IP header len
25 * and #0xf ; mask PTP_CLASS_VMASK
26 * or #0x10 ; PTP_CLASS_IPV4
28 * drop_ipv4: ret #0x0 ; PTP_CLASS_NONE
32 * jneq #0x86dd, test_8021q ; ETH_P_IPV6 ?
38 * and #0xf ; mask PTP_CLASS_VMASK
39 * or #0x20 ; PTP_CLASS_IPV6
41 * drop_ipv6: ret #0x0 ; PTP_CLASS_NONE
[all …]
/Linux-v5.15/net/wireless/certs/
Dsforshee.hex2 0x30, 0x82, 0x02, 0xa4, 0x30, 0x82, 0x01, 0x8c,
3 0x02, 0x09, 0x00, 0xb2, 0x8d, 0xdf, 0x47, 0xae,
4 0xf9, 0xce, 0xa7, 0x30, 0x0d, 0x06, 0x09, 0x2a,
5 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x0b,
6 0x05, 0x00, 0x30, 0x13, 0x31, 0x11, 0x30, 0x0f,
7 0x06, 0x03, 0x55, 0x04, 0x03, 0x0c, 0x08, 0x73,
8 0x66, 0x6f, 0x72, 0x73, 0x68, 0x65, 0x65, 0x30,
9 0x20, 0x17, 0x0d, 0x31, 0x37, 0x31, 0x30, 0x30,
10 0x36, 0x31, 0x39, 0x34, 0x30, 0x33, 0x35, 0x5a,
11 0x18, 0x0f, 0x32, 0x31, 0x31, 0x37, 0x30, 0x39,
[all …]
/Linux-v5.15/drivers/auxdisplay/
DKconfig70 default 0x378
74 The first standard parallel port address is 0x378.
75 The second standard parallel port address is 0x278.
76 The third standard parallel port address is 0x3BC.
84 Usually you only need to use 0x378.
211 int "Default parallel port number (0=LPT1)"
212 range 0 255
213 default "0"
218 modules with different arguments. Numbering starts with '0' for LPT1,
222 int "Default panel profile (0-5, 0=custom)"
[all …]
/Linux-v5.15/drivers/video/fbdev/aty/
Dradeon_accel.c15 * On some platforms, the video memory is mapped at 0 in radeon chip space in radeon_fixup_offset()
37 OUTREG(DEFAULT_PITCH_OFFSET, (rinfo->pitch << 0x16) | in radeon_fixup_offset()
39 OUTREG(DST_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); in radeon_fixup_offset()
40 OUTREG(SRC_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); in radeon_fixup_offset()
56 OUTREG(DP_WRITE_MSK, 0xffffffff); in radeonfb_prim_fillrect()
110 if ( xdir < 0 ) { sx += w-1; dx += w-1; } in radeonfb_prim_copyarea()
111 if ( ydir < 0 ) { sy += h-1; dy += h-1; } in radeonfb_prim_copyarea()
120 OUTREG(DP_WRITE_MSK, 0xffffffff); in radeonfb_prim_copyarea()
121 OUTREG(DP_CNTL, (xdir>=0 ? DST_X_LEFT_TO_RIGHT : 0) in radeonfb_prim_copyarea()
122 | (ydir>=0 ? DST_Y_TOP_TO_BOTTOM : 0)); in radeonfb_prim_copyarea()
[all …]

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