Searched +full:0 +full:x12340000 (Results 1 – 4 of 4) sorted by relevance
54 Number of cells in a PM domain specifier. Typically 0 for nodes78 reg = <0x12340000 0x1000>;88 reg = <0x12340000 0x1000>;94 reg = <0x12341000 0x1000>;95 power-domains = <&parent2 0>;100 // Domains created by the 'child' power controller are subdomains of '0' power106 reg = <0x12340000 0x1000>;107 #power-domain-cells = <0>;113 reg = <0x12341000 0x1000>;115 #power-domain-cells = <0>;
34 reg = <0x12350000 0x1000>;35 power-domains = <&power 0>;41 reg = <0x12351000 0x1000>;42 power-domains = <&power 0>, <&power 1> ;47 located inside a PM domain with index 0 of a power controller represented by a50 the first with index 0 and the second with index 1, of a power controller that93 reg = <0x12340000 0x1000>;100 reg = <0x12350000 0x1000>;101 power-domains = <&power 0>;107 reg = <0x12350000 0x1000>;
37 Number of cells in a performance domain specifier. Typically 0 for nodes42 enum: [ 0, 1 ]57 reg = <0x12340000 0x1000>;66 #size-cells = <0>;68 cpu@0 {71 reg = <0x0 0x0>;
15 (((__u16)(x) & (__u16)0x00ffU) << 8) | \16 (((__u16)(x) & (__u16)0xff00U) >> 8)))19 (((__u32)(x) & (__u32)0x000000ffUL) << 24) | \20 (((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \21 (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \22 (((__u32)(x) & (__u32)0xff000000UL) >> 24)))25 (((__u64)(x) & (__u64)0x00000000000000ffULL) << 56) | \26 (((__u64)(x) & (__u64)0x000000000000ff00ULL) << 40) | \27 (((__u64)(x) & (__u64)0x0000000000ff0000ULL) << 24) | \28 (((__u64)(x) & (__u64)0x00000000ff000000ULL) << 8) | \[all …]
