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/Linux-v6.1/Documentation/devicetree/bindings/reset/
Drenesas,rzg2l-usbphy-ctrl.yaml42 0 = Port 1 Phy reset
62 reg = <0x11c40000 0x10000>;
/Linux-v6.1/Documentation/devicetree/bindings/phy/
Dmediatek,xsphy.yaml20 u2 port0 0x0000 MISC
21 0x0100 FMREG
22 0x0300 U2PHY_COM
23 u2 port1 0x1000 MISC
24 0x1100 FMREG
25 0x1300 U2PHY_COM
26 u2 port2 0x2000 MISC
28 u31 common 0x3000 DIG_GLB
29 0x3100 PHYA_GLB
30 u31 port0 0x3400 DIG_LN_TOP
[all …]
/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt7986a.dtsi17 clk40m: oscillator@0 {
20 #clock-cells = <0>;
26 #size-cells = <0>;
27 cpu0: cpu@0 {
31 reg = <0x0>;
39 reg = <0x1>;
47 reg = <0x2>;
55 reg = <0x3>;
71 reg = <0 0x43000000 0 0x30000>;
77 reg = <0 0x4fc00000 0 0x00100000>;
[all …]
Dmt8195.dtsi30 #size-cells = <0>;
32 cpu0: cpu@0 {
35 reg = <0x000>;
37 performance-domains = <&performance 0>;
48 reg = <0x100>;
50 performance-domains = <&performance 0>;
61 reg = <0x200>;
63 performance-domains = <&performance 0>;
74 reg = <0x300>;
76 performance-domains = <&performance 0>;
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/pinctrl/
Dmediatek,mt7986-pinctrl.yaml86 "watchdog" "watchdog" 0
304 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3'
307 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
308 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
309 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
312 enum: [0, 1, 2, 3]
316 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3'
319 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
320 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
321 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
[all …]
/Linux-v6.1/arch/arm64/boot/dts/renesas/
Dr9a07g043.dtsi18 #clock-cells = <0>;
20 clock-frequency = <0>;
25 #clock-cells = <0>;
27 clock-frequency = <0>;
33 #clock-cells = <0>;
34 clock-frequency = <0>;
40 #clock-cells = <0>;
42 clock-frequency = <0>;
45 cluster0_opp: opp-table-0 {
74 #size-cells = <0>;
[all …]
Dr9a07g044.dtsi18 #clock-cells = <0>;
20 clock-frequency = <0>;
25 #clock-cells = <0>;
27 clock-frequency = <0>;
33 #clock-cells = <0>;
34 clock-frequency = <0>;
40 #clock-cells = <0>;
42 clock-frequency = <0>;
45 cluster0_opp: opp-table-0 {
74 #size-cells = <0>;
[all …]
Dr9a07g054.dtsi18 #clock-cells = <0>;
20 clock-frequency = <0>;
25 #clock-cells = <0>;
27 clock-frequency = <0>;
33 #clock-cells = <0>;
34 clock-frequency = <0>;
40 #clock-cells = <0>;
42 clock-frequency = <0>;
45 cluster0_opp: opp-table-0 {
74 #size-cells = <0>;
[all …]
/Linux-v6.1/drivers/pinctrl/mediatek/
Dpinctrl-mt7986.c11 #define MT7986_PIN(_number, _name) MTK_PIN(_number, _name, 0, _number, DRV_GRP4)
17 _x_bits, 32, 0)
23 * iocfg_rt:0x11c30000, iocfg_rb:0x11c40000, iocfg_lt:0x11e20000,
24 * iocfg_lb:0x11e30000, iocfg_tr:0x11f00000, iocfg_tl:0x11f10000,
76 PIN_FIELD(0, 100, 0x300, 0x10, 0, 4),
80 PIN_FIELD(0, 100, 0x0, 0x10, 0, 1),
84 PIN_FIELD(0, 100, 0x200, 0x10, 0, 1),
88 PIN_FIELD(0, 100, 0x100, 0x10, 0, 1),
92 PIN_FIELD_BASE(0, 0, IOCFG_RB_BASE, 0x40, 0x10, 17, 1),
93 PIN_FIELD_BASE(1, 2, IOCFG_LT_BASE, 0x20, 0x10, 10, 1),
[all …]