Searched +full:0 +full:x1100d000 (Results 1 – 10 of 10) sorted by relevance
15 instructions with one continuous write and one read for up-to 0xa072 reg = <0 0x1100d000 0 0x1000>;78 #size-cells = <0>;80 flash@0 {82 reg = <0>;
86 reg = <0 0x1100d000 0 0xe0>;92 #size-cells = <0>;94 flash@0 {96 reg = <0>;
109 reg = <0x1100d000 0x70>, <0x11000300 0x80>;118 #size-cells = <0>;
25 - #size-cells: Should be 0.31 reg = <0 0x1100d000 0 0x1000>;38 #size-cells = <0>;45 - reg: Chip Select Signal, default 0.46 Set as reg = <0>, <1> when need 2 CS.86 - pinctrl-0: GPIO setting node.123 pinctrl-0 = <&nand_pins_default>;124 nand@0 {125 reg = <0>;137 nand@0 {[all …]
25 #size-cells = <0>;27 cpu0: cpu@0 {31 reg = <0x000>;38 reg = <0x001>;45 reg = <0x002>;52 reg = <0x003>;59 reg = <0x100>;66 reg = <0x101>;73 reg = <0x102>;80 reg = <0x103>;[all …]
69 #size-cells = <0>;71 cpu0: cpu@0 {74 reg = <0x0 0x0>;89 reg = <0x0 0x1>;110 #clock-cells = <0>;115 #clock-cells = <0>;139 reg = <0 0x43000000 0 0x30000>;149 thermal-sensors = <&thermal 0>;215 reg = <0 0x10000000 0 0x1000>;222 reg = <0 0x10001000 0 0x250>;[all …]
23 #size-cells = <0>;63 cpu0: cpu@0 {66 reg = <0x000>;78 reg = <0x100>;90 reg = <0x200>;102 reg = <0x300>;114 reg = <0x400>;126 reg = <0x500>;138 reg = <0x600>;150 reg = <0x700>;[all …]
53 cluster0_opp: opp-table-0 {129 #size-cells = <0>;151 cpu0: cpu@0 {154 reg = <0x000>;169 reg = <0x001>;184 reg = <0x100>;199 reg = <0x101>;214 CPU_SLEEP_0: cpu-sleep-0 {220 arm,psci-suspend-param = <0x0010000>;242 cpu_suspend = <0x84000001>;[all …]
25 #size-cells = <0>;28 cpu@0 {31 reg = <0x0>;36 reg = <0x1>;41 reg = <0x2>;46 reg = <0x3>;57 reg = <0 0x80002000 0 0x1000>;64 #clock-cells = <0>;70 #clock-cells = <0>;73 clk26m: oscillator@0 {[all …]
73 #size-cells = <0>;76 cpu0: cpu@0 {79 reg = <0x0>;91 reg = <0x1>;103 reg = <0x2>;115 reg = <0x3>;137 #clock-cells = <0>;142 #clock-cells = <0>;147 clk26m: oscillator-0 {149 #clock-cells = <0>;[all …]
