| /Linux-v5.10/drivers/media/usb/gspca/ | 
| D | sn9c2028.c | 37 	unsigned char to_read; /* length to read. 0 means no reply requested */46 		.priv = 0},
 55 		.priv = 0},
 64 		  command[0], command[1], command[2],  in sn9c2028_command()
 69 			usb_sndctrlpipe(gspca_dev->dev, 0),  in sn9c2028_command()
 72 			2, 0, gspca_dev->usb_buf, 6, 500);  in sn9c2028_command()
 73 	if (rc < 0) {  in sn9c2028_command()
 75 		       gspca_dev->usb_buf[0], rc);  in sn9c2028_command()
 79 	return 0;  in sn9c2028_command()
 87 			usb_rcvctrlpipe(gspca_dev->dev, 0),  in sn9c2028_read1()
 [all …]
 
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| D | conex.c | 53 		.priv = 0},69 			usb_rcvctrlpipe(dev, 0),  in reg_r()
 70 			0,  in reg_r()
 72 			0,  in reg_r()
 76 		  index, gspca_dev->usb_buf[0]);  in reg_r()
 86 	gspca_dev->usb_buf[0] = val;  in reg_w_val()
 88 			usb_sndctrlpipe(dev, 0),  in reg_w_val()
 89 			0,  in reg_w_val()
 91 			0,  in reg_w_val()
 111 			usb_sndctrlpipe(dev, 0),  in reg_w()
 [all …]
 
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| D | nw80x.c | 159  *	- 3rd byte: data length (=0 for end of sequence)162 #define I2C0 0xff
 165 	0x04, 0x05, 0x01, 0x61,
 166 	0x04, 0x04, 0x01, 0x01,
 167 	0x04, 0x06, 0x01, 0x04,
 168 	0x04, 0x04, 0x03, 0x00, 0x00, 0x00,
 169 	0x05, 0x05, 0x01, 0x00,
 170 	0, 0, 0
 173 	0x04, 0x06, 0x01, 0xc0,
 174 	0x00, 0x00, 0x40, 0x10, 0x43, 0x00, 0xb4, 0x01, 0x10, 0x00, 0x4f,
 [all …]
 
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| D | jpeg.h | 20 	0xff, 0xd8,			/* jpeg */23 	0xff, 0xdb, 0x00, 0x84,		/* DQT */
 24 0,
 26 	0x10, 0x0b, 0x0c, 0x0e, 0x0c, 0x0a, 0x10, 0x0e,
 27 	0x0d, 0x0e, 0x12, 0x11, 0x10, 0x13, 0x18, 0x28,
 28 	0x1a, 0x18, 0x16, 0x16, 0x18, 0x31, 0x23, 0x25,
 29 	0x1d, 0x28, 0x3a, 0x33, 0x3d, 0x3c, 0x39, 0x33,
 30 	0x38, 0x37, 0x40, 0x48, 0x5c, 0x4e, 0x40, 0x44,
 31 	0x57, 0x45, 0x37, 0x38, 0x50, 0x6d, 0x51, 0x57,
 32 	0x5f, 0x62, 0x67, 0x68, 0x67, 0x3e, 0x4d, 0x71,
 [all …]
 
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| /Linux-v5.10/arch/arm/boot/dts/ | 
| D | imx7d-cl-som-imx7.dts | 8  * of the GPL or the X11 license, at your option. Note that this dual23 		reg = <0x80000000 0x10000000>; /* 256 MB - minimal configuration */
 46 	pinctrl-0 = <&pinctrl_enet1>;
 50 	assigned-clock-rates = <0>, <100000000>;
 58 		#size-cells = <0>;
 60 		ethphy0: ethernet-phy@0 {
 62 			reg = <0>;
 74 	pinctrl-0 = <&pinctrl_enet2>;
 78 	assigned-clock-rates = <0>, <100000000>;
 87 	pinctrl-0 = <&pinctrl_i2c2>;
 [all …]
 
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| D | rk3288-veyron-jerry.dts | 25 	pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;45 	#size-cells = <0>;
 52 0x01 0x00 0x06 0x00 0x08 0x02 0x89 0x01
 53 0x24 0x00 0x67 0x09 0x14 0x01 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
 54 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
 55 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x02 0x00 0x0f
 56 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
 57 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
 58 0x24 0x00 0x67 0x09 0x14 0x03 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
 59 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
 [all …]
 
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| /Linux-v5.10/drivers/gpu/drm/nouveau/nvkm/subdev/bios/ | 
| D | mxm.c | 36 		return 0x0000;  in mxm_table()43 		return 0x0000;  in mxm_table()
 55 	0x00, 0x12, 0x22, 0x11, 0x32, 0x31, 0x11, 0x31,
 56 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 60 	0x00, 0x12, 0x22, 0x11, 0x32, 0x31, 0x11, 0x31,
 61 	0x11, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 65 	0x00, 0x14, 0x24, 0x11, 0x34, 0x31, 0x11, 0x31,
 66 	0x11, 0x31, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00
 70 	0x00, 0x14, 0x12, 0x11, 0x00, 0x31, 0x11, 0x31,
 71 	0x11, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 [all …]
 
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| /Linux-v5.10/drivers/char/pcmcia/ | 
| D | cm4000_cs.c | 12   * current version: 2.4.0gm455 	} while (0)
 71 /* note: the first state has to have number 0 always */
 73 #define	M_FETCH_ATR	0
 81 #define	LOCK_IO			0
 96 #define REG_FLAGS0(x)		(x + 0)
 126 	unsigned char procbyte;	/* T=0 procedure byte */
 129 	unsigned char flags0;	/* cardman IO-flags 0 */
 135 	unsigned char proto;	/* T=0, T=1, ... */
 146 	memset(&dev->atr_csum,0,				\
 [all …]
 
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| /Linux-v5.10/drivers/video/fbdev/ | 
| D | platinumfb.h | 54  *	F = 14.3MHz * c0 / (c1 & 0x1f) / (1 << (c1 >> 5))55  * Newer ones use the values in clocksel[0], for which the formula
 57  *	F = 15MHz * c0 / ((c1 & 0x1f) + 2) / (1 << (c1 >> 5))
 69 #define DIV2	0x20
 70 #define DIV4	0x40
 71 #define DIV8	0x60
 72 #define DIV16	0x80
 76 	0x5c00,
 78 	{ 0xffc, 4, 0, 0, 0, 0, 0x428, 0,
 79 	  0, 0xb3, 0xd3, 0x12, 0x1a5, 0x23, 0x28, 0x2d,
 [all …]
 
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| /Linux-v5.10/Documentation/devicetree/bindings/net/ | 
| D | mdio-mux-gpio.txt | 18 		#size-cells = <0>;19 		reg = <0x11800 0x00001900 0x0 0x40>;
 29 		gpios = <&gpio1 3 0>, <&gpio1 4 0>;
 32 		#size-cells = <0>;
 37 			#size-cells = <0>;
 41 				marvell,reg-init = <3 0x10 0 0x5777>,
 42 					<3 0x11 0 0x00aa>,
 43 					<3 0x12 0 0x4105>,
 44 					<3 0x13 0 0x0a60>;
 50 				marvell,reg-init = <3 0x10 0 0x5777>,
 [all …]
 
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| D | mdio-mux.txt | 9 - #size-cells = <0>;18 - #size-cells = <0>;
 28 		#size-cells = <0>;
 29 		reg = <0x11800 0x00001900 0x0 0x40>;
 39 		gpios = <&gpio1 3 0>, <&gpio1 4 0>;
 42 		#size-cells = <0>;
 47 			#size-cells = <0>;
 51 				marvell,reg-init = <3 0x10 0 0x5777>,
 52 					<3 0x11 0 0x00aa>,
 53 					<3 0x12 0 0x4105>,
 [all …]
 
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| /Linux-v5.10/arch/arm/crypto/ | 
| D | chacha-scalar-core.S | 14  * (x8, x9) to the stack and swap them out with (x10, x11).  This adds one24  * similarly for row 'd'.  (brot, drot) start out as (0, 0) but we make it such
 38 	X9_X11	.req	r9	// shared by x9 and x11
 49 	and		\t1, \in, #0xff00
 50 	and		\t2, \in, #0xff0000
 126 	// save (x8, x9); restore (x10, x11)
 127 	__strd		X8_X10, X9_X11, sp, 0
 130 	// quarterrounds: (x2, x6, x10, x14) and (x3, x7, x11, x15)
 138 	// quarterrounds: (x0, x5, x10, x15) and (x1, x6, x11, x12)
 141 	// save (x10, x11); restore (x8, x9)
 [all …]
 
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| /Linux-v5.10/arch/arm64/crypto/ | 
| D | poly1305-core.S_shipped | 29 	mov	x9,#0xfffffffc0fffffff30 	movk	x9,#0x0fff,lsl#48
 35 	and	x7,x7,x9		// &=0ffffffc0fffffff
 37 	and	x8,x8,x9		// &=0ffffffc0ffffffc
 96 	cmp	x17,#0			// is_base2_26?
 103 	ldp	x10,x11,[x1],#16	// load input
 107 	rev	x11,x11
 110 	adcs	x5,x5,x11
 117 	umulh	x11,x5,x9
 121 	adc	x13,x13,x11
 [all …]
 
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| /Linux-v5.10/arch/powerpc/boot/dts/fsl/ | 
| D | mpc8641_hpcn_36b.dts | 18 		reg = <0x0 0x00000000 0x0 0x40000000>;	// 1G at 0x022 		reg = <0x0f 0xffe05000 0x0 0x1000>;
 24 		ranges = <0 0 0xf 0xef800000 0x00800000
 25 			  2 0 0xf 0xffdf8000 0x00008000
 26 			  3 0 0xf 0xffdf0000 0x00008000>;
 28 		flash@0,0 {
 30 			reg = <0 0 0x00800000>;
 35 			partition@0 {
 37 				reg = <0x00000000 0x00300000>;
 41 				reg = <0x00300000 0x00100000>;
 [all …]
 
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| D | p2020ds.dtsi | 36 	nor@0,0 {40 		reg = <0x0 0x0 0x8000000>;
 44 		ramdisk@0 {
 45 			reg = <0x0 0x03000000>;
 50 			reg = <0x03000000 0x00e00000>;
 55 			reg = <0x03e00000 0x00200000>;
 60 			reg = <0x04000000 0x00400000>;
 65 			reg = <0x04400000 0x03b00000>;
 69 			reg = <0x07f00000 0x00080000>;
 74 			reg = <0x07f80000 0x00080000>;
 [all …]
 
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| D | mpc8641_hpcn.dts | 16 		reg = <0x00000000 0x40000000>;	// 1G at 0x020 		reg = <0xffe05000 0x1000>;
 22 		ranges = <0 0 0xef800000 0x00800000
 23 			  2 0 0xffdf8000 0x00008000
 24 			  3 0 0xffdf0000 0x00008000>;
 26 		flash@0,0 {
 28 			reg = <0 0 0x00800000>;
 33 			partition@0 {
 35 				reg = <0x00000000 0x00300000>;
 39 				reg = <0x00300000 0x00100000>;
 [all …]
 
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| /Linux-v5.10/crypto/ | 
| D | testmgr.h | 33  * @ksize:	Length of @key in bytes (0 if no key)101  * @crypt_error: When @novrfy=0, the expected error from encrypt().  When
 192 	"\x9C\xE6\x16\xCE\x62\x4A\x11\xE0\x08\x6D\x34\x1E\xBC\xAC\xA0\xA1"
 194 	"\x02\x01\x11" /* public key - integer of 1 byte */
 228 	"\x02\x01\x11" /* public key - integer of 1 byte */
 234 	"\xC9\x7F\xF3\xAD\x59\x50\xAC\xCF\xBC\x11\x1C\x76\xF1\xA9\x52\x94"
 254 	"\x13\xb4\xc1\xa1\x11\xfc\x40\x2f\x4c\x9d\xdf\x16\x76\x11\x20\x6b",
 293 	"\x77\xAF\x51\x27\x5B\x5E\x69\xB8\x81\xE6\x11\xC5\x43\x23\x81\x04"
 313 	"\xdc\xc7\x06\x9c\x2d\xe5\x11\x2c\x09\x09\x87\x09\xa9\xf6\x33\x73"
 355 	"\xdc\xc7\x06\x9c\x2d\xe5\x11\x2c\x09\x09\x87\x09\xa9\xf6\x33\x73"
 [all …]
 
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| /Linux-v5.10/drivers/media/pci/solo6x10/ | 
| D | solo6x10-tw28.c | 30 	0x00, 0xf0, 0x70, 0x30, 0x80, 0x80, 0x00, 0x02, /* 0x00 */31 	0x12, 0xf5, 0x0c, 0xd0, 0x00, 0x00, 0x00, 0x7f,
 32 	0x00, 0xf0, 0x70, 0x30, 0x80, 0x80, 0x00, 0x02, /* 0x10 */
 33 	0x12, 0xf5, 0x0c, 0xd0, 0x00, 0x00, 0x00, 0x7f,
 34 	0x00, 0xf0, 0x70, 0x30, 0x80, 0x80, 0x00, 0x02, /* 0x20 */
 35 	0x12, 0xf5, 0x0c, 0xd0, 0x00, 0x00, 0x00, 0x7f,
 36 	0x00, 0xf0, 0x70, 0x30, 0x80, 0x80, 0x00, 0x02, /* 0x30 */
 37 	0x12, 0xf5, 0x0c, 0xd0, 0x00, 0x00, 0x00, 0x7f,
 38 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x40 */
 39 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 [all …]
 
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| /Linux-v5.10/arch/x86/crypto/ | 
| D | crc32-pclmul_asm.S | 29  * CRC32 polynomial:0x04c11db7(BE)/0xEDB88320(LE)46  * [x4*128+32 mod P(x) << 32)]'  << 1   = 0x154442bd4
 47  * #define CONSTANT_R1  0x154442bd4LL
 49  * [(x4*128-32 mod P(x) << 32)]' << 1   = 0x1c6e41596
 50  * #define CONSTANT_R2  0x1c6e41596LL
 53 	.octa 0x00000001c6e415960000000154442bd4
 55  * [(x128+32 mod P(x) << 32)]'   << 1   = 0x1751997d0
 56  * #define CONSTANT_R3  0x1751997d0LL
 58  * [(x128-32 mod P(x) << 32)]'   << 1   = 0x0ccaa009e
 59  * #define CONSTANT_R4  0x0ccaa009eLL
 [all …]
 
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| /Linux-v5.10/arch/mips/boot/dts/cavium-octeon/ | 
| D | octeon_3xxx.dts | 13 	soc@0 {15 			phy0: ethernet-phy@0 {
 19 					<2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */
 21 					<3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
 23 					<3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
 24 				reg = <0>;
 31 					<2 0x15 0xffcf 0>, /* Reg 2,21 Clear bits 4, 5 */
 33 					<3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
 35 					<3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
 42 				marvell,reg-init = <3 0x10 0 0x5777>,
 [all …]
 
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| D | octeon_68xx.dts | 16 	soc@0 {26 			 * 1) Controller register (0 or 7)
 27 			 * 2) Bit within the register (0..63)
 29 			#address-cells = <0>;
 31 			reg = <0x10701 0x00000000 0x0 0x4000000>;
 37 			reg = <0x10700 0x00000800 0x0 0x100>;
 40 			 * 1) GPIO pin number (0..15)
 49 			interrupts = <7 0>,  <7 1>,  <7 2>,  <7 3>,
 58 			#size-cells = <0>;
 59 			reg = <0x11800 0x00003800 0x0 0x40>;
 [all …]
 
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| /Linux-v5.10/fs/unicode/ | 
| D | utf8data.h_shipped | 6 static const unsigned int utf8vers = 0xc0100;9 	0,
 10 	0x10100,
 11 	0x20000,
 12 	0x20100,
 13 	0x30000,
 14 	0x30100,
 15 	0x30200,
 16 	0x40000,
 17 	0x40100,
 [all …]
 
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| /Linux-v5.10/drivers/net/wireless/realtek/rtl8xxxu/ | 
| D | rtl8xxxu_8192c.c | 37 	.reg_0e00 = 0x07090c0c,38 	.reg_0e04 = 0x01020405,
 39 	.reg_0e08 = 0x00000000,
 40 	.reg_086c = 0x00000000,
 42 	.reg_0e10 = 0x0b0c0c0e,
 43 	.reg_0e14 = 0x01030506,
 44 	.reg_0e18 = 0x0b0c0d0e,
 45 	.reg_0e1c = 0x01030509,
 47 	.reg_0830 = 0x07090c0c,
 48 	.reg_0834 = 0x01020405,
 [all …]
 
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| /Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/ | 
| D | dpcs_3_0_0_sh_mask.h | 7 …0_DPCSTX_TX_CLOCK_CNTL__DPCS_SYMCLK_GATE_DIS__SHIFT                                             0x08 …0_DPCSTX_TX_CLOCK_CNTL__DPCS_SYMCLK_EN__SHIFT                                                   0x1
 9 …0_DPCSTX_TX_CLOCK_CNTL__DPCS_SYMCLK_CLOCK_ON__SHIFT                                             0x2
 10 …0_DPCSTX_TX_CLOCK_CNTL__DPCS_TX_CLK_LDPCS_CLOCK_ON__SHIFT                                       0x3
 11 …_TX_CLOCK_CNTL__DPCS_SYMCLK_GATE_DIS_MASK                                               0x00000001L
 12 …_TX_CLOCK_CNTL__DPCS_SYMCLK_EN_MASK                                                     0x00000002L
 13 …_TX_CLOCK_CNTL__DPCS_SYMCLK_CLOCK_ON_MASK                                               0x00000004L
 14 …_TX_CLOCK_CNTL__DPCS_TX_CLK_LDPCS_CLOCK_ON_MASK                                         0x00000008L
 16 …0_DPCSTX_TX_CNTL__DPCS_TX_PLL_UPDATE_REQ__SHIFT                                                 0xc
 17 …0_DPCSTX_TX_CNTL__DPCS_TX_PLL_UPDATE_PENDING__SHIFT                                             0xd
 [all …]
 
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| /Linux-v5.10/sound/pci/hda/ | 
| D | patch_cirrus.c | 66 #define CS420X_VENDOR_NID	0x1167 #define CS_DIG_OUT1_PIN_NID	0x10
 68 #define CS_DIG_OUT2_PIN_NID	0x15
 69 #define CS_DMIC1_PIN_NID	0x0e
 70 #define CS_DMIC2_PIN_NID	0x12
 73 #define IDX_SPDIF_STAT		0x0000
 74 #define IDX_SPDIF_CTL		0x0001
 75 #define IDX_ADC_CFG		0x0002
 77  * 0 = immediate,
 82 #define   CS_COEF_ADC_SZC_MASK		(3 << 0)
 [all …]
 
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