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/Linux-v5.15/Documentation/devicetree/bindings/pci/
Dti,am65-pci-host.yaml77 reg = <0x5500000 0x1000>,
78 <0x5501000 0x1000>,
79 <0x10000000 0x2000>,
80 <0x5506000 0x1000>;
85 ranges = <0x81000000 0 0 0x10020000 0 0x00010000>,
86 <0x82000000 0 0x10030000 0x10030000 0 0x07FD0000>;
89 bus-range = <0x0 0xff>;
94 msi-map = <0x0 &gic_its 0x0 0x10000>;
/Linux-v5.15/Documentation/devicetree/bindings/power/reset/
Daxxia-reset.txt14 reg = <0x20 0x10030000 0 0x2000>;
/Linux-v5.15/drivers/gpu/drm/msm/dsi/
Ddsi_cfg.h11 #define MSM_DSI_VER_MAJOR_V2 0x02
12 #define MSM_DSI_VER_MAJOR_6G 0x03
13 #define MSM_DSI_6G_VER_MINOR_V1_0 0x10000000
14 #define MSM_DSI_6G_VER_MINOR_V1_1 0x10010000
15 #define MSM_DSI_6G_VER_MINOR_V1_1_1 0x10010001
16 #define MSM_DSI_6G_VER_MINOR_V1_2 0x10020000
17 #define MSM_DSI_6G_VER_MINOR_V1_3 0x10030000
18 #define MSM_DSI_6G_VER_MINOR_V1_3_1 0x10030001
19 #define MSM_DSI_6G_VER_MINOR_V1_4_1 0x10040001
20 #define MSM_DSI_6G_VER_MINOR_V1_4_2 0x10040002
[all …]
/Linux-v5.15/arch/mips/boot/compressed/
Duart-16550.c12 #define UART_BASE 0x1fd003f8
22 #define INGENIC_UART_BASE_ADDR (0x10030000 + 0x1000 * CONFIG_ZBOOT_INGENIC_UART)
27 #define UART0_BASE 0x1EF14000
33 #define UART0_BASE 0x18030100
48 return *((volatile IOTYPE *)PORT(offset)) & 0xFF; in serial_in()
53 *((volatile IOTYPE *)PORT(offset)) = value & 0xFF; in serial_out()
60 while (((serial_in(UART_LSR) & UART_LSR_THRE) == 0) && (timeout-- > 0)) in putc()
/Linux-v5.15/arch/arm/boot/dts/
Daxm55xx.dtsi32 #clock-cells = <0>;
38 #clock-cells = <0>;
44 #clock-cells = <0>;
51 reg = <0x20 0x10020000 0 0x20000>;
58 #address-cells = <0>;
60 reg = <0x20 0x01001000 0 0x1000>,
61 <0x20 0x01002000 0 0x2000>,
62 <0x20 0x01004000 0 0x2000>,
63 <0x20 0x01006000 0 0x2000>;
97 reg = <0x20 0x10030000 0 0x2000>;
[all …]
Dexynos4210.dtsi33 #size-cells = <0>;
49 reg = <0x900>;
68 reg = <0x901>;
88 reg = <0x02020000 0x20000>;
91 ranges = <0 0x02020000 0x20000>;
93 smp-sram@0 {
95 reg = <0x0 0x1000>;
100 reg = <0x1f000 0x1000>;
106 reg = <0x10023CA0 0x20>;
107 #power-domain-cells = <0>;
[all …]
Dexynos4412.dtsi36 #size-cells = <0>;
58 reg = <0xA00>;
68 reg = <0xA01>;
78 reg = <0xA02>;
88 reg = <0xA03>;
179 reg = <0x11400000 0x1000>;
185 reg = <0x11000000 0x1000>;
197 reg = <0x03860000 0x1000>;
199 interrupts = <10 0>;
204 reg = <0x106E0000 0x1000>;
[all …]
Dexynos3250.dtsi51 #size-cells = <0>;
64 cpu0: cpu@0 {
67 reg = <0>;
111 xusbxti: clock-0 {
113 clock-frequency = <0>;
114 #clock-cells = <0>;
120 clock-frequency = <0>;
121 #clock-cells = <0>;
127 clock-frequency = <0>;
128 #clock-cells = <0>;
[all …]
/Linux-v5.15/arch/mips/boot/dts/ingenic/
Djz4740.dtsi12 #size-cells = <0>;
14 cpu0: cpu@0 {
16 compatible = "ingenic,xburst-mxu1.0";
17 reg = <0>;
25 #address-cells = <0>;
33 reg = <0x10001000 0x14>;
44 #clock-cells = <0>;
49 #clock-cells = <0>;
55 reg = <0x10000000 0x100>;
65 reg = <0x10002000 0x1000>;
[all …]
Dx1000.dtsi13 #size-cells = <0>;
15 cpu0: cpu@0 {
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
18 reg = <0>;
26 #address-cells = <0>;
34 reg = <0x10001000 0x50>;
45 #clock-cells = <0>;
50 #clock-cells = <0>;
56 reg = <0x10000000 0x100>;
59 ranges = <0x0 0x10000000 0x100>;
[all …]
Dx1830.dtsi13 #size-cells = <0>;
15 cpu0: cpu@0 {
17 compatible = "ingenic,xburst-fpu2.0-mxu2.0";
18 reg = <0>;
26 #address-cells = <0>;
34 reg = <0x10001000 0x50>;
45 #clock-cells = <0>;
50 #clock-cells = <0>;
56 reg = <0x10000000 0x100>;
59 ranges = <0x0 0x10000000 0x100>;
[all …]
Djz4725b.dtsi12 #size-cells = <0>;
14 cpu0: cpu@0 {
16 compatible = "ingenic,xburst-mxu1.0";
17 reg = <0>;
25 #address-cells = <0>;
33 reg = <0x10001000 0x14>;
44 #clock-cells = <0>;
49 #clock-cells = <0>;
55 reg = <0x10000000 0x100>;
65 reg = <0x10002000 0x1000>;
[all …]
Djz4770.dtsi12 #size-cells = <0>;
14 cpu0: cpu@0 {
16 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
17 reg = <0>;
25 #address-cells = <0>;
33 reg = <0x10001000 0x40>;
44 #clock-cells = <0>;
49 #clock-cells = <0>;
55 reg = <0x10000000 0x100>;
58 ranges = <0x0 0x10000000 0x100>;
[all …]
Djz4780.dtsi13 #size-cells = <0>;
15 cpu0: cpu@0 {
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
18 reg = <0>;
26 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
35 #address-cells = <0>;
43 reg = <0x10001000 0x50>;
54 #clock-cells = <0>;
59 #clock-cells = <0>;
65 reg = <0x10000000 0x100>;
[all …]
/Linux-v5.15/arch/riscv/boot/dts/sifive/
Dfu540-c000.dtsi24 #size-cells = <0>;
25 cpu0: cpu@0 {
31 reg = <0>;
144 compatible = "sifive,plic-1.0.0";
145 reg = <0x0 0xc000000 0x0 0x4000000>;
149 &cpu0_intc 0xffffffff
150 &cpu1_intc 0xffffffff &cpu1_intc 9
151 &cpu2_intc 0xffffffff &cpu2_intc 9
152 &cpu3_intc 0xffffffff &cpu3_intc 9
153 &cpu4_intc 0xffffffff &cpu4_intc 9>;
[all …]
Dfu740-c000.dtsi24 #size-cells = <0>;
25 cpu0: cpu@0 {
32 reg = <0x0>;
56 reg = <0x1>;
80 reg = <0x2>;
104 reg = <0x3>;
128 reg = <0x4>;
145 #address-cells = <0>;
146 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
147 reg = <0x0 0xc000000 0x0 0x4000000>;
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/clock/
Dexynos5433-clock.txt49 which generates clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1}
196 #clock-cells = <0>;
203 reg = <0x10030000 0x0c04>;
218 reg = <0x10fc0000 0x0c04>;
227 reg = <0x105b0000 0x100c>;
238 reg = <0x14c80000 0x0b08>;
244 reg = <0x10040000 0x0b20>;
250 reg = <0x156e0000 0x0b04>;
277 reg = <0x12460000 0x0b08>;
291 reg = <0x13b90000 0x0c04>;
[all …]
/Linux-v5.15/arch/arm64/boot/dts/ti/
Dk3-am65-main.dtsi12 reg = <0x0 0x70000000 0x0 0x200000>;
15 ranges = <0x0 0x0 0x70000000 0x200000>;
17 atf-sram@0 {
18 reg = <0x0 0x20000>;
22 reg = <0xf0000 0x10000>;
26 reg = <0x100000 0x100000>;
37 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
38 <0x00 0x01880000 0x00 0x90000>; /* GICR */
47 reg = <0x00 0x01820000 0x00 0x10000>;
48 socionext,synquacer-pre-its = <0x1000000 0x400000>;
[all …]
/Linux-v5.15/drivers/net/ethernet/microchip/sparx5/
Dsparx5_main.c54 { TARGET_CPU, 0, 0 }, /* 0x600000000 */
55 { TARGET_FDMA, 0x80000, 0 }, /* 0x600080000 */
56 { TARGET_PCEP, 0x400000, 0 }, /* 0x600400000 */
57 { TARGET_DEV2G5, 0x10004000, 1 }, /* 0x610004000 */
58 { TARGET_DEV5G, 0x10008000, 1 }, /* 0x610008000 */
59 { TARGET_PCS5G_BR, 0x1000c000, 1 }, /* 0x61000c000 */
60 { TARGET_DEV2G5 + 1, 0x10010000, 1 }, /* 0x610010000 */
61 { TARGET_DEV5G + 1, 0x10014000, 1 }, /* 0x610014000 */
62 { TARGET_PCS5G_BR + 1, 0x10018000, 1 }, /* 0x610018000 */
63 { TARGET_DEV2G5 + 2, 0x1001c000, 1 }, /* 0x61001c000 */
[all …]
/Linux-v5.15/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi48 #clock-cells = <0>;
53 #size-cells = <0>;
91 reg = <0x100>;
97 i-cache-size = <0x8000>;
100 d-cache-size = <0x8000>;
110 reg = <0x101>;
114 i-cache-size = <0x8000>;
117 d-cache-size = <0x8000>;
127 reg = <0x102>;
131 i-cache-size = <0x8000>;
[all …]