/Linux-v5.15/Documentation/devicetree/bindings/clock/ |
D | lsi,axm5516-clks.txt | 18 reg = <0x20 0x10020000 0 0x20000>; 23 reg = <0x20 0x10080000 0 0x1000>;
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/Linux-v5.15/Documentation/devicetree/bindings/media/ |
D | mediatek-vpu.txt | 25 reg = <0 0x10020000 0 0x30000>, 26 <0 0x10050000 0 0x100>;
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/Linux-v5.15/drivers/gpu/drm/msm/dsi/ |
D | dsi_cfg.h | 11 #define MSM_DSI_VER_MAJOR_V2 0x02 12 #define MSM_DSI_VER_MAJOR_6G 0x03 13 #define MSM_DSI_6G_VER_MINOR_V1_0 0x10000000 14 #define MSM_DSI_6G_VER_MINOR_V1_1 0x10010000 15 #define MSM_DSI_6G_VER_MINOR_V1_1_1 0x10010001 16 #define MSM_DSI_6G_VER_MINOR_V1_2 0x10020000 17 #define MSM_DSI_6G_VER_MINOR_V1_3 0x10030000 18 #define MSM_DSI_6G_VER_MINOR_V1_3_1 0x10030001 19 #define MSM_DSI_6G_VER_MINOR_V1_4_1 0x10040001 20 #define MSM_DSI_6G_VER_MINOR_V1_4_2 0x10040002 [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/sound/ |
D | ingenic,aic.yaml | 28 const: 0 77 reg = <0x10020000 0x38>; 79 #sound-dai-cells = <0>; 90 dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>;
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/Linux-v5.15/Documentation/devicetree/bindings/pwm/ |
D | pwm-sifive.yaml | 67 reg = <0x10020000 0x1000>;
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/Linux-v5.15/Documentation/devicetree/bindings/pci/ |
D | ti,am65-pci-host.yaml | 77 reg = <0x5500000 0x1000>, 78 <0x5501000 0x1000>, 79 <0x10000000 0x2000>, 80 <0x5506000 0x1000>; 85 ranges = <0x81000000 0 0 0x10020000 0 0x00010000>, 86 <0x82000000 0 0x10030000 0x10030000 0 0x07FD0000>; 89 bus-range = <0x0 0xff>; 94 msi-map = <0x0 &gic_its 0x0 0x10000>;
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/Linux-v5.15/Documentation/devicetree/bindings/display/ |
D | arm,pl11x.txt | 66 arm,pl11x,tft-r0g0b0-pads = <0 8 16>; 68 arm,pl11x,tft-r0g0b0-pads = <16 8 0>; 75 reg = <0x10020000 0x1000>; 77 interrupts = <0 44 4>;
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/Linux-v5.15/arch/arm/boot/dts/ |
D | axm55xx.dtsi | 32 #clock-cells = <0>; 38 #clock-cells = <0>; 44 #clock-cells = <0>; 51 reg = <0x20 0x10020000 0 0x20000>; 58 #address-cells = <0>; 60 reg = <0x20 0x01001000 0 0x1000>, 61 <0x20 0x01002000 0 0x2000>, 62 <0x20 0x01004000 0 0x2000>, 63 <0x20 0x01006000 0 0x2000>; 97 reg = <0x20 0x10030000 0 0x2000>; [all …]
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D | vexpress-v2p-ca9.dts | 16 arm,hbi = <0x191>; 17 arm,vexpress,site = <0xf>; 36 #size-cells = <0>; 38 A9_0: cpu@0 { 41 reg = <0>; 69 reg = <0x60000000 0x40000000>; 77 /* Chipselect 3 is physically at 0x4c000000 */ 81 reg = <0x4c000000 0x00800000>; 88 reg = <0x10020000 0x1000>; 90 interrupts = <0 44 4>; [all …]
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D | arm-realview-eb.dtsi | 43 /* 128 MiB memory @ 0x0 */ 44 reg = <0x00000000 0x08000000>; 48 vmmc: fixedregulator@0 { 57 #clock-cells = <0>; 63 #clock-cells = <0>; 71 #clock-cells = <0>; 79 #clock-cells = <0>; 87 #clock-cells = <0>; 95 #clock-cells = <0>; 103 #clock-cells = <0>; [all …]
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D | arm-realview-pbx.dtsi | 44 /* 128 MiB memory @ 0x0 */ 45 reg = <0x00000000 0x08000000>; 66 #clock-cells = <0>; 72 #clock-cells = <0>; 78 #clock-cells = <0>; 86 #clock-cells = <0>; 94 #clock-cells = <0>; 102 #clock-cells = <0>; 110 #clock-cells = <0>; 118 #clock-cells = <0>; [all …]
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D | imx27.dtsi | 47 reg = <0x10040000 0x1000>; 53 #clock-cells = <0>; 59 #size-cells = <0>; 62 cpu: cpu@0 { 64 reg = <0>; 88 reg = <0x10000000 0x20000>; 93 reg = <0x10001000 0x1000>; 104 reg = <0x10002000 0x1000>; 111 reg = <0x10003000 0x1000>; 120 reg = <0x10004000 0x1000>; [all …]
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D | arm-realview-pb11mp.dts | 45 * The PB11MPCore has 512 MiB memory @ 0x70000000 46 * and the first 256 are also remapped @ 0x00000000 48 reg = <0x70000000 0x20000000>; 53 #size-cells = <0>; 56 MP11_0: cpu@0 { 59 reg = <0>; 91 reg = <0x1f001000 0x1000>, 92 <0x1f000100 0x100>; 97 reg = <0x1f002000 0x1000>; 99 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>, [all …]
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D | exynos4412.dtsi | 36 #size-cells = <0>; 58 reg = <0xA00>; 68 reg = <0xA01>; 78 reg = <0xA02>; 88 reg = <0xA03>; 179 reg = <0x11400000 0x1000>; 185 reg = <0x11000000 0x1000>; 197 reg = <0x03860000 0x1000>; 199 interrupts = <10 0>; 204 reg = <0x106E0000 0x1000>; [all …]
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D | exynos3250.dtsi | 51 #size-cells = <0>; 64 cpu0: cpu@0 { 67 reg = <0>; 111 xusbxti: clock-0 { 113 clock-frequency = <0>; 114 #clock-cells = <0>; 120 clock-frequency = <0>; 121 #clock-cells = <0>; 127 clock-frequency = <0>; 128 #clock-cells = <0>; [all …]
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D | exynos4.dtsi | 68 reg = <0x03810000 0x0C>; 79 reg = <0x03830000 0x100>; 88 samsung,idma-addr = <0x03000000>; 95 reg = <0x10000000 0x100>; 100 reg = <0x10500000 0x2000>; 105 reg = <0x12570000 0x14>; 116 reg = <0x10023C40 0x20>; 117 #power-domain-cells = <0>; 123 reg = <0x10023C60 0x20>; 124 #power-domain-cells = <0>; [all …]
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/Linux-v5.15/arch/mips/boot/dts/ingenic/ |
D | jz4740.dtsi | 12 #size-cells = <0>; 14 cpu0: cpu@0 { 16 compatible = "ingenic,xburst-mxu1.0"; 17 reg = <0>; 25 #address-cells = <0>; 33 reg = <0x10001000 0x14>; 44 #clock-cells = <0>; 49 #clock-cells = <0>; 55 reg = <0x10000000 0x100>; 65 reg = <0x10002000 0x1000>; [all …]
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D | jz4725b.dtsi | 12 #size-cells = <0>; 14 cpu0: cpu@0 { 16 compatible = "ingenic,xburst-mxu1.0"; 17 reg = <0>; 25 #address-cells = <0>; 33 reg = <0x10001000 0x14>; 44 #clock-cells = <0>; 49 #clock-cells = <0>; 55 reg = <0x10000000 0x100>; 65 reg = <0x10002000 0x1000>; [all …]
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D | jz4770.dtsi | 12 #size-cells = <0>; 14 cpu0: cpu@0 { 16 compatible = "ingenic,xburst-fpu1.0-mxu1.1"; 17 reg = <0>; 25 #address-cells = <0>; 33 reg = <0x10001000 0x40>; 44 #clock-cells = <0>; 49 #clock-cells = <0>; 55 reg = <0x10000000 0x100>; 58 ranges = <0x0 0x10000000 0x100>; [all …]
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/Linux-v5.15/arch/riscv/boot/dts/sifive/ |
D | fu540-c000.dtsi | 24 #size-cells = <0>; 25 cpu0: cpu@0 { 31 reg = <0>; 144 compatible = "sifive,plic-1.0.0"; 145 reg = <0x0 0xc000000 0x0 0x4000000>; 149 &cpu0_intc 0xffffffff 150 &cpu1_intc 0xffffffff &cpu1_intc 9 151 &cpu2_intc 0xffffffff &cpu2_intc 9 152 &cpu3_intc 0xffffffff &cpu3_intc 9 153 &cpu4_intc 0xffffffff &cpu4_intc 9>; [all …]
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D | fu740-c000.dtsi | 24 #size-cells = <0>; 25 cpu0: cpu@0 { 32 reg = <0x0>; 56 reg = <0x1>; 80 reg = <0x2>; 104 reg = <0x3>; 128 reg = <0x4>; 145 #address-cells = <0>; 146 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; 147 reg = <0x0 0xc000000 0x0 0x4000000>; [all …]
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/Linux-v5.15/arch/powerpc/boot/dts/ |
D | akebono.dts | 14 /memreserve/ 0x01f00000 0x00100000; // spin table 21 dcr-parent = <&{/cpus/cpu@0}>; 29 #size-cells = <0>; 31 cpu@0 { 34 reg = <0>; 59 cpu-release-addr = <0x0 0x01f00000>; 65 reg = <0x0 0x0 0x0 0x0>; // filled in by zImage 71 dcr-reg = <0xffc00000 0x00040000>; 72 #address-cells = <0>; 73 #size-cells = <0>; [all …]
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/Linux-v5.15/drivers/net/ethernet/microchip/sparx5/ |
D | sparx5_main.c | 54 { TARGET_CPU, 0, 0 }, /* 0x600000000 */ 55 { TARGET_FDMA, 0x80000, 0 }, /* 0x600080000 */ 56 { TARGET_PCEP, 0x400000, 0 }, /* 0x600400000 */ 57 { TARGET_DEV2G5, 0x10004000, 1 }, /* 0x610004000 */ 58 { TARGET_DEV5G, 0x10008000, 1 }, /* 0x610008000 */ 59 { TARGET_PCS5G_BR, 0x1000c000, 1 }, /* 0x61000c000 */ 60 { TARGET_DEV2G5 + 1, 0x10010000, 1 }, /* 0x610010000 */ 61 { TARGET_DEV5G + 1, 0x10014000, 1 }, /* 0x610014000 */ 62 { TARGET_PCS5G_BR + 1, 0x10018000, 1 }, /* 0x610018000 */ 63 { TARGET_DEV2G5 + 2, 0x1001c000, 1 }, /* 0x61001c000 */ [all …]
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/Linux-v5.15/arch/arm64/boot/dts/mediatek/ |
D | mt8173.dtsi | 136 #size-cells = <0>; 158 cpu0: cpu@0 { 161 reg = <0x000>; 176 reg = <0x001>; 191 reg = <0x100>; 206 reg = <0x101>; 221 CPU_SLEEP_0: cpu-sleep-0 { 227 arm,psci-suspend-param = <0x0010000>; 249 cpu_suspend = <0x84000001>; 250 cpu_off = <0x84000002>; [all …]
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/Linux-v5.15/drivers/s390/crypto/ |
D | zcrypt_ep11misc.c | 33 static const u8 def_iv[16] = { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 34 0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff }; 54 rc = 0; in card_cache_fetch() 65 int found = 0; in card_cache_update() 135 DBF("%s key check failed, type 0x%02x != 0x%02x\n", in ep11_check_aes_key_with_hdr() 139 if (hdr->hver != 0x00) { in ep11_check_aes_key_with_hdr() 141 DBF("%s key check failed, header version 0x%02x != 0x00\n", in ep11_check_aes_key_with_hdr() 147 DBF("%s key check failed, version 0x%02x != 0x%02x\n", in ep11_check_aes_key_with_hdr() 166 DBF("%s key check failed, blob magic 0x%04x != 0x%04x\n", in ep11_check_aes_key_with_hdr() 179 return 0; in ep11_check_aes_key_with_hdr() [all …]
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