Searched +full:0 +full:x10007000 (Results 1 – 18 of 18) sorted by relevance
52 reg = <0x10007000 0x1000>;
38 reg = <0 0x10007000 0 0x100>;
17 #size-cells = <0>;19 cpu@0 {22 reg = <0x0>;27 reg = <0x1>;32 reg = <0x2>;37 reg = <0x3>;44 #clock-cells = <0>;50 #clock-cells = <0>;56 #clock-cells = <0>;61 reg = <0x10008000 0x80>;[all …]
43 /* 128 MiB memory @ 0x0 */44 reg = <0x00000000 0x08000000>;48 vmmc: fixedregulator@0 {57 #clock-cells = <0>;63 #clock-cells = <0>;71 #clock-cells = <0>;79 #clock-cells = <0>;87 #clock-cells = <0>;95 #clock-cells = <0>;103 #clock-cells = <0>;[all …]
44 /* 128 MiB memory @ 0x0 */45 reg = <0x00000000 0x08000000>;66 #clock-cells = <0>;72 #clock-cells = <0>;78 #clock-cells = <0>;86 #clock-cells = <0>;94 #clock-cells = <0>;102 #clock-cells = <0>;110 #clock-cells = <0>;118 #clock-cells = <0>;[all …]
47 reg = <0x10040000 0x1000>;53 #clock-cells = <0>;59 #size-cells = <0>;62 cpu: cpu@0 {64 reg = <0>;88 reg = <0x10000000 0x20000>;93 reg = <0x10001000 0x1000>;104 reg = <0x10002000 0x1000>;111 reg = <0x10003000 0x1000>;120 reg = <0x10004000 0x1000>;[all …]
45 /* 128 MiB memory @ 0x0 */46 reg = <0x00000000 0x08000000>;67 #clock-cells = <0>;73 #clock-cells = <0>;81 #clock-cells = <0>;89 #clock-cells = <0>;97 #clock-cells = <0>;105 #clock-cells = <0>;113 pclk: pclk@0 {114 #clock-cells = <0>;[all …]
25 #size-cells = <0>;28 cpu@0 {31 reg = <0x0>;36 reg = <0x1>;41 reg = <0x2>;46 reg = <0x3>;57 reg = <0 0x80002000 0 0x1000>;64 #clock-cells = <0>;70 #clock-cells = <0>;73 clk26m: oscillator@0 {[all …]
45 * The PB11MPCore has 512 MiB memory @ 0x7000000046 * and the first 256 are also remapped @ 0x0000000048 reg = <0x70000000 0x20000000>;53 #size-cells = <0>;56 MP11_0: cpu@0 {59 reg = <0>;91 reg = <0x1f001000 0x1000>,92 <0x1f000100 0x100>;97 reg = <0x1f002000 0x1000>;99 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>,[all …]
73 #size-cells = <0>;76 cpu0: cpu@0 {79 reg = <0x0>;91 reg = <0x1>;103 reg = <0x2>;115 reg = <0x3>;137 #clock-cells = <0>;142 #clock-cells = <0>;147 clk26m: oscillator-0 {149 #clock-cells = <0>;[all …]
24 #size-cells = <0>;26 cpu0: cpu@0 {30 reg = <0x000>;39 reg = <0x001>;48 reg = <0x002>;57 reg = <0x003>;66 reg = <0x100>;75 reg = <0x101>;84 reg = <0x102>;93 reg = <0x103>;[all …]
25 #size-cells = <0>;27 cpu0: cpu@0 {31 reg = <0x000>;38 reg = <0x001>;45 reg = <0x002>;52 reg = <0x003>;59 reg = <0x100>;66 reg = <0x101>;73 reg = <0x102>;80 reg = <0x103>;[all …]
21 cluster0_opp: opp-table-0 {48 #size-cells = <0>;50 cpu0: cpu@0 {53 reg = <0x0>;66 reg = <0x1>;79 reg = <0x2>;92 reg = <0x3>;105 CPU_SLEEP_0_0: cpu-sleep-0-0 {110 arm,psci-suspend-param = <0x0010000>;113 CLUSTER_SLEEP_0: cluster-sleep-0 {[all …]
23 #size-cells = <0>;63 cpu0: cpu@0 {66 reg = <0x000>;78 reg = <0x100>;90 reg = <0x200>;102 reg = <0x300>;114 reg = <0x400>;126 reg = <0x500>;138 reg = <0x600>;150 reg = <0x700>;[all …]
53 cluster0_opp: opp-table-0 {129 #size-cells = <0>;151 cpu0: cpu@0 {154 reg = <0x000>;169 reg = <0x001>;184 reg = <0x100>;199 reg = <0x101>;214 CPU_SLEEP_0: cpu-sleep-0 {220 arm,psci-suspend-param = <0x0010000>;242 cpu_suspend = <0x84000001>;[all …]
34 #clock-cells = <0>;41 #clock-cells = <0>;48 #size-cells = <0>;50 cpu0: cpu@0 {53 reg = <0x000>;64 reg = <0x100>;75 reg = <0x200>;86 reg = <0x300>;97 reg = <0x400>;108 reg = <0x500>;[all …]
293 #size-cells = <0>;327 cpu0: cpu@0 {330 reg = <0x000>;346 reg = <0x001>;362 reg = <0x002>;378 reg = <0x003>;394 reg = <0x100>;410 reg = <0x101>;426 reg = <0x102>;442 reg = <0x103>;[all …]
30 #size-cells = <0>;32 cpu0: cpu@0 {35 reg = <0x000>;37 performance-domains = <&performance 0>;48 reg = <0x100>;50 performance-domains = <&performance 0>;61 reg = <0x200>;63 performance-domains = <&performance 0>;74 reg = <0x300>;76 performance-domains = <&performance 0>;[all …]
