Searched +full:0 +full:x100002 (Results 1 – 5 of 5) sorted by relevance
/Linux-v6.1/Documentation/devicetree/bindings/spi/ |
D | st,stm32-qspi.yaml | 65 reg = <0x58003000 0x1000>, <0x70000000 0x10000000>; 68 dmas = <&mdma1 22 0x10 0x100002 0x0 0x0>, 69 <&mdma1 22 0x10 0x100008 0x0 0x0>; 75 #size-cells = <0>; 77 flash@0 { 79 reg = <0>;
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/Linux-v6.1/arch/arm/mach-pxa/ |
D | viper.h | 28 #define VIPER_CPLD_BASE (0xf0000000) 29 #define VIPER_PC104IO_BASE (0xf1000000) 30 #define VIPER_USB_BASE (0xf1800000) 32 #define VIPER_ETH_GPIO (0) 63 #define _VIPER_LO_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100000) 64 #define _VIPER_ICR_PHYS (VIPER_CPLD_PHYS + 0x100002) 65 #define _VIPER_HI_IRQ_STATUS (VIPER_CPLD_PHYS + 0x100004) 66 #define _VIPER_VERSION_PHYS (VIPER_CPLD_PHYS + 0x100006) 67 #define VIPER_UARTA_PHYS (VIPER_CPLD_PHYS + 0x300010) 68 #define VIPER_UARTB_PHYS (VIPER_CPLD_PHYS + 0x300000) [all …]
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/Linux-v6.1/arch/m68k/include/asm/ |
D | m523xsim.h | 24 #define MCFICM_INTC0 (MCF_IPSBAR + 0x0c00) /* Base for Interrupt Ctrl 0 */ 25 #define MCFICM_INTC1 (MCF_IPSBAR + 0x0d00) /* Base for Interrupt Ctrl 0 */ 27 #define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */ 28 #define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */ 29 #define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */ 30 #define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */ 31 #define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */ 32 #define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */ 33 #define MCFINTC_IRLR 0x18 /* */ 34 #define MCFINTC_IACKL 0x19 /* */ [all …]
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D | m527xsim.h | 24 #define MCFICM_INTC0 (MCF_IPSBAR + 0x0c00) /* Base for Interrupt Ctrl 0 */ 25 #define MCFICM_INTC1 (MCF_IPSBAR + 0x0d00) /* Base for Interrupt Ctrl 1 */ 27 #define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */ 28 #define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */ 29 #define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */ 30 #define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */ 31 #define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */ 32 #define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */ 33 #define MCFINTC_IRLR 0x18 /* */ 34 #define MCFINTC_IACKL 0x19 /* */ [all …]
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/Linux-v6.1/sound/pci/hda/ |
D | patch_realtek.c | 163 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_COEF_INDEX, coef_idx); in __alc_read_coefex_idx() 164 val = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PROC_COEF, 0); in __alc_read_coefex_idx() 180 alc_read_coefex_idx(codec, 0x20, coef_idx) 185 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_COEF_INDEX, coef_idx); in __alc_write_coefex_idx() 186 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_PROC_COEF, coef_val); in __alc_write_coefex_idx() 198 alc_write_coefex_idx(codec, 0x20, coef_idx, coef_val) 221 alc_update_coefex_idx(codec, 0x20, coef_idx, mask, bits_set) 223 /* a special bypass for COEF 0; read the cached value at the second time */ 229 spec->coef0 = alc_read_coef_idx(codec, 0); in alc_get_coef0() 244 #define WRITE_COEF(_idx, _val) WRITE_COEFEX(0x20, _idx, _val) [all …]
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