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/Linux-v5.15/Documentation/devicetree/bindings/pinctrl/
Dqcom,sm8250-pinctrl.yaml68 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"
136 reg = <0x0f100000 0x300000>,
137 <0x0f500000 0x300000>,
138 <0x0f900000 0x300000>;
145 gpio-ranges = <&tlmm 0 0 180>;
Dqcom,sm8350-pinctrl.yaml64 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-3])$"
118 reg = <0x0f100000 0x300000>;
124 gpio-ranges = <&tlmm 0 0 203>;
Dqcom,sdx55-pinctrl.yaml63 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$"
138 reg = <0x0f100000 0x300000>;
141 gpio-ranges = <&tlmm 0 0 108>;
/Linux-v5.15/drivers/video/fbdev/geode/
Dvideo_gx.c34 { 40123, POSTDIV3, 0x00000BF2 }, /* 24.9230 */
35 { 39721, 0, 0x00000037 }, /* 25.1750 */
36 { 35308, POSTDIV3|PREMULT2, 0x00000B1A }, /* 28.3220 */
37 { 31746, POSTDIV3, 0x000002D2 }, /* 31.5000 */
38 { 27777, POSTDIV3|PREMULT2, 0x00000FE2 }, /* 36.0000 */
39 { 26666, POSTDIV3, 0x0000057A }, /* 37.5000 */
40 { 25000, POSTDIV3, 0x0000030A }, /* 40.0000 */
41 { 22271, 0, 0x00000063 }, /* 44.9000 */
42 { 20202, 0, 0x0000054B }, /* 49.5000 */
43 { 20000, 0, 0x0000026E }, /* 50.0000 */
[all …]
/Linux-v5.15/arch/arm64/boot/dts/ti/
Dk3-am64-main.dtsi13 #clock-cells = <0>;
15 clock-frequency = <0>;
22 reg = <0x00 0x70000000 0x00 0x200000>;
25 ranges = <0x0 0x00 0x70000000 0x200000>;
28 reg = <0x1c0000 0x20000>;
32 reg = <0x1e0000 0x1c000>;
36 reg = <0x1fc000 0x4000>;
42 reg = <0x0 0x43000000 0x0 0x20000>;
45 ranges = <0x0 0x0 0x43000000 0x20000>;
50 mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */
[all …]
/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dsm8350.dtsi28 #clock-cells = <0>;
36 #clock-cells = <0>;
42 #size-cells = <0>;
44 CPU0: cpu@0 {
47 reg = <0x0 0x0>;
50 qcom,freq-domain = <&cpufreq_hw 0>;
64 reg = <0x0 0x100>;
67 qcom,freq-domain = <&cpufreq_hw 0>;
78 reg = <0x0 0x200>;
81 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsc7280.dtsi37 #clock-cells = <0>;
43 #clock-cells = <0>;
53 reg = <0x0 0x80800000 0x0 0x60000>;
58 reg = <0x0 0x80860000 0x0 0x20000>;
64 reg = <0x0 0x80900000 0x0 0x200000>;
70 reg = <0x0 0x80b00000 0x0 0x100000>;
74 reg = <0 0x8b700000 0 0x10000>;
81 #size-cells = <0>;
83 CPU0: cpu@0 {
86 reg = <0x0 0x0>;
[all …]
Dsm8250.dtsi78 #clock-cells = <0>;
86 #clock-cells = <0>;
92 #size-cells = <0>;
94 CPU0: cpu@0 {
97 reg = <0x0 0x0>;
102 qcom,freq-domain = <&cpufreq_hw 0>;
116 reg = <0x0 0x100>;
121 qcom,freq-domain = <&cpufreq_hw 0>;
132 reg = <0x0 0x200>;
137 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]