Searched +full:0 +full:x0af00000 (Results 1 – 10 of 10) sorted by relevance
| /Linux-v6.1/Documentation/devicetree/bindings/clock/ |
| D | qcom,dispcc-sm6350.yaml | 69 reg = <0x0af00000 0x20000>;
72 <&dsi_phy 0>,
74 <&dp_phy 0>,
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| D | qcom,sc7180-dispcc.yaml | 69 reg = <0x0af00000 0x200000>;
72 <&dsi_phy 0>,
74 <&dp_phy 0>,
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| D | qcom,sc7280-dispcc.yaml | 73 reg = <0x0af00000 0x200000>;
76 <&dsi_phy 0>,
78 <&dp_phy 0>,
80 <&edp_phy 0>,
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| D | qcom,sdm845-dispcc.yaml | 78 reg = <0x0af00000 0x10000>;
82 <&dsi0_phy 0>,
84 <&dsi1_phy 0>,
86 <&dp_phy 0>,
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| D | qcom,dispcc-sm8x50.yaml | 88 reg = <0x0af00000 0x10000>;
90 <&dsi0_phy 0>,
92 <&dsi1_phy 0>,
94 <&dp_phy 0>,
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| D | qcom,sm8450-dispcc.yaml | 83 reg = <0x0af00000 0x10000>;
88 <&dsi0_phy 0>,
90 <&dsi1_phy 0>,
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| /Linux-v6.1/arch/arm64/boot/dts/qcom/ |
| D | sm8350.dtsi | 30 #clock-cells = <0>;
38 #clock-cells = <0>;
41 ufs_phy_rx_symbol_0_clk: ufs-phy-rx-symbol-0 {
44 #clock-cells = <0>;
50 #clock-cells = <0>;
53 ufs_phy_tx_symbol_0_clk: ufs-phy-tx-symbol-0 {
56 #clock-cells = <0>;
62 #size-cells = <0>;
64 CPU0: cpu@0 {
67 reg = <0x0 0x0>;
[all …]
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| D | sc7180.dtsi | 61 #clock-cells = <0>;
67 #clock-cells = <0>;
77 reg = <0x0 0x80000000 0x0 0x600000>;
82 reg = <0x0 0x80600000 0x0 0x200000>;
87 reg = <0x0 0x80800000 0x0 0x20000>;
92 reg = <0x0 0x80820000 0x0 0x20000>;
98 reg = <0x0 0x808ff000 0x0 0x1000>;
103 reg = <0x0 0x80900000 0x0 0x200000>;
108 reg = <0x0 0x80b00000 0x0 0x3900000>;
113 reg = <0 0x8b700000 0 0x10000>;
[all …]
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| D | sdm845.dtsi | 75 reg = <0 0x80000000 0 0>;
84 reg = <0 0x85700000 0 0x600000>;
89 reg = <0 0x85e00000 0 0x100000>;
94 reg = <0 0x85fc0000 0 0x20000>;
100 reg = <0x0 0x85fe0000 0 0x20000>;
106 reg = <0x0 0x86000000 0 0x200000>;
112 reg = <0 0x86200000 0 0x2d00000>;
118 reg = <0 0x88f00000 0 0x200000>;
126 reg = <0 0x8ab00000 0 0x1400000>;
131 reg = <0 0x8bf00000 0 0x500000>;
[all …]
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| D | sm8250.dtsi | 80 #clock-cells = <0>;
88 #clock-cells = <0>;
94 #size-cells = <0>;
96 CPU0: cpu@0 {
99 reg = <0x0 0x0>;
106 qcom,freq-domain = <&cpufreq_hw 0>;
123 reg = <0x0 0x100>;
130 qcom,freq-domain = <&cpufreq_hw 0>;
144 reg = <0x0 0x200>;
151 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
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