Home
last modified time | relevance | path

Searched +full:0 +full:x0ae94a00 (Results 1 – 8 of 8) sorted by relevance

/Linux-v6.6/Documentation/devicetree/bindings/display/msm/
Ddsi-phy-14nm.yaml63 reg = <0x0ae94400 0x200>,
64 <0x0ae94600 0x280>,
65 <0x0ae94a00 0x1e0>;
71 #phy-cells = <0>;
Ddsi-phy-10nm.yaml82 reg = <0x0ae94400 0x200>,
83 <0x0ae94600 0x280>,
84 <0x0ae94a00 0x1e0>;
90 #phy-cells = <0>;
97 qcom,phy-rescode-offset-top = /bits/ 8 <0 0 0 0 0>;
98 qcom,phy-rescode-offset-bot = /bits/ 8 <0 0 0 0 0>;
Dqcom,sm6350-mdss.yaml44 "^display-controller@[0-9a-f]+$":
50 "^dsi@[0-9a-f]+$":
58 "^phy@[0-9a-f]+$":
76 reg = <0x0ae00000 0x1000>;
90 iommus = <&apps_smmu 0x800 0x2>;
97 reg = <0x0ae01000 0x8f000>,
98 <0x0aeb0000 0x2008>;
120 interrupts = <0>;
126 #size-cells = <0>;
128 port@0 {
[all …]
Dqcom,sdm845-mdss.yaml43 "^display-controller@[0-9a-f]+$":
49 "^displayport-controller@[0-9a-f]+$":
55 "^dsi@[0-9a-f]+$":
63 "^phy@[0-9a-f]+$":
86 reg = <0x0ae00000 0x1000>;
98 iommus = <&apps_smmu 0x880 0x8>,
99 <&apps_smmu 0xc80 0x8>;
104 reg = <0x0ae01000 0x8f000>,
105 <0x0aeb0000 0x2008>;
116 interrupts = <0>;
[all …]
Dqcom,sc7180-mdss.yaml45 "^display-controller@[0-9a-f]+$":
51 "^displayport-controller@[0-9a-f]+$":
57 "^dsi@[0-9a-f]+$":
65 "^phy@[0-9a-f]+$":
89 reg = <0xae00000 0x1000>;
104 iommus = <&apps_smmu 0x800 0x2>;
109 reg = <0x0ae01000 0x8f000>,
110 <0x0aeb0000 0x2008>;
124 interrupts = <0>;
130 #size-cells = <0>;
[all …]
/Linux-v6.6/arch/arm64/boot/dts/qcom/
Dsm6350.dtsi31 #clock-cells = <0>;
39 #clock-cells = <0>;
45 #size-cells = <0>;
47 CPU0: cpu@0 {
50 reg = <0x0 0x0>;
51 clocks = <&cpufreq_hw 0>;
56 qcom,freq-domain = <&cpufreq_hw 0>;
80 reg = <0x0 0x100>;
81 clocks = <&cpufreq_hw 0>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsc7180.dtsi62 #clock-cells = <0>;
68 #clock-cells = <0>;
74 #size-cells = <0>;
76 CPU0: cpu@0 {
79 reg = <0x0 0x0>;
80 clocks = <&cpufreq_hw 0>;
91 qcom,freq-domain = <&cpufreq_hw 0>;
108 reg = <0x0 0x100>;
109 clocks = <&cpufreq_hw 0>;
120 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsdm845.dtsi76 #clock-cells = <0>;
83 #clock-cells = <0>;
90 #size-cells = <0>;
92 CPU0: cpu@0 {
95 reg = <0x0 0x0>;
96 clocks = <&cpufreq_hw 0>;
100 qcom,freq-domain = <&cpufreq_hw 0>;
124 reg = <0x0 0x100>;
125 clocks = <&cpufreq_hw 0>;
129 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]