Searched +full:0 +full:x0ae94600 (Results 1 – 7 of 7) sorted by relevance
/Linux-v6.1/Documentation/devicetree/bindings/display/msm/ |
D | dsi-phy-14nm.yaml | 52 reg = <0x0ae94400 0x200>, 53 <0x0ae94600 0x280>, 54 <0x0ae94a00 0x1e0>; 60 #phy-cells = <0>;
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D | dsi-phy-7nm.yaml | 36 Connected to VDD_A_DSI_PLL_0P9 pin (or VDDA_DSI{0,1}_PLL_0P9 for sm8150) 58 reg = <0x0ae94400 0x200>, 59 <0x0ae94600 0x280>, 60 <0x0ae94900 0x260>; 66 #phy-cells = <0>;
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D | dsi-phy-10nm.yaml | 83 reg = <0x0ae94400 0x200>, 84 <0x0ae94600 0x280>, 85 <0x0ae94a00 0x1e0>; 91 #phy-cells = <0>; 98 qcom,phy-rescode-offset-top = /bits/ 8 <0 0 0 0 0>; 99 qcom,phy-rescode-offset-bot = /bits/ 8 <0 0 0 0 0>;
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/Linux-v6.1/arch/arm64/boot/dts/qcom/ |
D | sc7180.dtsi | 61 #clock-cells = <0>; 67 #clock-cells = <0>; 77 reg = <0x0 0x80000000 0x0 0x600000>; 82 reg = <0x0 0x80600000 0x0 0x200000>; 87 reg = <0x0 0x80800000 0x0 0x20000>; 92 reg = <0x0 0x80820000 0x0 0x20000>; 98 reg = <0x0 0x808ff000 0x0 0x1000>; 103 reg = <0x0 0x80900000 0x0 0x200000>; 108 reg = <0x0 0x80b00000 0x0 0x3900000>; 113 reg = <0 0x8b700000 0 0x10000>; [all …]
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D | sdm845.dtsi | 75 reg = <0 0x80000000 0 0>; 84 reg = <0 0x85700000 0 0x600000>; 89 reg = <0 0x85e00000 0 0x100000>; 94 reg = <0 0x85fc0000 0 0x20000>; 100 reg = <0x0 0x85fe0000 0 0x20000>; 106 reg = <0x0 0x86000000 0 0x200000>; 112 reg = <0 0x86200000 0 0x2d00000>; 118 reg = <0 0x88f00000 0 0x200000>; 126 reg = <0 0x8ab00000 0 0x1400000>; 131 reg = <0 0x8bf00000 0 0x500000>; [all …]
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D | sc7280.dtsi | 77 #clock-cells = <0>; 83 #clock-cells = <0>; 94 reg = <0x0 0x004cd000 0x0 0x1000>; 98 reg = <0x0 0x80000000 0x0 0x600000>; 103 reg = <0x0 0x80600000 0x0 0x200000>; 108 reg = <0x0 0x80800000 0x0 0x60000>; 113 reg = <0x0 0x80860000 0x0 0x20000>; 119 reg = <0x0 0x80884000 0x0 0x10000>; 124 reg = <0x0 0x808ff000 0x0 0x1000>; 129 reg = <0x0 0x80900000 0x0 0x200000>; [all …]
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D | sm8250.dtsi | 80 #clock-cells = <0>; 88 #clock-cells = <0>; 94 #size-cells = <0>; 96 CPU0: cpu@0 { 99 reg = <0x0 0x0>; 106 qcom,freq-domain = <&cpufreq_hw 0>; 123 reg = <0x0 0x100>; 130 qcom,freq-domain = <&cpufreq_hw 0>; 144 reg = <0x0 0x200>; 151 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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