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/Linux-v6.1/arch/arm/boot/compressed/
Dhead-sharpsl.S29 mov r1, #0x10000000 @ Base address of TC6393 chip
30 mov r6, #0x03
31 ldrh r3, [r1, #8] @ Load TC6393XB Revison: This is 0x0003
36 mrc p15, 0, r4, c0, c0 @ Get Processor ID
37 and r4, r4, #0xffffff00
45 mov r6, #0x31 @ Load Magic Init value
46 str r6, [r1, #0x280] @ to SCRATCH_UMSK
47 mov r5, #0x3000
51 mov r6, #0x30 @ Load 2nd Magic Init value
52 str r6, [r1, #0x280] @ to SCRATCH_UMSK
[all …]
/Linux-v6.1/drivers/media/i2c/cx25840/
Dcx25840-audio.c39 * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04 in cx25840_set_audclk_freq()
40 * AUX_PLL Integer = 0x06, AUX PLL Post Divider = 0x10 in cx25840_set_audclk_freq()
42 cx25840_write4(client, 0x108, 0x1006040f); in cx25840_set_audclk_freq()
45 * VID_PLL Fraction (register 0x10c) = 0x2be2fe in cx25840_set_audclk_freq()
46 * 28636360 * 0xf.15f17f0/4 = 108 MHz in cx25840_set_audclk_freq()
51 * AUX_PLL Fraction = 0x1bb39ee in cx25840_set_audclk_freq()
52 * 28636363 * 0x6.dd9cf70/0x10 = 32000 * 384 in cx25840_set_audclk_freq()
57 cx25840_write4(client, 0x110, 0x01bb39ee); in cx25840_set_audclk_freq()
61 * SA_MCLK_DIV = 0x10 = 384/384 * AUX_PLL post dvivider in cx25840_set_audclk_freq()
63 cx25840_write(client, 0x127, 0x50); in cx25840_set_audclk_freq()
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/memory-controllers/
Dst,stm32-fmc2-ebi.yaml46 <bank-number> 0 <address of the bank> <size>
49 "^.*@[0-4],[a-f0-9]+$":
59 0: Asynchronous mode 1 SRAM/FRAM.
72 minimum: 0
123 enum: [ 0, 128, 256, 512, 1024 ]
124 default: 0
183 reaches 0, the controller splits the current access, toggles NE to
208 reg = <0x58002000 0x1000>;
212 ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
213 <1 0 0x64000000 0x04000000>, /* EBI CS 2 */
[all …]
/Linux-v6.1/arch/powerpc/boot/dts/
Dbluestone.dts16 dcr-parent = <&{/cpus/cpu@0}>;
26 #size-cells = <0>;
28 cpu@0 {
31 reg = <0x00000000>;
32 clock-frequency = <0>; /* Filled in by U-Boot */
33 timebase-frequency = <0>; /* Filled in by U-Boot */
46 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
52 cell-index = <0>;
53 dcr-reg = <0x0c0 0x009>;
54 #address-cells = <0>;
[all …]
Dcanyonlands.dts18 dcr-parent = <&{/cpus/cpu@0}>;
29 #size-cells = <0>;
31 cpu@0 {
34 reg = <0x00000000>;
35 clock-frequency = <0>; /* Filled in by U-Boot */
36 timebase-frequency = <0>; /* Filled in by U-Boot */
49 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
55 cell-index = <0>;
56 dcr-reg = <0x0c0 0x009>;
57 #address-cells = <0>;
[all …]
Dglacier.dts18 dcr-parent = <&{/cpus/cpu@0}>;
31 #size-cells = <0>;
33 cpu@0 {
36 reg = <0x00000000>;
37 clock-frequency = <0>; /* Filled in by U-Boot */
38 timebase-frequency = <0>; /* Filled in by U-Boot */
51 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
57 cell-index = <0>;
58 dcr-reg = <0x0c0 0x009>;
59 #address-cells = <0>;
[all …]
/Linux-v6.1/drivers/media/pci/cx18/
Dcx18-av-audio.c60 * VID_PLL Integer = 0x0f, VID_PLL Post Divider = 0x04 in set_audclk_freq()
61 * AUX_PLL Integer = 0x0d, AUX PLL Post Divider = 0x20 in set_audclk_freq()
63 cx18_av_write4(cx, 0x108, 0x200d040f); in set_audclk_freq()
65 /* VID_PLL Fraction = 0x2be2fe */ in set_audclk_freq()
66 /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz pre-postdiv*/ in set_audclk_freq()
67 cx18_av_write4(cx, 0x10c, 0x002be2fe); in set_audclk_freq()
69 /* AUX_PLL Fraction = 0x176740c */ in set_audclk_freq()
70 /* xtal * 0xd.bb3a060/0x20 = 32000 * 384: 393 MHz p-pd*/ in set_audclk_freq()
71 cx18_av_write4(cx, 0x110, 0x0176740c); in set_audclk_freq()
74 /* 0x1.f77f = (4 * xtal/8*2/455) / 32000 */ in set_audclk_freq()
[all …]
/Linux-v6.1/arch/m68k/ifpsp060/
Disp.sa1 .long 0x60ff0000,0x02360000,0x60ff0000,0x16260000
2 .long 0x60ff0000,0x12dc0000,0x60ff0000,0x11ea0000
3 .long 0x60ff0000,0x10de0000,0x60ff0000,0x12a40000
4 .long 0x60ff0000,0x12560000,0x60ff0000,0x122a0000
5 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
6 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
7 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
8 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
9 .long 0x2f00203a,0xfefc487b,0x0930ffff,0xfef8202f
10 .long 0x00044e74,0x00042f00,0x203afeea,0x487b0930
[all …]
Dfpsp.sa1 .long 0x60ff0000,0x17400000,0x60ff0000,0x15f40000
2 .long 0x60ff0000,0x02b60000,0x60ff0000,0x04700000
3 .long 0x60ff0000,0x1b100000,0x60ff0000,0x19aa0000
4 .long 0x60ff0000,0x1b5a0000,0x60ff0000,0x062e0000
5 .long 0x60ff0000,0x102c0000,0x51fc51fc,0x51fc51fc
6 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
7 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
8 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
9 .long 0x2f00203a,0xff2c487b,0x0930ffff,0xfef8202f
10 .long 0x00044e74,0x00042f00,0x203afef2,0x487b0930
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dstm32mp151.dtsi16 #size-cells = <0>;
18 cpu0: cpu@0 {
22 reg = <0>;
42 reg = <0xa0021000 0x1000>,
43 <0xa0022000 0x2000>;
57 #clock-cells = <0>;
63 #clock-cells = <0>;
69 #clock-cells = <0>;
75 #clock-cells = <0>;
81 #clock-cells = <0>;
[all …]