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/Linux-v6.1/arch/arm64/boot/dts/broadcom/northstar2/
Dns2-xmc.dts47 bootargs = "earlycon=uart8250,mmio32,0x66130000";
52 reg = <0x000000000 0x80000000 0x00000001 0x00000000>;
71 reg = <0x10>;
77 nandcs@0 {
79 reg = <0>;
88 partition@0 {
90 reg = <0x00000000 0x00280000>; /* 2.5MB */
96 reg = <0x00280000 0x00040000>; /* 0.25MB */
102 reg = <0x002c0000 0x00040000>; /* 0.25MB */
108 reg = <0x00300000 0x03d00000>; /* 61MB */
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/pinctrl/
Dqcom,sc8180x-pinctrl.yaml72 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-8][0-9])$"
120 pattern: "^gpio([0-9]|[1-9][0-9]|1[0-8][0-9])$"
132 reg = <0x03100000 0x300000>,
133 <0x03500000 0x700000>,
134 <0x03d00000 0x300000>;
141 gpio-ranges = <&tlmm 0 0 190>;
Dqcom,sm8150-pinctrl.txt178 reg = <0x03100000 0x300000>,
179 <0x03500000 0x300000>,
180 <0x03900000 0x300000>,
181 <0x03D00000 0x300000>;
186 gpio-ranges = <&tlmm 0 0 175>;
187 gpio-reserved-ranges = <0 4>, <126 4>;
/Linux-v6.1/drivers/soc/tegra/cbb/
Dtegra194-cbb.c30 #define ERRLOGGER_0_ID_COREID_0 0x00000000
31 #define ERRLOGGER_0_ID_REVISIONID_0 0x00000004
32 #define ERRLOGGER_0_FAULTEN_0 0x00000008
33 #define ERRLOGGER_0_ERRVLD_0 0x0000000c
34 #define ERRLOGGER_0_ERRCLR_0 0x00000010
35 #define ERRLOGGER_0_ERRLOG0_0 0x00000014
36 #define ERRLOGGER_0_ERRLOG1_0 0x00000018
37 #define ERRLOGGER_0_RSVD_00_0 0x0000001c
38 #define ERRLOGGER_0_ERRLOG3_0 0x00000020
39 #define ERRLOGGER_0_ERRLOG4_0 0x00000024
[all …]
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsc7180.dtsi61 #clock-cells = <0>;
67 #clock-cells = <0>;
77 reg = <0x0 0x80000000 0x0 0x600000>;
82 reg = <0x0 0x80600000 0x0 0x200000>;
87 reg = <0x0 0x80800000 0x0 0x20000>;
92 reg = <0x0 0x80820000 0x0 0x20000>;
98 reg = <0x0 0x808ff000 0x0 0x1000>;
103 reg = <0x0 0x80900000 0x0 0x200000>;
108 reg = <0x0 0x80b00000 0x0 0x3900000>;
113 reg = <0 0x8b700000 0 0x10000>;
[all …]
Dsm8150.dtsi29 #clock-cells = <0>;
36 #clock-cells = <0>;
44 #size-cells = <0>;
46 CPU0: cpu@0 {
49 reg = <0x0 0x0>;
54 qcom,freq-domain = <&cpufreq_hw 0>;
73 reg = <0x0 0x100>;
78 qcom,freq-domain = <&cpufreq_hw 0>;
95 reg = <0x0 0x200>;
100 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsc7280.dtsi77 #clock-cells = <0>;
83 #clock-cells = <0>;
94 reg = <0x0 0x004cd000 0x0 0x1000>;
98 reg = <0x0 0x80000000 0x0 0x600000>;
103 reg = <0x0 0x80600000 0x0 0x200000>;
108 reg = <0x0 0x80800000 0x0 0x60000>;
113 reg = <0x0 0x80860000 0x0 0x20000>;
119 reg = <0x0 0x80884000 0x0 0x10000>;
124 reg = <0x0 0x808ff000 0x0 0x1000>;
129 reg = <0x0 0x80900000 0x0 0x200000>;
[all …]
Dsm8250.dtsi80 #clock-cells = <0>;
88 #clock-cells = <0>;
94 #size-cells = <0>;
96 CPU0: cpu@0 {
99 reg = <0x0 0x0>;
106 qcom,freq-domain = <&cpufreq_hw 0>;
123 reg = <0x0 0x100>;
130 qcom,freq-domain = <&cpufreq_hw 0>;
144 reg = <0x0 0x200>;
151 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]