Searched +full:0 +full:x03300000 (Results 1 – 5 of 5) sorted by relevance
54 reg = <0x03300000 0x30000>;
46 port@0:57 - port@080 reg = <0x03300000 0x40000>;92 #size-cells = <0>;94 deu0_in: port@0 {95 reg = <0>;104 #size-cells = <0>;107 deu0_out_be0: endpoint@0 {108 reg = <0>;
28 #define Q6SS_RESET_REG 0x01429 #define Q6SS_GFMUX_CTL_REG 0x02030 #define Q6SS_PWR_CTL_REG 0x03031 #define Q6SS_MEM_PWR_CTL 0x0B032 #define Q6SS_STRAP_ACC 0x11033 #define Q6SS_CGC_OVERRIDE 0x03434 #define Q6SS_BCR_REG 0x600037 #define AXI_HALTREQ_REG 0x038 #define AXI_HALTACK_REG 0x439 #define AXI_IDLE_REG 0x8[all …]
65 #size-cells = <0>;67 cpu0: cpu@0 {73 reg = <0x0>;82 reg = <0x1>;91 reg = <0x2>;100 reg = <0x3>;109 reg = <0x100>;118 reg = <0x101>;127 reg = <0x102>;136 reg = <0x103>;[all …]
78 #clock-cells = <0>;86 #clock-cells = <0>;92 #size-cells = <0>;94 CPU0: cpu@0 {97 reg = <0x0 0x0>;102 qcom,freq-domain = <&cpufreq_hw 0>;116 reg = <0x0 0x100>;121 qcom,freq-domain = <&cpufreq_hw 0>;132 reg = <0x0 0x200>;137 qcom,freq-domain = <&cpufreq_hw 0>;[all …]
