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/Linux-v5.15/include/linux/mfd/wm8350/
Dcore.h27 #define WM8350_RESET_ID 0x00
28 #define WM8350_ID 0x01
29 #define WM8350_REVISION 0x02
30 #define WM8350_SYSTEM_CONTROL_1 0x03
31 #define WM8350_SYSTEM_CONTROL_2 0x04
32 #define WM8350_SYSTEM_HIBERNATE 0x05
33 #define WM8350_INTERFACE_CONTROL 0x06
34 #define WM8350_POWER_MGMT_1 0x08
35 #define WM8350_POWER_MGMT_2 0x09
36 #define WM8350_POWER_MGMT_3 0x0A
[all …]
Dgpio.h16 #define WM8350_GPIO_DEBOUNCE 0x80
17 #define WM8350_GPIO_PIN_PULL_UP_CONTROL 0x81
18 #define WM8350_GPIO_PULL_DOWN_CONTROL 0x82
19 #define WM8350_GPIO_INT_MODE 0x83
20 #define WM8350_GPIO_CONTROL 0x85
21 #define WM8350_GPIO_CONFIGURATION_I_O 0x86
22 #define WM8350_GPIO_PIN_POLARITY_TYPE 0x87
23 #define WM8350_GPIO_FUNCTION_SELECT_1 0x8C
24 #define WM8350_GPIO_FUNCTION_SELECT_2 0x8D
25 #define WM8350_GPIO_FUNCTION_SELECT_3 0x8E
[all …]
/Linux-v5.15/drivers/net/wireless/mediatek/mt76/mt7915/
Dmmio.c37 { 0x54000000, 0x02000, 0x1000 }, /* WFDMA PCIE0 MCU DMA0 */ in __mt7915_reg_addr()
38 { 0x55000000, 0x03000, 0x1000 }, /* WFDMA PCIE0 MCU DMA1 */ in __mt7915_reg_addr()
39 { 0x58000000, 0x06000, 0x1000 }, /* WFDMA PCIE1 MCU DMA0 (MEM_DMA) */ in __mt7915_reg_addr()
40 { 0x59000000, 0x07000, 0x1000 }, /* WFDMA PCIE1 MCU DMA1 */ in __mt7915_reg_addr()
41 { 0x7c000000, 0xf0000, 0x10000 }, /* CONN_INFRA */ in __mt7915_reg_addr()
42 { 0x7c020000, 0xd0000, 0x10000 }, /* CONN_INFRA, WFDMA */ in __mt7915_reg_addr()
43 { 0x80020000, 0xb0000, 0x10000 }, /* WF_TOP_MISC_OFF */ in __mt7915_reg_addr()
44 { 0x81020000, 0xc0000, 0x10000 }, /* WF_TOP_MISC_ON */ in __mt7915_reg_addr()
45 { 0x820c0000, 0x08000, 0x4000 }, /* WF_UMAC_TOP (PLE) */ in __mt7915_reg_addr()
46 { 0x820c8000, 0x0c000, 0x2000 }, /* WF_UMAC_TOP (PSE) */ in __mt7915_reg_addr()
[all …]
/Linux-v5.15/drivers/net/ethernet/cirrus/
Dcs89x0.h18 #define PP_ChipID 0x0000 /* offset 0h -> Corp -ID */
22 #define PP_ISAIOB 0x0020 /* IO base address */
23 #define PP_CS8900_ISAINT 0x0022 /* ISA interrupt select */
24 #define PP_CS8920_ISAINT 0x0370 /* ISA interrupt select */
25 #define PP_CS8900_ISADMA 0x0024 /* ISA Rec DMA channel */
26 #define PP_CS8920_ISADMA 0x0374 /* ISA Rec DMA channel */
27 #define PP_ISASOF 0x0026 /* ISA DMA offset */
28 #define PP_DmaFrameCnt 0x0028 /* ISA DMA Frame count */
29 #define PP_DmaByteCnt 0x002A /* ISA DMA Byte count */
30 #define PP_CS8900_ISAMemB 0x002C /* Memory base */
[all …]
/Linux-v5.15/drivers/clk/samsung/
Dclk-exynos5260.h15 #define MUX_SEL_AUD 0x0200
16 #define MUX_ENABLE_AUD 0x0300
17 #define MUX_STAT_AUD 0x0400
18 #define MUX_IGNORE_AUD 0x0500
19 #define DIV_AUD0 0x0600
20 #define DIV_AUD1 0x0604
21 #define DIV_STAT_AUD0 0x0700
22 #define DIV_STAT_AUD1 0x0704
23 #define EN_ACLK_AUD 0x0800
24 #define EN_PCLK_AUD 0x0900
[all …]
/Linux-v5.15/drivers/media/usb/gspca/gl860/
Dgl860-mi1320.c11 {0xba00, 0x00f0}, {0xba00, 0x00f1}, {0xba51, 0x0066}, {0xba02, 0x00f1},
12 {0xba05, 0x0067}, {0xba05, 0x00f1}, {0xbaa0, 0x0065}, {0xba00, 0x00f1},
13 {0xffff, 0xffff},
14 {0xba00, 0x00f0}, {0xba02, 0x00f1}, {0xbafa, 0x0028}, {0xba02, 0x00f1},
15 {0xba00, 0x00f0}, {0xba01, 0x00f1}, {0xbaf0, 0x0006}, {0xba0e, 0x00f1},
16 {0xba70, 0x0006}, {0xba0e, 0x00f1},
17 {0xffff, 0xffff},
18 {0xba74, 0x0006}, {0xba0e, 0x00f1},
19 {0xffff, 0xffff},
20 {0x0061, 0x0000}, {0x0068, 0x000d},
[all …]
Dgl860-ov9655.c12 {0x0000, 0x0000}, {0x0010, 0x0010}, {0x0008, 0x00c0}, {0x0001, 0x00c1},
13 {0x0001, 0x00c2}, {0x0020, 0x0006}, {0x006a, 0x000d},
15 {0x0040, 0x0000},
19 {0x0041, 0x0000}, {0x006a, 0x0007}, {0x0063, 0x0006}, {0x006a, 0x000d},
20 {0x0000, 0x00c0}, {0x0010, 0x0010}, {0x0001, 0x00c1}, {0x0041, 0x00c2},
21 {0x0004, 0x00d8}, {0x0012, 0x0004}, {0x0000, 0x0058}, {0x0040, 0x0000},
22 {0x00f3, 0x0006}, {0x0058, 0x0000}, {0x0048, 0x0000}, {0x0061, 0x0000},
93 static u8 c04[] = {0x04};
104 {0x6032, 0x00ff}, {0x6032, 0x00ff}, {0x6032, 0x00ff}, {0x603c, 0x00ff},
105 {0x6003, 0x00ff}, {0x6032, 0x00ff}, {0x6032, 0x00ff}, {0x6001, 0x00ff},
[all …]
/Linux-v5.15/include/linux/mfd/wm831x/
Dirq.h14 #define WM831X_IRQ_TEMP_THW 0
75 * R16400 (0x4010) - System Interrupts
77 #define WM831X_PS_INT 0x8000 /* PS_INT */
78 #define WM831X_PS_INT_MASK 0x8000 /* PS_INT */
81 #define WM831X_TEMP_INT 0x4000 /* TEMP_INT */
82 #define WM831X_TEMP_INT_MASK 0x4000 /* TEMP_INT */
85 #define WM831X_GP_INT 0x2000 /* GP_INT */
86 #define WM831X_GP_INT_MASK 0x2000 /* GP_INT */
89 #define WM831X_ON_PIN_INT 0x1000 /* ON_PIN_INT */
90 #define WM831X_ON_PIN_INT_MASK 0x1000 /* ON_PIN_INT */
[all …]
Dpmu.h14 * R16387 (0x4003) - Power State
16 #define WM831X_CHIP_ON 0x8000 /* CHIP_ON */
17 #define WM831X_CHIP_ON_MASK 0x8000 /* CHIP_ON */
20 #define WM831X_CHIP_SLP 0x4000 /* CHIP_SLP */
21 #define WM831X_CHIP_SLP_MASK 0x4000 /* CHIP_SLP */
24 #define WM831X_REF_LP 0x1000 /* REF_LP */
25 #define WM831X_REF_LP_MASK 0x1000 /* REF_LP */
28 #define WM831X_PWRSTATE_DLY_MASK 0x0C00 /* PWRSTATE_DLY - [11:10] */
31 #define WM831X_SWRST_DLY 0x0200 /* SWRST_DLY */
32 #define WM831X_SWRST_DLY_MASK 0x0200 /* SWRST_DLY */
[all …]
/Linux-v5.15/sound/pci/oxygen/
Dcm9780.h5 #define CM9780_JACK 0x62
6 #define CM9780_MIXER 0x64
7 #define CM9780_GPIO_SETUP 0x70
8 #define CM9780_GPIO_STATUS 0x72
11 #define CM9780_RSOE 0x0001
12 #define CM9780_CBOE 0x0002
13 #define CM9780_SSOE 0x0004
14 #define CM9780_FROE 0x0008
15 #define CM9780_HP2FMICOE 0x0010
16 #define CM9780_CB2MICOE 0x0020
[all …]
/Linux-v5.15/arch/sh/include/asm/
Dsmc37c93x.h14 #define FDC_PRIMARY_BASE 0x3f0
15 #define IDE1_PRIMARY_BASE 0x1f0
16 #define IDE1_SECONDARY_BASE 0x170
17 #define PARPORT_PRIMARY_BASE 0x378
18 #define COM1_PRIMARY_BASE 0x2f8
19 #define COM2_PRIMARY_BASE 0x3f8
20 #define RTC_PRIMARY_BASE 0x070
21 #define KBC_PRIMARY_BASE 0x060
22 #define AUXIO_PRIMARY_BASE 0x000 /* XXX */
25 #define LDN_FDC 0
[all …]
/Linux-v5.15/drivers/media/platform/ti-vpe/
Dcsc.c51 0x0400, 0x0000, 0x057D, 0x0400, 0x1EA7, 0x1D35,
52 0x0400, 0x06EF, 0x1FFE, 0x0D40, 0x0210, 0x0C88,
57 0x04A8, 0x1FFE, 0x0662, 0x04A8, 0x1E6F, 0x1CBF,
58 0x04A8, 0x0812, 0x1FFF, 0x0C84, 0x0220, 0x0BAC,
65 0x0400, 0x0000, 0x0629, 0x0400, 0x1F45, 0x1E2B,
66 0x0400, 0x0742, 0x0000, 0x0CEC, 0x0148, 0x0C60,
71 0x04A8, 0x0000, 0x072C, 0x04A8, 0x1F26, 0x1DDE,
72 0x04A8, 0x0873, 0x0000, 0x0C20, 0x0134, 0x0B7C,
81 0x0132, 0x0259, 0x0075, 0x1F50, 0x1EA5, 0x020B,
82 0x020B, 0x1E4A, 0x1FAB, 0x0000, 0x0200, 0x0200,
[all …]
/Linux-v5.15/include/linux/usb/
Dr8a66597.h27 #define R8A66597_PLATDATA_XTAL_12MHZ 0x01
28 #define R8A66597_PLATDATA_XTAL_24MHZ 0x02
29 #define R8A66597_PLATDATA_XTAL_48MHZ 0x03
58 #define SYSCFG0 0x00
59 #define SYSCFG1 0x02
60 #define SYSSTS0 0x04
61 #define SYSSTS1 0x06
62 #define DVSTCTR0 0x08
63 #define DVSTCTR1 0x0A
64 #define TESTMODE 0x0C
[all …]
/Linux-v5.15/drivers/net/phy/
Dvitesse.c15 #define MII_VSC82X4_EXT_PAGE_16E 0x10
16 #define MII_VSC82X4_EXT_PAGE_17E 0x11
17 #define MII_VSC82X4_EXT_PAGE_18E 0x12
20 #define MII_VSC8244_EXT_CON1 0x17
21 #define MII_VSC8244_EXTCON1_INIT 0x0000
22 #define MII_VSC8244_EXTCON1_TX_SKEW_MASK 0x0c00
23 #define MII_VSC8244_EXTCON1_RX_SKEW_MASK 0x0300
24 #define MII_VSC8244_EXTCON1_TX_SKEW 0x0800
25 #define MII_VSC8244_EXTCON1_RX_SKEW 0x0200
28 #define MII_VSC8244_IMASK 0x19
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Domap24xx-clocks.dtsi9 #clock-cells = <0>;
13 reg = <0x4>;
17 #clock-cells = <0>;
23 #clock-cells = <0>;
27 reg = <0x4>;
31 #clock-cells = <0>;
39 #clock-cells = <0>;
45 #clock-cells = <0>;
51 #clock-cells = <0>;
57 #clock-cells = <0>;
[all …]
Domap2420-clocks.dtsi10 #clock-cells = <0>;
14 reg = <0x0070>;
18 #clock-cells = <0>;
22 reg = <0x0070>;
26 #clock-cells = <0>;
32 #clock-cells = <0>;
37 reg = <0x0070>;
42 #clock-cells = <0>;
46 reg = <0x0810>;
50 #clock-cells = <0>;
[all …]
/Linux-v5.15/drivers/net/wireless/mediatek/mt76/mt7921/
Ddma.c12 err = mt76_init_tx_queue(phy->mt76, 0, idx, n_desc, MT_TX_RING_BASE); in mt7921_init_tx_queues()
13 if (err < 0) in mt7921_init_tx_queues()
16 for (i = 0; i <= MT_TXQ_PSD; i++) in mt7921_init_tx_queues()
17 phy->mt76->q_tx[i] = phy->mt76->q_tx[0]; in mt7921_init_tx_queues()
19 return 0; in mt7921_init_tx_queues()
30 type = FIELD_GET(MT_RXD0_PKT_TYPE, le32_to_cpu(rxd[0])); in mt7921_queue_rx_skb()
31 flag = FIELD_GET(MT_RXD0_PKT_FLAG, le32_to_cpu(rxd[0])); in mt7921_queue_rx_skb()
33 if (type == PKT_TYPE_RX_EVENT && flag == 0x1) in mt7921_queue_rx_skb()
71 return 0; in mt7921_poll_tx()
79 return 0; in mt7921_poll_tx()
[all …]
/Linux-v5.15/drivers/usb/c67x00/
Dc67x00.h23 #define HW_REV_REG 0xC004
29 #define USB_CTL_REG(x) ((x) ? 0xC0AA : 0xC08A)
31 #define LOW_SPEED_PORT(x) ((x) ? 0x0800 : 0x0400)
32 #define HOST_MODE 0x0200
33 #define PORT_RES_EN(x) ((x) ? 0x0100 : 0x0080)
34 #define SOF_EOP_EN(x) ((x) ? 0x0002 : 0x0001)
37 #define USB_STAT_REG(x) ((x) ? 0xC0B0 : 0xC090)
39 #define EP0_IRQ_FLG 0x0001
40 #define EP1_IRQ_FLG 0x0002
41 #define EP2_IRQ_FLG 0x0004
[all …]
/Linux-v5.15/drivers/gpu/drm/msm/disp/
Dmdp_format.c16 0x0200, 0x0000, 0x0000,
17 0x0000, 0x0200, 0x0000,
18 0x0000, 0x0000, 0x0200
20 .pre_bias = { 0x0, 0x0, 0x0 },
21 .post_bias = { 0x0, 0x0, 0x0 },
22 .pre_clamp = { 0x0, 0xff, 0x0, 0xff, 0x0, 0xff },
23 .post_clamp = { 0x0, 0xff, 0x0, 0xff, 0x0, 0xff },
28 0x0254, 0x0000, 0x0331,
29 0x0254, 0xff37, 0xfe60,
30 0x0254, 0x0409, 0x0000
[all …]
/Linux-v5.15/arch/mips/include/asm/mach-db1x00/
Dbcsr.h23 #define DB1000_BCSR_PHYS_ADDR 0x0E000000
24 #define DB1000_BCSR_HEXLED_OFS 0x01000000
26 #define DB1550_BCSR_PHYS_ADDR 0x0F000000
27 #define DB1550_BCSR_HEXLED_OFS 0x00400000
29 #define PB1550_BCSR_PHYS_ADDR 0x0F000000
30 #define PB1550_BCSR_HEXLED_OFS 0x00800000
32 #define DB1200_BCSR_PHYS_ADDR 0x19800000
33 #define DB1200_BCSR_HEXLED_OFS 0x00400000
35 #define PB1200_BCSR_PHYS_ADDR 0x0D800000
36 #define PB1200_BCSR_HEXLED_OFS 0x00400000
[all …]
/Linux-v5.15/drivers/net/ethernet/seeq/
Dether3.h13 /* use 0 for production, 1 for verification, >2 for debug. debug flags: */
19 #define NET_DEBUG 0
25 #define REG_COMMAND (priv(dev)->seeq + 0x0000)
26 #define CMD_ENINTDMA 0x0001
27 #define CMD_ENINTRX 0x0002
28 #define CMD_ENINTTX 0x0004
29 #define CMD_ENINTBUFWIN 0x0008
30 #define CMD_ACKINTDMA 0x0010
31 #define CMD_ACKINTRX 0x0020
32 #define CMD_ACKINTTX 0x0040
[all …]
/Linux-v5.15/drivers/tty/serial/
Ddz.h18 #define DZ_TRDY 0x8000 /* Transmitter empty */
19 #define DZ_TIE 0x4000 /* Transmitter Interrupt Enbl */
20 #define DZ_TLINE 0x0300 /* Transmitter Line Number */
21 #define DZ_RDONE 0x0080 /* Receiver data ready */
22 #define DZ_RIE 0x0040 /* Receive Interrupt Enable */
23 #define DZ_MSE 0x0020 /* Master Scan Enable */
24 #define DZ_CLR 0x0010 /* Master reset */
25 #define DZ_MAINT 0x0008 /* Loop Back Mode */
30 #define DZ_RBUF_MASK 0x00FF /* Data Mask */
31 #define DZ_LINE_MASK 0x0300 /* Line Mask */
[all …]
/Linux-v5.15/include/linux/mfd/madera/
Dregisters.h14 #define MADERA_SOFTWARE_RESET 0x00
15 #define MADERA_HARDWARE_REVISION 0x01
16 #define MADERA_CTRL_IF_CFG_1 0x08
17 #define MADERA_CTRL_IF_CFG_2 0x09
18 #define MADERA_CTRL_IF_CFG_3 0x0A
19 #define MADERA_WRITE_SEQUENCER_CTRL_0 0x16
20 #define MADERA_WRITE_SEQUENCER_CTRL_1 0x17
21 #define MADERA_WRITE_SEQUENCER_CTRL_2 0x18
22 #define MADERA_TONE_GENERATOR_1 0x20
23 #define MADERA_TONE_GENERATOR_2 0x21
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/usb/
Dusb-drd.yaml19 0x0200 or above.
21 enum: [0x0100, 0x0120, 0x0130, 0x0200]
70 reg = <0x4a030000 0xcfff>;
71 interrupts = <0 92 4>;
76 otg-rev = <0x0200>;
/Linux-v5.15/drivers/staging/fbtft/
Dfb_bd663474.c31 write_reg(par, 0x000, 0x0001); /*oscillator 0: stop, 1: operation */ in init_display()
35 write_reg(par, 0x100, 0x0000); /* power supply setup */ in init_display()
36 write_reg(par, 0x101, 0x0000); in init_display()
37 write_reg(par, 0x102, 0x3110); in init_display()
38 write_reg(par, 0x103, 0xe200); in init_display()
39 write_reg(par, 0x110, 0x009d); in init_display()
40 write_reg(par, 0x111, 0x0022); in init_display()
41 write_reg(par, 0x100, 0x0120); in init_display()
44 write_reg(par, 0x100, 0x3120); in init_display()
47 write_reg(par, 0x001, 0x0100); in init_display()
[all …]

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