/Linux-v6.6/Documentation/devicetree/bindings/bus/ |
D | mvebu-mbus.txt | 65 pcie-mem-aperture = <0xe0000000 0x8000000>; 66 pcie-io-aperture = <0xe8000000 0x100000>; 73 reg = <0x20000 0x100>, <0x20180 0x20>, <0x20250 0x8>; 87 0xSIAA0000 0x00oooooo 91 S = 0x0 for a MBus valid window 92 S = 0xf for a non-valid window (see below) 94 If S = 0x0, then: 99 If S = 0xf, then: 105 (S = 0x0), an address decoding window is allocated. On the other side, 106 entries for translation that do not correspond to valid windows (S = 0xf) [all …]
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/Linux-v6.6/arch/arm64/boot/dts/rockchip/ |
D | rk3568.dtsi | 13 reg = <0 0xfc000000 0 0x1000>; 20 ports-implemented = <0x1>; 27 reg = <0x0 0xfdc70000 0x0 0x1000>; 32 reg = <0x0 0xfe190080 0x0 0x20>; 37 reg = <0x0 0xfe190100 0x0 0x20>; 42 reg = <0x0 0xfe190200 0x0 0x20>; 47 reg = <0x0 0xfdcb8000 0x0 0x10000>; 52 reg = <0x0 0xfe8c0000 0x0 0x20000>; 53 #phy-cells = <0>; 67 bus-range = <0x0 0xf>; [all …]
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/Linux-v6.6/arch/mips/include/asm/ |
D | inst.h | 25 #define I_JTARGET_SFT 0 26 #define MIPSInst_JTARGET(x) (MIPSInst(x) & 0x03ffffff) 29 #define MIPSInst_RS(x) ((MIPSInst(x) & 0x03e00000) >> I_RS_SFT) 32 #define MIPSInst_RT(x) ((MIPSInst(x) & 0x001f0000) >> I_RT_SFT) 34 #define I_IMM_SFT 0 35 #define MIPSInst_SIMM(x) ((int)((short)(MIPSInst(x) & 0xffff))) 36 #define MIPSInst_UIMM(x) (MIPSInst(x) & 0xffff) 39 #define MIPSInst_CACHEOP(x) ((MIPSInst(x) & 0x001c0000) >> I_CACHEOP_SFT) 42 #define MIPSInst_CACHESEL(x) ((MIPSInst(x) & 0x00030000) >> I_CACHESEL_SFT) 45 #define MIPSInst_RD(x) ((MIPSInst(x) & 0x0000f800) >> I_RD_SFT) [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/display/ |
D | allwinner,sun4i-a10-display-frontend.yaml | 63 port@0: 94 reg = <0x01e00000 0x20000>; 104 #size-cells = <0>; 108 #size-cells = <0>; 111 fe0_out_be0: endpoint@0 { 112 reg = <0>;
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/Linux-v6.6/arch/arm64/boot/dts/ti/ |
D | k3-am62p5-sk.dts | 29 reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 30 <0x00000008 0x80000000 0x00000001 0x80000000>; 40 reg = <0x00 0x9e780000 0x00 0x80000>; 45 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 51 reg = <0x00 0x9c900000 0x00 0x01e00000>; 61 AM62PX_IOPAD(0x1c8, PIN_INPUT, 0) /* (A22) UART0_RXD */ 62 AM62PX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */ 63 AM62PX_IOPAD(0x1d0, PIN_INPUT, 0) /* (A23) UART0_CTSn */ 64 AM62PX_IOPAD(0x1d4, PIN_OUTPUT, 0) /* (C22) UART0_RTSn */ 71 AM62PX_IOPAD(0x194, PIN_INPUT, 2) /* (D25) MCASP0_AXR3 */ [all …]
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D | k3-am62a7-sk.dts | 33 reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 34 <0x00000008 0x80000000 0x00000000 0x80000000>; 43 reg = <0x00 0x9e780000 0x00 0x80000>; 44 alignment = <0x1000>; 49 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 50 alignment = <0x1000>; 56 reg = <0x00 0x9c900000 0x00 0x01e00000>; 61 vmain_pd: regulator-0 { 107 pinctrl-0 = <&usr_led_pins_default>; 109 led-0 { [all …]
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/Linux-v6.6/arch/nios2/boot/dts/ |
D | 3c120_devboard.dts | 18 #size-cells = <0>; 20 cpu: cpu@0 { 23 reg = <0x00000000>; 38 altr,reset-addr = <0xc2800000>; 39 altr,fast-tlb-miss-addr = <0xc7fff400>; 40 altr,exception-addr = <0xd0000020>; 46 memory@0 { 48 reg = <0x10000000 0x08000000>, 49 <0x07fff400 0x00000400>; 52 sopc@0 { [all …]
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/Linux-v6.6/drivers/gpu/drm/nouveau/nvkm/subdev/top/ |
D | gk104.c | 35 for (i = 0; i < 64; i++) { in gk104_top_parse() 39 type = ~0; in gk104_top_parse() 40 inst = 0; in gk104_top_parse() 43 data = nvkm_rd32(device, 0x022700 + (i * 0x04)); in gk104_top_parse() 45 switch (data & 0x00000003) { in gk104_top_parse() 46 case 0x00000000: /* NOT_VALID */ in gk104_top_parse() 48 case 0x00000001: /* DATA */ in gk104_top_parse() 49 inst = (data & 0x3c000000) >> 26; in gk104_top_parse() 50 info->addr = (data & 0x00fff000); in gk104_top_parse() 51 if (data & 0x00000004) in gk104_top_parse() [all …]
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/Linux-v6.6/arch/arm/mach-ep93xx/ |
D | ts72xx.c | 70 #define TS72XX_NAND_CONTROL_ADDR_LINE 22 /* 0xN0400000 */ 71 #define TS72XX_NAND_BUSY_ADDR_LINE 23 /* 0xN0800000 */ 82 bits = __raw_readb(addr) & ~0x07; in ts72xx_nand_hwcontrol() 83 bits |= (ctrl & NAND_NCE) << 2; /* bit 0 -> bit 2 */ in ts72xx_nand_hwcontrol() 85 bits |= (ctrl & NAND_ALE) >> 2; /* bit 2 -> bit 0 */ in ts72xx_nand_hwcontrol() 100 return !!(__raw_readb(addr) & 0x20); in ts72xx_nand_device_ready() 109 .offset = 0, 128 .chip_offset = 0, 139 .start = 0, /* filled in later */ 140 .end = 0, /* filled in later */ [all …]
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/Linux-v6.6/arch/arm64/boot/dts/allwinner/ |
D | sun50i-h5.dtsi | 11 #size-cells = <0>; 13 cpu0: cpu@0 { 16 reg = <0>; 84 reg = <0x01c00000 0x1000>; 91 reg = <0x00018000 0x1c000>; 94 ranges = <0 0x00018000 0x1c000>; 96 ve_sram: sram-section@0 { 99 reg = <0x000000 0x1c000>; 106 reg = <0x01c0e000 0x1000>; 117 reg = <0x01c15000 0x1000>; [all …]
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D | sun50i-a64.dtsi | 47 #size-cells = <0>; 49 cpu0: cpu@0 { 52 reg = <0>; 124 #clock-cells = <0>; 131 #clock-cells = <0>; 153 #size-cells = <0>; 164 simple-audio-card,dai-link@0 { 175 sound-dai = <&codec 0>; 197 polling-delay-passive = <0>; 198 polling-delay = <0>; [all …]
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/Linux-v6.6/drivers/net/wireless/broadcom/brcm80211/include/ |
D | chipcommon.h | 14 u32 chipid; /* 0x0 */ 20 u32 otpstatus; /* 0x10, corerev >= 10 */ 26 u32 intstatus; /* 0x20 */ 30 u32 chipcontrol; /* 0x28, rev >= 11 */ 31 u32 chipstatus; /* 0x2c, rev >= 11 */ 34 u32 jtagcmd; /* 0x30, rev >= 10 */ 40 u32 flashcontrol; /* 0x40 */ 46 u32 broadcastaddress; /* 0x50 */ 50 u32 gpiopullup; /* 0x58, corerev >= 20 */ 51 u32 gpiopulldown; /* 0x5c, corerev >= 20 */ [all …]
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/Linux-v6.6/include/soc/fsl/qe/ |
D | qe.h | 32 QE_CLK_NONE = 0, 131 return 0; in cpm_muram_dma() 227 return 0; in qe_alive_during_sleep() 271 u8 split; /* 0 = shared I-RAM, 1 = split I-RAM */ 284 __be32 traps[16]; /* Trap addresses, 0 == ignore */ 328 #define BD_STATUS_MASK 0xffff0000 329 #define BD_LENGTH_MASK 0x0000ffff 337 #define QE_RISC_ALLOCATION_RISC1 0x1 /* RISC 1 */ 338 #define QE_RISC_ALLOCATION_RISC2 0x2 /* RISC 2 */ 339 #define QE_RISC_ALLOCATION_RISC3 0x4 /* RISC 3 */ [all …]
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/Linux-v6.6/arch/mips/include/asm/mips-boards/ |
D | bonito64.h | 42 #define BONITO_BOOT_BASE 0x1fc00000 43 #define BONITO_BOOT_SIZE 0x00100000 45 #define BONITO_FLASH_BASE 0x1c000000 46 #define BONITO_FLASH_SIZE 0x03000000 48 #define BONITO_SOCKET_BASE 0x1f800000 49 #define BONITO_SOCKET_SIZE 0x00400000 51 #define BONITO_REG_BASE 0x1fe00000 52 #define BONITO_REG_SIZE 0x00040000 54 #define BONITO_DEV_BASE 0x1ff00000 55 #define BONITO_DEV_SIZE 0x00100000 [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/pci/ |
D | nvidia,tegra194-pcie.yaml | 85 - const: p2u-0 123 0: C0 132 0 : C0 260 bus@0 { 263 ranges = <0x0 0x0 0x0 0x8 0x0>; 268 reg = <0x0 0x14180000 0x0 0x00020000>, /* appl registers (128K) */ 269 <0x0 0x38000000 0x0 0x00040000>, /* configuration space (256K) */ 270 <0x0 0x38040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */ 271 <0x0 0x38080000 0x0 0x00040000>; /* DBI reg space (256K) */ 278 linux,pci-domain = <0>; [all …]
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/Linux-v6.6/drivers/gpu/drm/amd/amdkfd/ |
D | kfd_int_process_v11.c | 40 * The 44-bit packet is mapped as {context_id1[7:0],context_id0[31:0]} plus 44 * Encoding type (0 = Auto, 1 = Wave, 2 = Error) 49 * - context_id0[24:0] 51 * Auto - only context_id0[8:0] is used, which reports various interrupts 52 * generated by SQG. The rest is 0. 53 * Wave - user data sent from m0 via S_SENDMSG (context_id0[23:0]) 54 * Error - Error Type (context_id0[24:21]), Error Details (context_id0[20:0]) 57 * S_SENDMSG and Errors. These are 0 for Auto. 61 SQ_INTERRUPT_WORD_ENCODING_AUTO = 0x0, 67 SQ_INTERRUPT_ERROR_TYPE_EDC_FUE = 0x0, [all …]
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/Linux-v6.6/drivers/net/wireless/realtek/rtw89/ |
D | rtw8852a_rfk_table.c | 8 RTW89_DECL_RFK_WM(0x12a8, 0x00000001, 0x00000001), 9 RTW89_DECL_RFK_WM(0x12a8, 0x0000000e, 0x00000002), 10 RTW89_DECL_RFK_WM(0x32a8, 0x00000001, 0x00000001), 11 RTW89_DECL_RFK_WM(0x32a8, 0x0000000e, 0x00000002), 12 RTW89_DECL_RFK_WM(0x12bc, 0x000000f0, 0x00000005), 13 RTW89_DECL_RFK_WM(0x12bc, 0x00000f00, 0x00000005), 14 RTW89_DECL_RFK_WM(0x12bc, 0x000f0000, 0x00000005), 15 RTW89_DECL_RFK_WM(0x12bc, 0x0000f000, 0x00000005), 16 RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x00000033), 17 RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000033), [all …]
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/Linux-v6.6/drivers/macintosh/ |
D | windfarm_pm91.c | 57 #define DBG(args...) do { } while(0) 83 #define FAILURE_FAN 0x01 84 #define FAILURE_SENSOR 0x02 85 #define FAILURE_OVERTEMP 0x04 160 /* Get the FVT params for operating point 0 (the only supported one in wf_smu_create_cpu_fans() 168 tmax = 0x5e0000; /* 94 degree default */ in wf_smu_create_cpu_fans() 224 if (--st->ticks != 0) { in wf_smu_cpu_fans_tick() 251 if (temp > 0x4a0000) in wf_smu_cpu_fans_tick() 265 if (fan_cpu_main && wf_smu_failure_state == 0) { in wf_smu_cpu_fans_tick() 273 if (fan_cpu_second && wf_smu_failure_state == 0) { in wf_smu_cpu_fans_tick() [all …]
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/Linux-v6.6/arch/arm/boot/dts/allwinner/ |
D | sun5i.dtsi | 56 #size-cells = <0>; 58 cpu0: cpu@0 { 61 reg = <0x0>; 97 #clock-cells = <0>; 104 #clock-cells = <0>; 119 size = <0x6000000>; 120 alloc-ranges = <0x40000000 0x10000000>; 135 reg = <0x01c00000 0x30>; 140 sram_a: sram@0 { 142 reg = <0x00000000 0xc000>; [all …]
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D | sun8i-a23-a33.dtsi | 91 #size-cells = <0>; 93 cpu0: cpu@0 { 96 reg = <0>; 112 #clock-cells = <0>; 120 #clock-cells = <0>; 136 reg = <0x01c00000 0x30>; 143 reg = <0x01d00000 0x80000>; 146 ranges = <0 0x01d00000 0x80000>; 148 ve_sram: sram-section@0 { 151 reg = <0x000000 0x80000>; [all …]
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D | sun4i-a10.dtsi | 111 #size-cells = <0>; 112 cpu0: cpu@0 { 115 reg = <0x0>; 166 #clock-cells = <0>; 173 #clock-cells = <0>; 199 size = <0x6000000>; 200 alloc-ranges = <0x40000000 0x10000000>; 214 reg = <0x01c00000 0x30>; 219 sram_a: sram@0 { 221 reg = <0x00000000 0xc000>; [all …]
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D | sun6i-a31.dtsi | 101 #size-cells = <0>; 103 cpu0: cpu@0 { 106 reg = <0>; 213 #clock-cells = <0>; 221 #clock-cells = <0>; 238 #clock-cells = <0>; 245 #clock-cells = <0>; 252 #clock-cells = <0>; 254 reg = <0x01c200d0 0x4>; 274 reg = <0x01c02000 0x1000>; [all …]
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/Linux-v6.6/drivers/staging/rtl8712/ |
D | rtl871x_mp.c | 26 pmp_priv->curr_rateidx = 0; in _init_mp_priv_() 27 pmp_priv->curr_txpoweridx = 0x14; in _init_mp_priv_() 30 pmp_priv->check_mp_pkt = 0; in _init_mp_priv_() 31 pmp_priv->tx_pktcount = 0; in _init_mp_priv_() 32 pmp_priv->rx_pktcount = 0; in _init_mp_priv_() 33 pmp_priv->rx_crcerrpktcount = 0; in _init_mp_priv_() 54 for (i = 0; i < NR_MP_XMITFRAME; i++) { in init_mp_priv() 64 return 0; in init_mp_priv() 70 return 0; in free_mp_priv() 93 u32 cmd32 = 0, val32 = 0; in fw_iocmd_read() [all …]
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/Linux-v6.6/arch/arm64/boot/dts/qcom/ |
D | sm6125.dtsi | 23 #clock-cells = <0>; 30 #clock-cells = <0>; 38 #size-cells = <0>; 40 CPU0: cpu@0 { 43 reg = <0x0 0x0>; 57 reg = <0x0 0x1>; 66 reg = <0x0 0x2>; 75 reg = <0x0 0x3>; 84 reg = <0x0 0x100>; 98 reg = <0x0 0x101>; [all …]
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D | qcm2290.dtsi | 27 #clock-cells = <0>; 33 #clock-cells = <0>; 39 #size-cells = <0>; 41 CPU0: cpu@0 { 44 reg = <0x0 0x0>; 45 clocks = <&cpufreq_hw 0>; 50 qcom,freq-domain = <&cpufreq_hw 0>; 63 reg = <0x0 0x1>; 64 clocks = <&cpufreq_hw 0>; 69 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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