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/Linux-v6.1/drivers/clk/hisilicon/
Dclk-hi3559a.c22 #define CRG_BASE_ADDR 0x18020000
62 { HI3559AV100_FIXED_1188M, "1188m", NULL, 0, 1188000000, },
63 { HI3559AV100_FIXED_1000M, "1000m", NULL, 0, 1000000000, },
64 { HI3559AV100_FIXED_842M, "842m", NULL, 0, 842000000, },
65 { HI3559AV100_FIXED_792M, "792m", NULL, 0, 792000000, },
66 { HI3559AV100_FIXED_750M, "750m", NULL, 0, 750000000, },
67 { HI3559AV100_FIXED_710M, "710m", NULL, 0, 710000000, },
68 { HI3559AV100_FIXED_680M, "680m", NULL, 0, 680000000, },
69 { HI3559AV100_FIXED_667M, "667m", NULL, 0, 667000000, },
70 { HI3559AV100_FIXED_631M, "631m", NULL, 0, 631000000, },
[all …]
/Linux-v6.1/drivers/pinctrl/mediatek/
Dpinctrl-mt8188.c13 * iocfg[0]:0x10005000, iocfg[1]:0x11c00000, iocfg[2]:0x11e10000,
14 * iocfg[3]:0x11e20000, iocfg[4]:0x11ea0000
20 32, 0)
27 PIN_FIELD(0, 177, 0x0300, 0x10, 0, 4),
31 PIN_FIELD(0, 177, 0x0000, 0x10, 0, 1),
35 PIN_FIELD(0, 177, 0x0200, 0x10, 0, 1),
39 PIN_FIELD(0, 177, 0x0100, 0x10, 0, 1),
43 PIN_FIELD_BASE(0, 0, 1, 0x0170, 0x10, 8, 1),
44 PIN_FIELD_BASE(1, 1, 1, 0x0170, 0x10, 9, 1),
45 PIN_FIELD_BASE(2, 2, 1, 0x0170, 0x10, 10, 1),
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dimx7ulp-pinfunc.h15 #define IMX7ULP_PAD_PTC0__PTC0 0x0000 0x0000 0x1 0x0
16 #define IMX7ULP_PAD_PTC0__TRACE_D15 0x0000 0x0000 0xa 0x0
17 #define IMX7ULP_PAD_PTC0__LPUART4_CTS_B 0x0000 0x0244 0x4 0x1
18 #define IMX7ULP_PAD_PTC0__LPI2C4_SCL 0x0000 0x0278 0x5 0x1
19 #define IMX7ULP_PAD_PTC0__TPM4_CLKIN 0x0000 0x0298 0x6 0x1
20 #define IMX7ULP_PAD_PTC0__FB_AD0 0x0000 0x0000 0x9 0x0
21 #define IMX7ULP_PAD_PTC1__PTC1 0x0004 0x0000 0x1 0x0
22 #define IMX7ULP_PAD_PTC1__TRACE_D14 0x0004 0x0000 0xa 0x0
23 #define IMX7ULP_PAD_PTC1__LPUART4_RTS_B 0x0004 0x0000 0x4 0x0
24 #define IMX7ULP_PAD_PTC1__LPI2C4_SDA 0x0004 0x027c 0x5 0x1
[all …]
Dimx6ul-pinfunc.h13 #define MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x0014 0x02a0 0x0000 5 0
14 #define MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x0018 0x02a4 0x0000 5 0
16 #define MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x001c 0x02a8 0x0000 5 0
17 #define MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0020 0x02ac 0x0000 5 0
18 #define MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0024 0x02b0 0x0000 5 0
19 #define MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0028 0x02b4 0x0000 5 0
20 #define MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x002c 0x02b8 0x0000 5 0
21 #define MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0030 0x02bc 0x0000 5 0
22 #define MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0034 0x02c0 0x0000 5 0
23 #define MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0038 0x02c4 0x0000 5 0
[all …]
Dimx6sll-pinfunc.h15 #define MX6SLL_PAD_WDOG_B__WDOG1_B 0x0014 0x02DC 0x0000 0x0 0x0
16 #define MX6SLL_PAD_WDOG_B__WDOG1_RESET_B_DEB 0x0014 0x02DC 0x0000 0x1 0x0
17 #define MX6SLL_PAD_WDOG_B__UART5_RI_B 0x0014 0x02DC 0x0000 0x2 0x0
18 #define MX6SLL_PAD_WDOG_B__GPIO3_IO18 0x0014 0x02DC 0x0000 0x5 0x0
19 #define MX6SLL_PAD_REF_CLK_24M__XTALOSC_REF_CLK_24M 0x0018 0x02E0 0x0000 0x0 0x0
20 #define MX6SLL_PAD_REF_CLK_24M__I2C3_SCL 0x0018 0x02E0 0x068C 0x1 0x0
21 #define MX6SLL_PAD_REF_CLK_24M__PWM3_OUT 0x0018 0x02E0 0x0000 0x2 0x0
22 #define MX6SLL_PAD_REF_CLK_24M__USB_OTG2_ID 0x0018 0x02E0 0x0560 0x3 0x0
23 #define MX6SLL_PAD_REF_CLK_24M__CCM_PMIC_READY 0x0018 0x02E0 0x05AC 0x4 0x0
24 #define MX6SLL_PAD_REF_CLK_24M__GPIO3_IO21 0x0018 0x02E0 0x0000 0x5 0x0
[all …]
Dimx7d-pinfunc.h14 #define MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0000 0x0030 0x0000 0x0 0x0
15 #define MX7D_PAD_LPSR_GPIO1_IO00__PWM4_OUT 0x0000 0x0030 0x0000 0x1 0x0
16 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_ANY 0x0000 0x0030 0x0000 0x2 0x0
17 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x0000 0x0030 0x0000 0x3 0x0
18 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG__RST_B_DEB 0x0000 0x0030 0x0000 0x4 0x0
19 #define MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x0004 0x0034 0x0000 0x0 0x0
20 #define MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x0004 0x0034 0x0000 0x1 0x0
21 #define MX7D_PAD_LPSR_GPIO1_IO01__CCM_ENET_REF_CLK3 0x0004 0x0034 0x0000 0x2 0x0
22 #define MX7D_PAD_LPSR_GPIO1_IO01__SAI1_MCLK 0x0004 0x0034 0x0000 0x3 0x0
23 #define MX7D_PAD_LPSR_GPIO1_IO01__ANATOP_24M_OUT 0x0004 0x0034 0x0000 0x4 0x0
[all …]
/Linux-v6.1/arch/s390/boot/
Dipl_data.c15 psw_t32 ipl_psw; /* 0x0000 */
16 struct ccw0 ccwpgm[2]; /* 0x0008 */
17 u8 fill[56]; /* 0x0018 */
18 struct ccw0 ccwpgmcc[20]; /* 0x0050 */
19 u8 pad_0xf0[0x01a0-0x00f0]; /* 0x00f0 */
20 psw_t restart_psw; /* 0x01a0 */
21 psw_t external_new_psw; /* 0x01b0 */
22 psw_t svc_new_psw; /* 0x01c0 */
23 psw_t program_new_psw; /* 0x01d0 */
24 psw_t mcck_new_psw; /* 0x01e0 */
[all …]
/Linux-v6.1/drivers/mtd/nand/onenand/
Dsamsung.h12 #define MEM_CFG_OFFSET 0x0000
13 #define BURST_LEN_OFFSET 0x0010
14 #define MEM_RESET_OFFSET 0x0020
15 #define INT_ERR_STAT_OFFSET 0x0030
16 #define INT_ERR_MASK_OFFSET 0x0040
17 #define INT_ERR_ACK_OFFSET 0x0050
18 #define ECC_ERR_STAT_OFFSET 0x0060
19 #define MANUFACT_ID_OFFSET 0x0070
20 #define DEVICE_ID_OFFSET 0x0080
21 #define DATA_BUF_SIZE_OFFSET 0x0090
[all …]
/Linux-v6.1/arch/s390/include/asm/
Dlowcore.h25 __u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */
26 __u32 ipl_parmblock_ptr; /* 0x0014 */
27 __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */
28 __u32 ext_params; /* 0x0080 */
31 __u16 ext_cpu_addr; /* 0x0084 */
32 __u16 ext_int_code; /* 0x0086 */
36 __u32 svc_int_code; /* 0x0088 */
39 __u16 pgm_ilc; /* 0x008c */
40 __u16 pgm_code; /* 0x008e */
44 __u32 data_exc_code; /* 0x0090 */
[all …]
/Linux-v6.1/arch/arm64/boot/dts/ti/
Dk3-am6548-iot2050-advanced-common.dtsi20 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
27 AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
28 AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
29 AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
30 AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
31 AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
32 AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
33 AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
34 AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
35 AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
[all …]
/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dimx93-pinfunc.h13 #define MX93_PAD_DAP_TDI__JTAG_MUX_TDI 0x0000 0x01B0 0x03D8 0x0 0x0
14 #define MX93_PAD_DAP_TDI__MQS2_LEFT 0x0000 0x01B0 0x0000 0x1 0x0
15 #define MX93_PAD_DAP_TDI__CAN2_TX 0x0000 0x01B0 0x0000 0x3 0x0
16 #define MX93_PAD_DAP_TDI__FLEXIO2_FLEXIO30 0x0000 0x01B0 0x0000 0x4 0x0
17 #define MX93_PAD_DAP_TDI__GPIO3_IO28 0x0000 0x01B0 0x0000 0x5 0x0
18 #define MX93_PAD_DAP_TDI__LPUART5_RX 0x0000 0x01B0 0x0430 0x6 0x0
19 #define MX93_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS 0x0004 0x01B4 0x03DC 0x0 0x0
20 #define MX93_PAD_DAP_TMS_SWDIO__FLEXIO2_FLEXIO31 0x0004 0x01B4 0x0000 0x4 0x0
21 #define MX93_PAD_DAP_TMS_SWDIO__GPIO3_IO29 0x0004 0x01B4 0x0000 0x5 0x0
22 #define MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x0004 0x01B4 0x0000 0x6 0x0
[all …]
/Linux-v6.1/drivers/net/wireless/broadcom/b43/
Dtables_phy_lcn.c30 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d,
31 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d,
32 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d,
33 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d,
34 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d,
35 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d,
36 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d,
37 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d,
38 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d,
39 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d,
[all …]
/Linux-v6.1/drivers/media/dvb-frontends/
Dsi2165_priv.h15 * possible values: 0x64,0x65,0x66,0x67
34 #define REG_CHIP_MODE 0x0000
35 #define REG_CHIP_REVCODE 0x0023
36 #define REV_CHIP_TYPE 0x0118
37 #define REG_CHIP_INIT 0x0050
38 #define REG_INIT_DONE 0x0054
39 #define REG_START_INIT 0x0096
40 #define REG_PLL_DIVL 0x00a0
41 #define REG_RST_ALL 0x00c0
42 #define REG_LOCK_TIMEOUT 0x00c4
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/sound/
Dwlf,wm8903.yaml48 default: 0
63 If any entry has the value 0xffffffff, that GPIO's
91 #size-cells = <0>;
95 reg = <0x1a>;
106 micdet-cfg = <0>;
109 0x0600 /* DMIC_LR, output */
110 0x0680 /* DMIC_DAT, input */
111 0x0000 /* GPIO, output, low */
112 0x0200 /* Interrupt, output */
113 0x01a0 /* BCLK, input, active high */
/Linux-v6.1/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/
Dnv40.c37 u32 dma0 = nvkm_instmem_rd32(imem, inst + 0); in nv40_mpeg_mthd_dma()
40 u32 base = (dma2 & 0xfffff000) | (dma0 >> 20); in nv40_mpeg_mthd_dma()
44 if (!(dma0 & 0x00002000)) { in nv40_mpeg_mthd_dma()
50 if (mthd == 0x0190) { in nv40_mpeg_mthd_dma()
52 nvkm_mask(device, 0x00b300, 0x00030000, (dma0 & 0x00030000)); in nv40_mpeg_mthd_dma()
53 nvkm_wr32(device, 0x00b334, base); in nv40_mpeg_mthd_dma()
54 nvkm_wr32(device, 0x00b324, size); in nv40_mpeg_mthd_dma()
56 if (mthd == 0x01a0) { in nv40_mpeg_mthd_dma()
58 nvkm_mask(device, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2); in nv40_mpeg_mthd_dma()
59 nvkm_wr32(device, 0x00b360, base); in nv40_mpeg_mthd_dma()
[all …]
/Linux-v6.1/drivers/net/wireless/mediatek/mt76/
Dsdio.h12 #define MCR_WCIR 0x0000
13 #define MCR_WHLPCR 0x0004
18 #define WHLPCR_INT_EN_SET BIT(0)
20 #define MCR_WSDIOCSR 0x0008
21 #define MCR_WHCR 0x000C
32 #define MCR_WHISR 0x0010
33 #define MCR_WHIER 0x0014
40 #define WHIER_TX_DONE_INT_EN BIT(0)
47 #define MCR_WASR 0x0020
48 #define MCR_WSICR 0x0024
[all …]
/Linux-v6.1/include/linux/bcma/
Dbcma_driver_pcie2.h5 #define BCMA_CORE_PCIE2_CLK_CONTROL 0x0000
6 #define PCIE2_CLKC_RST_OE 0x0001 /* When set, drives PCI_RESET out to pin */
7 #define PCIE2_CLKC_RST 0x0002 /* Value driven out to pin */
8 #define PCIE2_CLKC_SPERST 0x0004 /* SurvivePeRst */
9 #define PCIE2_CLKC_DISABLE_L1CLK_GATING 0x0010
10 #define PCIE2_CLKC_DLYPERST 0x0100 /* Delay PeRst to CoE Core */
11 #define PCIE2_CLKC_DISSPROMLD 0x0200 /* DisableSpromLoadOnPerst */
12 #define PCIE2_CLKC_WAKE_MODE_L2 0x1000 /* Wake on L2 */
13 #define BCMA_CORE_PCIE2_RC_PM_CONTROL 0x0004
14 #define BCMA_CORE_PCIE2_RC_PM_STATUS 0x0008
[all …]
/Linux-v6.1/drivers/gpu/drm/nouveau/dispnv04/
Ddisp.h23 uint8_t CRTC[0xa0];
24 uint8_t CR58[0x10];
133 const int impl = to_pci_dev(dev->dev)->device & 0x0ff0; in nv_two_heads()
135 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_CELSIUS && impl != 0x0100 && in nv_two_heads()
136 impl != 0x0150 && impl != 0x01a0 && impl != 0x0200) in nv_two_heads()
145 return nv_two_heads(dev) && (to_pci_dev(dev->dev)->device & 0x0ff0) != 0x0110; in nv_gf4_disp_arch()
152 const int impl = to_pci_dev(dev->dev)->device & 0x0ff0; in nv_two_reg_pll()
154 if (impl == 0x0310 || impl == 0x0340 || drm->client.device.info.family >= NV_DEVICE_INFO_V0_CURIE) in nv_two_reg_pll()
/Linux-v6.1/drivers/video/fbdev/
Dcarminefb_regs.h5 #define CARMINE_OVERLAY_EXT_MODE (0x00000002)
6 #define CARMINE_GRAPH_REG (0x00000000)
7 #define CARMINE_DISP0_REG (0x00100000)
8 #define CARMINE_DISP1_REG (0x00140000)
9 #define CARMINE_WB_REG (0x00180000)
10 #define CARMINE_DCTL_REG (0x00300000)
11 #define CARMINE_CTL_REG (0x00400000)
12 #define CARMINE_WINDOW_MODE (0x00000001)
19 #define CARMINE_EXT_CMODE_DIRECT24_RGBA (0xC0000000)
20 #define CARMINE_DCTL_REG_MODE_ADD (0x00)
[all …]
/Linux-v6.1/drivers/gpu/drm/rockchip/
Drockchip_vop_reg.h11 #define RK3288_REG_CFG_DONE 0x0000
12 #define RK3288_VERSION_INFO 0x0004
13 #define RK3288_SYS_CTRL 0x0008
14 #define RK3288_SYS_CTRL1 0x000c
15 #define RK3288_DSP_CTRL0 0x0010
16 #define RK3288_DSP_CTRL1 0x0014
17 #define RK3288_DSP_BG 0x0018
18 #define RK3288_MCU_CTRL 0x001c
19 #define RK3288_INTR_CTRL0 0x0020
20 #define RK3288_INTR_CTRL1 0x0024
[all …]
/Linux-v6.1/fs/ntfs/
Dupcase.c16 {0x0061, 0x007B, -32}, {0x0451, 0x045D, -80}, {0x1F70, 0x1F72, 74}, in generate_default_upcase()
17 {0x00E0, 0x00F7, -32}, {0x045E, 0x0460, -80}, {0x1F72, 0x1F76, 86}, in generate_default_upcase()
18 {0x00F8, 0x00FF, -32}, {0x0561, 0x0587, -48}, {0x1F76, 0x1F78, 100}, in generate_default_upcase()
19 {0x0256, 0x0258, -205}, {0x1F00, 0x1F08, 8}, {0x1F78, 0x1F7A, 128}, in generate_default_upcase()
20 {0x028A, 0x028C, -217}, {0x1F10, 0x1F16, 8}, {0x1F7A, 0x1F7C, 112}, in generate_default_upcase()
21 {0x03AC, 0x03AD, -38}, {0x1F20, 0x1F28, 8}, {0x1F7C, 0x1F7E, 126}, in generate_default_upcase()
22 {0x03AD, 0x03B0, -37}, {0x1F30, 0x1F38, 8}, {0x1FB0, 0x1FB2, 8}, in generate_default_upcase()
23 {0x03B1, 0x03C2, -32}, {0x1F40, 0x1F46, 8}, {0x1FD0, 0x1FD2, 8}, in generate_default_upcase()
24 {0x03C2, 0x03C3, -31}, {0x1F51, 0x1F52, 8}, {0x1FE0, 0x1FE2, 8}, in generate_default_upcase()
25 {0x03C3, 0x03CC, -32}, {0x1F53, 0x1F54, 8}, {0x1FE5, 0x1FE6, 7}, in generate_default_upcase()
[all …]
/Linux-v6.1/drivers/media/usb/gspca/
Dzc3xx-reg.h12 #define ZC3XX_R000_SYSTEMCONTROL 0x0000
13 #define ZC3XX_R001_SYSTEMOPERATING 0x0001
16 #define ZC3XX_R002_CLOCKSELECT 0x0002
17 #define ZC3XX_R003_FRAMEWIDTHHIGH 0x0003
18 #define ZC3XX_R004_FRAMEWIDTHLOW 0x0004
19 #define ZC3XX_R005_FRAMEHEIGHTHIGH 0x0005
20 #define ZC3XX_R006_FRAMEHEIGHTLOW 0x0006
23 #define ZC3XX_R008_CLOCKSETTING 0x0008
26 #define ZC3XX_R00B_TESTMODECONTROL 0x000b
29 #define ZC3XX_R00C_LASTACQTIME 0x000c
[all …]
/Linux-v6.1/arch/ia64/include/uapi/asm/
Dptrace_offsets.h77 #define PT_F32 0x0000
78 #define PT_F33 0x0010
79 #define PT_F34 0x0020
80 #define PT_F35 0x0030
81 #define PT_F36 0x0040
82 #define PT_F37 0x0050
83 #define PT_F38 0x0060
84 #define PT_F39 0x0070
85 #define PT_F40 0x0080
86 #define PT_F41 0x0090
[all …]
/Linux-v6.1/arch/x86/crypto/
Dchacha-avx512vl-x86_64.S12 CTR2BL: .octa 0x00000000000000000000000000000000
13 .octa 0x00000000000000000000000000000001
17 CTR4BL: .octa 0x00000000000000000000000000000002
18 .octa 0x00000000000000000000000000000003
22 CTR8BL: .octa 0x00000003000000020000000100000000
23 .octa 0x00000007000000060000000500000004
41 # x0..3[0-2] = s0..3
42 vbroadcasti128 0x00(%rdi),%ymm0
43 vbroadcasti128 0x10(%rdi),%ymm1
44 vbroadcasti128 0x20(%rdi),%ymm2
[all …]
/Linux-v6.1/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
Dphytbl_lcn.c10 0x00000000,
11 0x00000000,
12 0x00000000,
13 0x00000000,
14 0x00000000,
15 0x00000000,
16 0x00000000,
17 0x00000000,
18 0x00000004,
19 0x00000000,
[all …]

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