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/Linux-v5.10/Documentation/devicetree/bindings/gpu/
Dvivante,gc.yaml68 reg = <0x00130000 0x4000>;
69 interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
/Linux-v5.10/arch/arm/mach-ep93xx/
Dcrunch-bits.S22 #define CRUNCH_MVDX0 0
68 ldr r8, =(EP93XX_APB_VIRT_BASE + 0x00130000) @ syscon addr
70 ldr r1, [r8, #0x80]
71 tst r1, #0x00800000 @ access to crunch enabled?
73 mov r3, #0xaa @ unlock syscon swlock
74 str r3, [r8, #0xc0]
75 orr r1, r1, #0x00800000 @ enable access to crunch
76 str r1, [r8, #0x80]
86 ldr r2, [r8, #0x80]
89 teq r1, #0 @ test for last ownership
[all …]
Dsoc.h19 * the synchronous boot mode is selected. When ASDO is "0" (i.e
23 * 0x00000000 and nCS0 is decoded starting at 0xf0000000. For asynchronous
24 * boot mode they are swapped with nCS0 decoded at 0x00000000 ann nSDCE3
25 * decoded at 0xf0000000.
34 #define EP93XX_CS0_PHYS_BASE_ASYNC 0x00000000 /* ASDO Pin = 0 */
35 #define EP93XX_SDCE3_PHYS_BASE_SYNC 0x00000000 /* ASDO Pin = 1 */
36 #define EP93XX_CS1_PHYS_BASE 0x10000000
37 #define EP93XX_CS2_PHYS_BASE 0x20000000
38 #define EP93XX_CS3_PHYS_BASE 0x30000000
39 #define EP93XX_PCMCIA_PHYS_BASE 0x40000000
[all …]
/Linux-v5.10/arch/arm64/boot/dts/broadcom/stingray/
Dstingray-sata.dtsi37 ranges = <0x0 0x0 0x67d00000 0x00800000>;
39 sata0: ahci@0 {
41 reg = <0x00000000 0x1000>;
45 #size-cells = <0>;
48 sata0_port0: sata-port@0 {
49 reg = <0>;
57 reg = <0x00002100 0x1000>;
60 #size-cells = <0>;
63 sata0_phy0: sata-phy@0 {
64 reg = <0>;
[all …]
Dstingray.dtsi43 #size-cells = <0>;
45 cpu@0 {
48 reg = <0x0 0x0>;
56 reg = <0x0 0x1>;
64 reg = <0x0 0x100>;
72 reg = <0x0 0x101>;
80 reg = <0x0 0x200>;
88 reg = <0x0 0x201>;
96 reg = <0x0 0x300>;
104 reg = <0x0 0x301>;
[all …]
/Linux-v5.10/arch/m68k/include/asm/
Dm528xsim.h24 #define MCFICM_INTC0 (MCF_IPSBAR + 0x0c00) /* Base for Interrupt Ctrl 0 */
25 #define MCFICM_INTC1 (MCF_IPSBAR + 0x0d00) /* Base for Interrupt Ctrl 0 */
27 #define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
28 #define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
29 #define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
30 #define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */
31 #define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */
32 #define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */
33 #define MCFINTC_IRLR 0x18 /* */
34 #define MCFINTC_IACKL 0x19 /* */
[all …]
/Linux-v5.10/drivers/gpio/
Dgpio-ich.c29 GPIO_USE_SEL = 0,
36 {0x00, 0x30, 0x40}, /* USE_SEL[1-3] offsets */
37 {0x04, 0x34, 0x44}, /* IO_SEL[1-3] offsets */
38 {0x0c, 0x38, 0x48}, /* LVL[1-3] offsets */
39 {0x18, 0x18, 0x18}, /* BLINK offset */
43 0x30, 0x10, 0x10,
47 {0x00, 0x80, 0x00},
48 {0x04, 0x84, 0x00},
49 {0x08, 0x88, 0x00},
53 0x10, 0x10, 0x00,
[all …]
/Linux-v5.10/drivers/net/ethernet/ti/
Dnetcp_xgbepcsr.c13 #define XGBE_CTRL_OFFSET 0x0c
14 #define XGBE_SGMII_1_OFFSET 0x0114
15 #define XGBE_SGMII_2_OFFSET 0x0214
18 #define PCSR_CPU_CTRL_OFFSET 0x1fd0
31 #define PHY_A(serdes) 0
40 {0x0000, 0x00800002, 0x00ff00ff},
41 {0x0014, 0x00003838, 0x0000ffff},
42 {0x0060, 0x1c44e438, 0xffffffff},
43 {0x0064, 0x00c18400, 0x00ffffff},
44 {0x0068, 0x17078200, 0xffffff00},
[all …]
/Linux-v5.10/arch/arm/boot/dts/
Dam437x-idk-evm.dts104 pinctrl-0 = <&gpio_keys_pins_default>;
106 #size-cells = <0>;
117 #clock-cells = <0>;
127 gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
178 AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7) /* cam0_field.gpio4_2 */
184 AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
185 AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
191 AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7)
192 AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7)
198 AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */
[all …]
Dam437x-sk-evm.dts31 #clock-cells = <0>;
38 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
39 brightness-levels = <0 51 53 56 62 75 101 152 255>;
73 pinctrl-0 = <&matrix_keypad_pins>;
85 MATRIX_KEY(0, 0, KEY_DOWN)
86 MATRIX_KEY(0, 1, KEY_RIGHT)
87 MATRIX_KEY(1, 0, KEY_LEFT)
96 pinctrl-0 = <&leds_pins>;
100 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
131 pinctrl-0 = <&lcd_pins>;
[all …]
Dam43x-epos-evm.dts62 pinctrl-0 = <&matrix_keypad_default>;
76 linux,keymap = <0x00000201 /* P1 */
77 0x01000204 /* P4 */
78 0x02000207 /* P7 */
79 0x0300020a /* NUMERIC_STAR */
80 0x00010202 /* P2 */
81 0x01010205 /* P5 */
82 0x02010208 /* P8 */
83 0x03010200 /* P0 */
84 0x00020203 /* P3 */
[all …]
Dimx6qdl.dtsi55 #clock-cells = <0>;
61 #clock-cells = <0>;
62 clock-frequency = <0>;
67 #clock-cells = <0>;
74 #size-cells = <0>;
79 lvds-channel@0 {
81 #size-cells = <0>;
82 reg = <0>;
85 port@0 {
86 reg = <0>;
[all …]
/Linux-v5.10/drivers/net/ethernet/broadcom/
Dtg3.h17 #define TG3_64BIT_REG_HIGH 0x00UL
18 #define TG3_64BIT_REG_LOW 0x04UL
21 #define TG3_BDINFO_HOST_ADDR 0x0UL /* 64-bit */
22 #define TG3_BDINFO_MAXLEN_FLAGS 0x8UL /* 32-bit */
23 #define BDINFO_FLAGS_USE_EXT_RECV 0x00000001 /* ext rx_buffer_desc */
24 #define BDINFO_FLAGS_DISABLED 0x00000002
25 #define BDINFO_FLAGS_MAXLEN_MASK 0xffff0000
27 #define TG3_BDINFO_NIC_ADDR 0xcUL /* 32-bit */
28 #define TG3_BDINFO_SIZE 0x10UL
41 #define TG3PCI_VENDOR 0x00000000
[all …]
/Linux-v5.10/arch/parisc/kernel/
Dperf_images.h27 0x4c00c000, 0x00000000, 0x00060000, 0x00000000,
28 0xe0e0e0e0, 0x004e0004, 0x07ffffff, 0xffc01380,
29 0x0101ffff, 0xfffff104, 0xe000c07f, 0xfffffffc,
30 0x01380010, 0x1fffffff, 0xff000000, 0x00000000,
31 0x00000fff, 0xff00000f, 0xffff0000, 0x0fffff00,
32 0x000fffff, 0x00000000, 0x00000000, 0x00ffffff,
33 0xfffff000, 0x0000000f, 0xffffffff, 0xff000000,
34 0x0000ffff, 0xfffffff0, 0x00000000, 0x0fffffff,
35 0xffff0000, 0x00000000, 0x6fffffff, 0xffffffff,
36 0xfff55fff, 0xffffffff, 0xffffffff, 0xf0000000,
[all …]
/Linux-v5.10/drivers/message/fusion/lsi/
Dmpi_log_sas.h16 #define SAS_LOGINFO_NEXUS_LOSS 0x31170000
17 #define SAS_LOGINFO_MASK 0xFFFF0000
20 /* IOC LOGINFO defines, 0x00000000 - 0x0FFFFFFF */
23 /* Bits 27-24: IOC_LOGINFO_ORIGINATOR: 0=IOP, 1=PL, 2=IR */
25 /* Bits 15-0: LOGINFO_CODE Specific */
31 #define IOC_LOGINFO_ORIGINATOR_IOP (0x00000000)
32 #define IOC_LOGINFO_ORIGINATOR_PL (0x01000000)
33 #define IOC_LOGINFO_ORIGINATOR_IR (0x02000000)
35 #define IOC_LOGINFO_ORIGINATOR_MASK (0x0F000000)
40 #define IOC_LOGINFO_CODE_MASK (0x00FF0000)
[all …]
/Linux-v5.10/crypto/
Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/Linux-v5.10/drivers/net/ethernet/qlogic/qed/
Dqed_hsi.h130 #define CORE_PWM_PROD_UPDATE_DATA_AGG_CMD_MASK 0x3
131 #define CORE_PWM_PROD_UPDATE_DATA_AGG_CMD_SHIFT 0
132 #define CORE_PWM_PROD_UPDATE_DATA_RESERVED1_MASK 0x3F /* Set 0 */
162 #define CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG_MASK 0x3
163 #define CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG_SHIFT 0
164 #define CORE_RX_ACTION_ON_ERROR_NO_BUFF_MASK 0x3
166 #define CORE_RX_ACTION_ON_ERROR_RESERVED_MASK 0xF
285 #define CORE_TX_BD_DATA_FORCE_VLAN_MODE_MASK 0x1
286 #define CORE_TX_BD_DATA_FORCE_VLAN_MODE_SHIFT 0
287 #define CORE_TX_BD_DATA_VLAN_INSERTION_MASK 0x1
[all …]