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/Linux-v6.6/arch/mips/alchemy/
Dboard-xxs1500.c37 __asm__ __volatile__("jr\t%0" : : "r"(0xbfc00000)); in xxs1500_reset()
67 /* Enable DTR (MCR bit 0) = USB power up */ in board_setup()
68 __raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18)); in board_setup()
79 .end = AU1000_PCMCIA_IO_PHYS_ADDR + 0x000400000 - 1,
85 .end = AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
91 .end = AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
/Linux-v6.6/arch/mips/alchemy/devboards/
Ddb1550.c78 (whoami >> 4) & 0xf, (whoami >> 8) & 0xf, whoami & 0xf); in db1550_board_setup()
81 return 0; in db1550_board_setup()
91 .offset = 0,
108 .bus_num = 0,
109 .chip_select = 0,
116 .bus_num = 0,
124 { I2C_BOARD_INFO("24c04", 0x52),}, /* AT24C04-10 I2C eeprom */
125 { I2C_BOARD_INFO("ne1619", 0x2d),}, /* adm1025-compat hwmon */
126 { I2C_BOARD_INFO("wm8731", 0x1b),}, /* I2S audio codec WM8731 */
136 ioaddr &= 0xffffff00; in au1550_nand_cmd_ctrl()
[all …]
Ddb1000.c49 return 0; in db1000_board_setup()
56 if ((slot < 12) || (slot > 13) || pin == 0) in db1500_map_pci_irq()
59 return (pin == 1) ? AU1500_PCI_INTA : 0xff; in db1500_map_pci_irq()
74 [0] = {
76 .end = AU1500_PCI_PHYS_ADDR + 0xfff,
88 .id = 0,
99 [0] = {
101 .end = AU1100_LCD_PHYS_ADDR + 0x800 - 1,
113 .id = 0,
123 [0] = {
[all …]
Ddb1200.c35 #define BCSR_INT_IDE 0x0001
36 #define BCSR_INT_ETH 0x0002
37 #define BCSR_INT_PC0 0x0004
38 #define BCSR_INT_PC0STSCHG 0x0008
39 #define BCSR_INT_PC1 0x0010
40 #define BCSR_INT_PC1STSCHG 0x0020
41 #define BCSR_INT_DC 0x0040
42 #define BCSR_INT_FLASHBUSY 0x0080
43 #define BCSR_INT_PC0INSERT 0x0100
44 #define BCSR_INT_PC0EJECT 0x0200
[all …]
/Linux-v6.6/Documentation/devicetree/bindings/pci/
Dfsl,imx6q-pcie-ep.yaml102 reg = <0x33800000 0x000400000>, <0x18000000 0x08000000>;
/Linux-v6.6/arch/sh/drivers/pci/
Dpci-sh4.h15 #define SH4_PCICR 0x100 /* PCI Control Register */
16 #define SH4_PCICR_PREFIX 0xA5000000 /* CR prefix for write */
17 #define SH4_PCICR_FTO 0x00000400 /* TRDY/IRDY Enable */
18 #define SH4_PCICR_TRSB 0x00000200 /* Target Read Single */
19 #define SH4_PCICR_BSWP 0x00000100 /* Target Byte Swap */
20 #define SH4_PCICR_PLUP 0x00000080 /* Enable PCI Pullup */
21 #define SH4_PCICR_ARBM 0x00000040 /* PCI Arbitration Mode */
22 #define SH4_PCICR_MD 0x00000030 /* MD9 and MD10 status */
23 #define SH4_PCICR_SERR 0x00000008 /* SERR output assert */
24 #define SH4_PCICR_INTA 0x00000004 /* INTA output assert */
[all …]
/Linux-v6.6/arch/arm64/boot/dts/freescale/
Dimx8mq.dtsi47 #clock-cells = <0>;
54 #clock-cells = <0>;
61 #clock-cells = <0>;
68 #clock-cells = <0>;
75 #clock-cells = <0>;
82 #clock-cells = <0>;
89 #clock-cells = <0>;
96 #clock-cells = <0>;
103 #size-cells = <0>;
105 A53_0: cpu@0 {
[all …]
Dimx8mp.dtsi48 #size-cells = <0>;
50 A53_0: cpu@0 {
53 reg = <0x0>;
57 i-cache-size = <0x8000>;
60 d-cache-size = <0x8000>;
73 reg = <0x1>;
77 i-cache-size = <0x8000>;
80 d-cache-size = <0x8000>;
91 reg = <0x2>;
95 i-cache-size = <0x8000>;
[all …]