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/Linux-v6.6/arch/arm/boot/dts/nvidia/
Dtegra124-nyan-blaze-emc.dtsi92 0x40040001
93 0x8000000a
94 0x00000001
95 0x00000001
96 0x00000002
97 0x00000000
98 0x00000002
99 0x00000001
100 0x00000002
101 0x00000008
[all …]
Dtegra124-apalis-emc.dtsi108 0x40040001 0x8000000a
109 0x00000001 0x00000001
110 0x00000002 0x00000000
111 0x00000002 0x00000001
112 0x00000003 0x00000008
113 0x00000003 0x00000002
114 0x00000003 0x00000006
115 0x06030203 0x000a0502
116 0x77e30303 0x70000f03
117 0x001f0000
[all …]
Dtegra124-jetson-tk1-emc.dtsi104 0x40040001
105 0x8000000a
106 0x00000001
107 0x00000001
108 0x00000002
109 0x00000000
110 0x00000002
111 0x00000001
112 0x00000003
113 0x00000008
[all …]
Dtegra124-nyan-big-emc.dtsi263 0x40040001 /* MC_EMEM_ARB_CFG */
264 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */
265 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
266 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
267 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
268 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
269 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
270 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
271 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
272 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
[all …]
/Linux-v6.6/drivers/net/wireless/broadcom/b43/
Ddma.h19 #define B43_DMA32_TXCTL 0x00
20 #define B43_DMA32_TXENABLE 0x00000001
21 #define B43_DMA32_TXSUSPEND 0x00000002
22 #define B43_DMA32_TXLOOPBACK 0x00000004
23 #define B43_DMA32_TXFLUSH 0x00000010
24 #define B43_DMA32_TXPARITYDISABLE 0x00000800
25 #define B43_DMA32_TXADDREXT_MASK 0x00030000
27 #define B43_DMA32_TXRING 0x04
28 #define B43_DMA32_TXINDEX 0x08
29 #define B43_DMA32_TXSTATUS 0x0C
[all …]
/Linux-v6.6/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/
Dnv40.c37 u32 dma0 = nvkm_instmem_rd32(imem, inst + 0); in nv40_mpeg_mthd_dma()
40 u32 base = (dma2 & 0xfffff000) | (dma0 >> 20); in nv40_mpeg_mthd_dma()
44 if (!(dma0 & 0x00002000)) { in nv40_mpeg_mthd_dma()
50 if (mthd == 0x0190) { in nv40_mpeg_mthd_dma()
52 nvkm_mask(device, 0x00b300, 0x00030000, (dma0 & 0x00030000)); in nv40_mpeg_mthd_dma()
53 nvkm_wr32(device, 0x00b334, base); in nv40_mpeg_mthd_dma()
54 nvkm_wr32(device, 0x00b324, size); in nv40_mpeg_mthd_dma()
56 if (mthd == 0x01a0) { in nv40_mpeg_mthd_dma()
58 nvkm_mask(device, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2); in nv40_mpeg_mthd_dma()
59 nvkm_wr32(device, 0x00b360, base); in nv40_mpeg_mthd_dma()
[all …]
Dnv31.c44 if (ret == 0) { in nv31_mpeg_object_bind()
46 nvkm_wo32(*pgpuobj, 0x00, object->oclass); in nv31_mpeg_object_bind()
47 nvkm_wo32(*pgpuobj, 0x04, 0x00000000); in nv31_mpeg_object_bind()
48 nvkm_wo32(*pgpuobj, 0x08, 0x00000000); in nv31_mpeg_object_bind()
49 nvkm_wo32(*pgpuobj, 0x0c, 0x00000000); in nv31_mpeg_object_bind()
102 ret = 0; in nv31_mpeg_chan_new()
118 nvkm_wr32(device, 0x00b008 + (i * 0x10), tile->pitch); in nv31_mpeg_tile()
119 nvkm_wr32(device, 0x00b004 + (i * 0x10), tile->limit); in nv31_mpeg_tile()
120 nvkm_wr32(device, 0x00b000 + (i * 0x10), tile->addr); in nv31_mpeg_tile()
129 u32 dma0 = nvkm_rd32(device, 0x700000 + inst); in nv31_mpeg_mthd_dma()
[all …]
/Linux-v6.6/drivers/net/wireless/broadcom/b43legacy/
Ddma.h24 #define B43legacy_DMA32_TXCTL 0x00
25 #define B43legacy_DMA32_TXENABLE 0x00000001
26 #define B43legacy_DMA32_TXSUSPEND 0x00000002
27 #define B43legacy_DMA32_TXLOOPBACK 0x00000004
28 #define B43legacy_DMA32_TXFLUSH 0x00000010
29 #define B43legacy_DMA32_TXADDREXT_MASK 0x00030000
31 #define B43legacy_DMA32_TXRING 0x04
32 #define B43legacy_DMA32_TXINDEX 0x08
33 #define B43legacy_DMA32_TXSTATUS 0x0C
34 #define B43legacy_DMA32_TXDPTR 0x00000FFF
[all …]
/Linux-v6.6/arch/arm/boot/dts/ti/omap/
Domap4460.dtsi12 cpu0: cpu@0 {
32 reg = <0x4a002260 0x4
33 0x4a00232C 0x4
34 0x4a002378 0x18>;
36 interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>; /* talert */
39 #thermal-sensor-cells = <0>;
45 reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>,
46 <0x4A002268 0x4>;
52 1025000 0 0 0 0 0
53 1200000 0 0 0 0 0
[all …]
/Linux-v6.6/arch/parisc/kernel/
Dperf_images.h27 0x4c00c000, 0x00000000, 0x00060000, 0x00000000,
28 0xe0e0e0e0, 0x004e0004, 0x07ffffff, 0xffc01380,
29 0x0101ffff, 0xfffff104, 0xe000c07f, 0xfffffffc,
30 0x01380010, 0x1fffffff, 0xff000000, 0x00000000,
31 0x00000fff, 0xff00000f, 0xffff0000, 0x0fffff00,
32 0x000fffff, 0x00000000, 0x00000000, 0x00ffffff,
33 0xfffff000, 0x0000000f, 0xffffffff, 0xff000000,
34 0x0000ffff, 0xfffffff0, 0x00000000, 0x0fffffff,
35 0xffff0000, 0x00000000, 0x6fffffff, 0xffffffff,
36 0xfff55fff, 0xffffffff, 0xffffffff, 0xf0000000,
[all …]
/Linux-v6.6/drivers/soc/tegra/cbb/
Dtegra194-cbb.c27 #define ERRLOGGER_0_ID_COREID_0 0x00000000
28 #define ERRLOGGER_0_ID_REVISIONID_0 0x00000004
29 #define ERRLOGGER_0_FAULTEN_0 0x00000008
30 #define ERRLOGGER_0_ERRVLD_0 0x0000000c
31 #define ERRLOGGER_0_ERRCLR_0 0x00000010
32 #define ERRLOGGER_0_ERRLOG0_0 0x00000014
33 #define ERRLOGGER_0_ERRLOG1_0 0x00000018
34 #define ERRLOGGER_0_RSVD_00_0 0x0000001c
35 #define ERRLOGGER_0_ERRLOG3_0 0x00000020
36 #define ERRLOGGER_0_ERRLOG4_0 0x00000024
[all …]
/Linux-v6.6/arch/arm/mach-ep93xx/
Dsoc.h20 * the synchronous boot mode is selected. When ASDO is "0" (i.e
24 * 0x00000000 and nCS0 is decoded starting at 0xf0000000. For asynchronous
25 * boot mode they are swapped with nCS0 decoded at 0x00000000 ann nSDCE3
26 * decoded at 0xf0000000.
35 #define EP93XX_CS0_PHYS_BASE_ASYNC 0x00000000 /* ASDO Pin = 0 */
36 #define EP93XX_SDCE3_PHYS_BASE_SYNC 0x00000000 /* ASDO Pin = 1 */
37 #define EP93XX_CS1_PHYS_BASE 0x10000000
38 #define EP93XX_CS2_PHYS_BASE 0x20000000
39 #define EP93XX_CS3_PHYS_BASE 0x30000000
40 #define EP93XX_PCMCIA_PHYS_BASE 0x40000000
[all …]
/Linux-v6.6/sound/soc/fsl/
Dfsl_dma.h10 u8 res0[0x100];
30 u8 res2[0x38];
35 #define CCSR_DMA_MR_BWC_DISABLED 0x0F000000
37 #define CCSR_DMA_MR_BWC_MASK 0x0F000000
40 #define CCSR_DMA_MR_EMP_EN 0x00200000
41 #define CCSR_DMA_MR_EMS_EN 0x00040000
42 #define CCSR_DMA_MR_DAHTS_MASK 0x00030000
43 #define CCSR_DMA_MR_DAHTS_1 0x00000000
44 #define CCSR_DMA_MR_DAHTS_2 0x00010000
45 #define CCSR_DMA_MR_DAHTS_4 0x00020000
[all …]
/Linux-v6.6/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
Dtable.c9 0x024, 0x0011800d,
10 0x028, 0x00ffdb83,
11 0x014, 0x088ba955,
12 0x010, 0x49022b03,
13 0x800, 0x80040002,
14 0x804, 0x00000003,
15 0x808, 0x0000fc00,
16 0x80c, 0x0000000a,
17 0x810, 0x80706388,
18 0x814, 0x020c3d10,
[all …]
/Linux-v6.6/arch/arm64/boot/dts/ti/
Dk3-am62.dtsi54 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
55 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
56 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
57 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
58 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
59 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
60 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
61 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
62 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
63 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
Dk3-am62a.dtsi54 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
55 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
56 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
57 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
58 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
59 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
60 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
61 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
62 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
63 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
Dk3-am62p.dtsi53 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
54 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
55 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
56 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
57 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
58 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
59 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
60 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
61 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
62 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
/Linux-v6.6/drivers/net/wireless/realtek/rtw88/
Dmac.h9 #define cut_version_to_mask(cut) (0x1 << ((cut) + 1))
14 #define ILLEGAL_KEY_GROUP 0xFAAAAA00
17 #define OCPBASE_RXBUF_FW_88XX 0x18680000
18 #define OCPBASE_TXBUF_88XX 0x18780000
19 #define OCPBASE_ROM_88XX 0x00000000
20 #define OCPBASE_IMEM_88XX 0x00030000
21 #define OCPBASE_DMEM_88XX 0x00200000
22 #define OCPBASE_EMEM_88XX 0x00100000
28 #define RSVD_PG_CPU_INSTRUCTION_NUM 0
/Linux-v6.6/sound/pci/cs46xx/
Dcs46xx.h25 #define BA0_HISR 0x00000000
26 #define BA0_HSR0 0x00000004
27 #define BA0_HICR 0x00000008
28 #define BA0_DMSR 0x00000100
29 #define BA0_HSAR 0x00000110
30 #define BA0_HDAR 0x00000114
31 #define BA0_HDMR 0x00000118
32 #define BA0_HDCR 0x0000011C
33 #define BA0_PFMC 0x00000200
34 #define BA0_PFCV1 0x00000204
[all …]
/Linux-v6.6/drivers/gpu/drm/vmwgfx/device_include/
Dsvga_escape.h38 #define SVGA_ESCAPE_NSID_VMWARE 0x00000000
39 #define SVGA_ESCAPE_NSID_DEVEL 0xFFFFFFFF
41 #define SVGA_ESCAPE_VMWARE_MAJOR_MASK 0xFFFF0000
43 #define SVGA_ESCAPE_VMWARE_HINT 0x00030000
44 #define SVGA_ESCAPE_VMWARE_HINT_FULLSCREEN 0x00030001
/Linux-v6.6/include/linux/regulator/
Dmax8973-regulator.h20 #define MAX8973_CONTROL_REMOTE_SENSE_ENABLE 0x00000001
21 #define MAX8973_CONTROL_FALLING_SLEW_RATE_ENABLE 0x00000002
22 #define MAX8973_CONTROL_OUTPUT_ACTIVE_DISCH_ENABLE 0x00000004
23 #define MAX8973_CONTROL_BIAS_ENABLE 0x00000008
24 #define MAX8973_CONTROL_PULL_DOWN_ENABLE 0x00000010
25 #define MAX8973_CONTROL_FREQ_SHIFT_9PER_ENABLE 0x00000020
27 #define MAX8973_CONTROL_CLKADV_TRIP_DISABLED 0x00000000
28 #define MAX8973_CONTROL_CLKADV_TRIP_75mV_PER_US 0x00010000
29 #define MAX8973_CONTROL_CLKADV_TRIP_150mV_PER_US 0x00020000
30 #define MAX8973_CONTROL_CLKADV_TRIP_75mV_PER_US_HIST_DIS 0x00030000
[all …]
/Linux-v6.6/drivers/gpu/drm/etnaviv/
Dstate.xml.h7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
48 #define VARYING_COMPONENT_USE_UNUSED 0x00000000
49 #define VARYING_COMPONENT_USE_USED 0x00000001
50 #define VARYING_COMPONENT_USE_POINTCOORD_X 0x00000002
51 #define VARYING_COMPONENT_USE_POINTCOORD_Y 0x00000003
52 #define FE_DATA_TYPE_BYTE 0x00000000
53 #define FE_DATA_TYPE_UNSIGNED_BYTE 0x00000001
54 #define FE_DATA_TYPE_SHORT 0x00000002
55 #define FE_DATA_TYPE_UNSIGNED_SHORT 0x00000003
[all …]
/Linux-v6.6/drivers/gpu/drm/gma500/
Dpsb_reg.h13 #define PSB_CR_CLKGATECTL 0x0000
16 #define _PSB_C_CLKGATECTL_USE_CLKG_MASK (0x3 << 20)
18 #define _PSB_C_CLKGATECTL_DPM_CLKG_MASK (0x3 << 16)
20 #define _PSB_C_CLKGATECTL_TA_CLKG_MASK (0x3 << 12)
22 #define _PSB_C_CLKGATECTL_TSP_CLKG_MASK (0x3 << 8)
24 #define _PSB_C_CLKGATECTL_ISP_CLKG_MASK (0x3 << 4)
25 #define _PSB_C_CLKGATECTL_2D_CLKG_SHIFT (0)
26 #define _PSB_C_CLKGATECTL_2D_CLKG_MASK (0x3 << 0)
27 #define _PSB_C_CLKGATECTL_CLKG_ENABLED (0)
31 #define PSB_CR_CORE_ID 0x0010
[all …]
/Linux-v6.6/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dgf100.c53 if (!(ssrc & 0x00000100)) in read_vco()
62 u32 ctrl = nvkm_rd32(device, pll + 0x00); in read_pll()
63 u32 coef = nvkm_rd32(device, pll + 0x04); in read_pll()
64 u32 P = (coef & 0x003f0000) >> 16; in read_pll()
65 u32 N = (coef & 0x0000ff00) >> 8; in read_pll()
66 u32 M = (coef & 0x000000ff) >> 0; in read_pll()
69 if (!(ctrl & 0x00000001)) in read_pll()
70 return 0; in read_pll()
73 case 0x00e800: in read_pll()
74 case 0x00e820: in read_pll()
[all …]
/Linux-v6.6/drivers/gpu/drm/radeon/
Davivod.h31 #define D1CRTC_CONTROL 0x6080
32 #define CRTC_EN (1 << 0)
33 #define D1CRTC_STATUS 0x609c
34 #define D1CRTC_UPDATE_LOCK 0x60E8
35 #define D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110
36 #define D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118
38 #define D2CRTC_CONTROL 0x6880
39 #define D2CRTC_STATUS 0x689c
40 #define D2CRTC_UPDATE_LOCK 0x68E8
41 #define D2GRPH_PRIMARY_SURFACE_ADDRESS 0x6910
[all …]

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