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/Linux-v6.1/arch/arm/boot/dts/
Dtegra30-asus-tf300t.dts75 reg = <0x10>;
94 mount-matrix = "0", "-1", "0",
95 "-1", "0", "0",
96 "0", "0", "-1";
100 mount-matrix = "-1", "0", "0",
101 "0", "1", "0",
102 "0", "0", "-1";
107 mount-matrix = "0", "-1", "0",
108 "-1", "0", "0",
109 "0", "0", "1";
[all …]
Dtegra30-asus-tf300tg.dts22 <TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>,
171 reg = <0x10>;
190 mount-matrix = "1", "0", "0",
191 "0", "-1", "0",
192 "0", "0", "-1";
196 mount-matrix = "-1", "0", "0",
197 "0", "1", "0",
198 "0", "0", "-1";
203 mount-matrix = "0", "-1", "0",
204 "-1", "0", "0",
[all …]
Dtegra30-asus-tf201.dts67 reg = <0x4d>;
82 mount-matrix = "-1", "0", "0",
83 "0", "-1", "0",
84 "0", "0", "-1";
88 mount-matrix = "0", "-1", "0",
89 "-1", "0", "0",
90 "0", "0", "-1";
95 mount-matrix = "1", "0", "0",
96 "0", "-1", "0",
97 "0", "0", "1";
[all …]
Dtegra30-asus-tf700t.dts18 port@0 {
92 reg = <0x10>;
111 mount-matrix = "1", "0", "0",
112 "0", "-1", "0",
113 "0", "0", "-1";
117 mount-matrix = "0", "1", "0",
118 "1", "0", "0",
119 "0", "0", "-1";
124 mount-matrix = "0", "-1", "0",
125 "-1", "0", "0",
[all …]
Dtegra124-nyan-blaze-emc.dtsi89 0x40040001
90 0x8000000a
91 0x00000001
92 0x00000001
93 0x00000002
94 0x00000000
95 0x00000002
96 0x00000001
97 0x00000002
98 0x00000008
[all …]
Dtegra124-apalis-emc.dtsi106 0x40040001 0x8000000a
107 0x00000001 0x00000001
108 0x00000002 0x00000000
109 0x00000002 0x00000001
110 0x00000003 0x00000008
111 0x00000003 0x00000002
112 0x00000003 0x00000006
113 0x06030203 0x000a0502
114 0x77e30303 0x70000f03
115 0x001f0000
[all …]
Dtegra124-jetson-tk1-emc.dtsi101 0x40040001
102 0x8000000a
103 0x00000001
104 0x00000001
105 0x00000002
106 0x00000000
107 0x00000002
108 0x00000001
109 0x00000003
110 0x00000008
[all …]
Dtegra30-pegatron-chagall.dts41 reg = <0x80000000 0x40000000>;
51 alloc-ranges = <0x80000000 0x30000000>;
52 size = <0x10000000>; /* 256MiB */
59 reg = <0xbeb00000 0x10000>; /* 64kB */
60 console-size = <0x8000>; /* 32kB */
61 record-size = <0x400>; /* 1kB */
66 reg = <0xbfe00000 0x200000>; /* 2MB */
92 pinctrl-0 = <&state_default>;
136 nvidia,lock = <0>;
137 nvidia,ioreset = <0>;
[all …]
Dtegra30-asus-nexus7-grouper-memory-timings.dtsi5 emc-timings-0 {
6 nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */
12 0x00020001 /* MC_EMEM_ARB_CFG */
13 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */
14 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
15 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
16 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
17 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
18 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
19 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
[all …]
Dtegra30-asus-nexus7-tilapia-memory-timings.dtsi13 emc-timings-0 {
17 nvidia,emc-auto-cal-interval = <0x001fffff>;
18 nvidia,emc-mode-1 = <0x80100002>;
19 nvidia,emc-mode-2 = <0x80200018>;
20 nvidia,emc-mode-reset = <0x80000b71>;
21 nvidia,emc-zcal-cnt-long = <0x00000040>;
25 0x0000001f /* EMC_RC */
26 0x00000069 /* EMC_RFC */
27 0x00000017 /* EMC_RAS */
28 0x00000007 /* EMC_RP */
[all …]
Dtegra124-nyan-big-emc.dtsi260 0x40040001 /* MC_EMEM_ARB_CFG */
261 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */
262 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
263 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
264 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
265 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
266 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
267 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
268 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
269 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
[all …]
Dtegra30-ouya.dts30 reg = <0x80000000 0x40000000>;
40 alloc-ranges = <0x80000000 0x30000000>;
41 size = <0x10000000>; /* 256MiB */
48 reg = <0xbfdf0000 0x10000>; /* 64kB */
49 console-size = <0x8000>; /* 32kB */
50 record-size = <0x400>; /* 1kB */
55 reg = <0xbfe00000 0x200000>;
73 pinctrl-0 = <&state_default>;
2002 nvidia,adjust-baud-rates = <0 9600 100>,
2022 shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_6_1_default.h26 #define cfgPSWUSCFG0_VENDOR_ID_DEFAULT 0x00000000
27 #define cfgPSWUSCFG0_DEVICE_ID_DEFAULT 0x00000000
28 #define cfgPSWUSCFG0_COMMAND_DEFAULT 0x00000000
29 #define cfgPSWUSCFG0_STATUS_DEFAULT 0x00000000
30 #define cfgPSWUSCFG0_REVISION_ID_DEFAULT 0x00000000
31 #define cfgPSWUSCFG0_PROG_INTERFACE_DEFAULT 0x00000000
32 #define cfgPSWUSCFG0_SUB_CLASS_DEFAULT 0x00000000
33 #define cfgPSWUSCFG0_BASE_CLASS_DEFAULT 0x00000000
34 #define cfgPSWUSCFG0_CACHE_LINE_DEFAULT 0x00000000
35 #define cfgPSWUSCFG0_LATENCY_DEFAULT 0x00000000
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra30-emc.yaml35 const: 0
53 "^emc-timings-[0-9]+$":
62 "^timing-[0-9]+$":
75 minimum: 0
91 Mode Register 0.
98 minimum: 0
239 reg = <0x7000f400 0x400>;
240 interrupts = <0 78 4>;
247 #interconnect-cells = <0>;
255 nvidia,emc-auto-cal-interval = <0x001fffff>;
[all …]
Dnvidia,tegra124-emc.yaml33 const: 0
51 "^emc-timings-[0-9]+$":
61 "^timing-[0-9]+$":
92 minimum: 0
155 minimum: 0
355 reg = <0x70019000 0x1000>;
368 reg = <0x7001b000 0x1000>;
376 #interconnect-cells = <0>;
378 emc-timings-0 {
381 timing-0 {
[all …]
/Linux-v6.1/lib/crypto/
Ddes.c31 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14,
32 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54,
33 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16,
34 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56,
35 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c,
36 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c,
37 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e,
38 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e,
39 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34,
40 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74,
[all …]
/Linux-v6.1/tools/testing/selftests/kvm/include/x86_64/
Dvmx.h20 #define CPU_BASED_INTR_WINDOW_EXITING 0x00000004
21 #define CPU_BASED_USE_TSC_OFFSETTING 0x00000008
22 #define CPU_BASED_HLT_EXITING 0x00000080
23 #define CPU_BASED_INVLPG_EXITING 0x00000200
24 #define CPU_BASED_MWAIT_EXITING 0x00000400
25 #define CPU_BASED_RDPMC_EXITING 0x00000800
26 #define CPU_BASED_RDTSC_EXITING 0x00001000
27 #define CPU_BASED_CR3_LOAD_EXITING 0x00008000
28 #define CPU_BASED_CR3_STORE_EXITING 0x00010000
29 #define CPU_BASED_CR8_LOAD_EXITING 0x00080000
[all …]
/Linux-v6.1/arch/x86/include/asm/
Dvmx.h20 #define VMCS_CONTROL_BIT(x) BIT(VMX_FEATURE_##x & 0x1f)
48 #define CPU_BASED_ALWAYSON_WITHOUT_TRUE_MSR 0x0401e172
91 #define PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR 0x00000016
93 #define VM_EXIT_SAVE_DEBUG_CONTROLS 0x00000004
94 #define VM_EXIT_HOST_ADDR_SPACE_SIZE 0x00000200
95 #define VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL 0x00001000
96 #define VM_EXIT_ACK_INTR_ON_EXIT 0x00008000
97 #define VM_EXIT_SAVE_IA32_PAT 0x00040000
98 #define VM_EXIT_LOAD_IA32_PAT 0x00080000
99 #define VM_EXIT_SAVE_IA32_EFER 0x00100000
[all …]
/Linux-v6.1/drivers/video/fbdev/riva/
Driva_tbl.h55 {0x00000050, 0x00000000},
56 {0x00000080, 0xFFFF00FF},
57 {0x00000080, 0xFFFFFFFF}
61 {0x00000080, 0x00000008},
62 {0x00000084, 0x00000003},
63 {0x00000050, 0x00000000},
64 {0x00000040, 0xFFFFFFFF}
68 {0x00000000, 0x80000000},
69 {0x00000800, 0x80000001},
70 {0x00001000, 0x80000002},
[all …]
/Linux-v6.1/drivers/net/wireless/ath/ath10k/
Dhw.h23 #define QCA988X_2_0_DEVICE_ID_UBNT (0x11ac)
24 #define QCA988X_2_0_DEVICE_ID (0x003c)
25 #define QCA6164_2_1_DEVICE_ID (0x0041)
26 #define QCA6174_2_1_DEVICE_ID (0x003e)
27 #define QCA6174_3_2_DEVICE_ID (0x0042)
28 #define QCA99X0_2_0_DEVICE_ID (0x0040)
29 #define QCA9888_2_0_DEVICE_ID (0x0056)
30 #define QCA9984_1_0_DEVICE_ID (0x0046)
31 #define QCA9377_1_0_DEVICE_ID (0x0042)
32 #define QCA9887_1_0_DEVICE_ID (0x0050)
[all …]
/Linux-v6.1/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dnv50.c35 return nvkm_rd32(gr->engine.subdev.device, 0x1540); in nv50_gr_units()
48 if (ret == 0) { in nv50_gr_object_bind()
50 nvkm_wo32(*pgpuobj, 0x00, object->oclass); in nv50_gr_object_bind()
51 nvkm_wo32(*pgpuobj, 0x04, 0x00000000); in nv50_gr_object_bind()
52 nvkm_wo32(*pgpuobj, 0x08, 0x00000000); in nv50_gr_object_bind()
53 nvkm_wo32(*pgpuobj, 0x0c, 0x00000000); in nv50_gr_object_bind()
75 if (ret == 0) { in nv50_gr_chan_bind()
100 return 0; in nv50_gr_chan_new()
108 { 0x01, "STACK_UNDERFLOW" },
109 { 0x02, "STACK_MISMATCH" },
[all …]
/Linux-v6.1/drivers/gpu/drm/msm/adreno/
Da5xx.xml.h100 TILE5_LINEAR = 0,
261 DEPTH5_NONE = 0,
268 BLIT_MRT0 = 0,
281 PERF_CP_ALWAYS_COUNT = 0,
315 PERF_RBBM_ALWAYS_COUNT = 0,
332 PERF_PC_BUSY_CYCLES = 0,
372 PERF_VFD_BUSY_CYCLES = 0,
406 PERF_HLSQ_BUSY_CYCLES = 0,
424 PERF_VPC_BUSY_CYCLES = 0,
444 PERF_TSE_BUSY_CYCLES = 0,
[all …]
Da6xx.xml.h52 TILE6_LINEAR = 0,
194 DEPTH6_NONE = 0,
293 PERF_CP_ALWAYS_COUNT = 0,
346 PERF_RBBM_ALWAYS_COUNT = 0,
363 PERF_PC_BUSY_CYCLES = 0,
408 PERF_VFD_BUSY_CYCLES = 0,
434 PERF_HLSQ_BUSY_CYCLES = 0,
458 PERF_VPC_BUSY_CYCLES = 0,
489 PERF_TSE_BUSY_CYCLES = 0,
512 PERF_RAS_BUSY_CYCLES = 0,
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dpp_overdriver.c28 …{ 0x0213EA94DE0E4964, 0x00003C96, 0xFFFFE226, 0x00000656, 0x00002203, 0xFFFFF201, 0x000003FF, 0x00…
29 …{ 0x0213EA94DE0A1884, 0x00003CC5, 0xFFFFE23A, 0x0000064E, 0x00002258, 0xFFFFF1F7, 0x000003FC, 0x00…
30 …{ 0x0213EA94DE0E31A4, 0x00003CAF, 0xFFFFE36E, 0x00000602, 0x00001E98, 0xFFFFF569, 0x00000357, 0x00…
31 …{ 0x0213EA94DE2C1144, 0x0000391A, 0xFFFFE548, 0x000005C9, 0x00001B98, 0xFFFFF707, 0x00000324, 0x00…
32 …{ 0x0213EA94DE2C18C4, 0x00003821, 0xFFFFE674, 0x00000597, 0x00002196, 0xFFFFF361, 0x000003C0, 0x00…
33 …{ 0x0213EA94DE263884, 0x000044A2, 0xFFFFDCB7, 0x00000738, 0x0000325C, 0xFFFFE6A7, 0x000005E6, 0x00…
34 …{ 0x0213EA94DE082924, 0x00004057, 0xFFFFE1CF, 0x0000063C, 0x00002E2E, 0xFFFFEB62, 0x000004FD, 0x00…
35 …{ 0x0213EA94DE284924, 0x00003FD0, 0xFFFFDF0F, 0x000006E5, 0x0000267C, 0xFFFFEE2D, 0x000004AB, 0x00…
36 …{ 0x0213EA94DE280904, 0x00003F13, 0xFFFFE010, 0x000006AD, 0x000020E7, 0xFFFFF266, 0x000003EC, 0x00…
37 …{ 0x0213EA94DE082044, 0x00004088, 0xFFFFDFAB, 0x000006B6, 0x0000252B, 0xFFFFEFDB, 0x00000458, 0x00…
[all …]
/Linux-v6.1/drivers/media/i2c/cx25840/
Dcx25840-core.c45 #define CX25840_VID_INT_STAT_REG 0x410
46 #define CX25840_VID_INT_STAT_BITS 0x0000ffff
47 #define CX25840_VID_INT_MASK_BITS 0xffff0000
49 #define CX25840_VID_INT_MASK_REG 0x412
51 #define CX23885_AUD_MC_INT_MASK_REG 0x80c
52 #define CX23885_AUD_MC_INT_STAT_BITS 0xffff0000
53 #define CX23885_AUD_MC_INT_CTRL_BITS 0x0000ffff
56 #define CX25840_AUD_INT_CTRL_REG 0x812
57 #define CX25840_AUD_INT_STAT_REG 0x813
59 #define CX23885_PIN_CTRL_IRQ_REG 0x123
[all …]