/Linux-v6.6/drivers/gpu/drm/msm/hdmi/ |
D | hdmi.xml.h | 57 HDCP_KEYS_STATE_NO_KEYS = 0, 68 DDC_WRITE = 0, 73 ACR_NONE = 0, 79 #define REG_HDMI_CTRL 0x00000000 80 #define HDMI_CTRL_ENABLE 0x00000001 81 #define HDMI_CTRL_HDMI 0x00000002 82 #define HDMI_CTRL_ENCRYPTED 0x00000004 84 #define REG_HDMI_AUDIO_PKT_CTRL1 0x00000020 85 #define HDMI_AUDIO_PKT_CTRL1_AUDIO_SAMPLE_SEND 0x00000001 87 #define REG_HDMI_ACR_PKT_CTRL 0x00000024 [all …]
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/Linux-v6.6/drivers/media/platform/rockchip/rkisp1/ |
D | rkisp1-regs.h | 12 #define RKISP1_CIF_ISP_CTRL_ISP_ENABLE BIT(0) 13 #define RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT (0 << 1) 32 #define RKISP1_CIF_ISP_ACQ_PROP_POS_EDGE BIT(0) 35 #define RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT_RGGB (0 << 3) 40 #define RKISP1_CIF_ISP_ACQ_PROP_YCBYCR (0 << 7) 44 #define RKISP1_CIF_ISP_ACQ_PROP_FIELD_SEL_ALL (0 << 9) 47 #define RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_12B (0 << 12) 54 #define RKISP1_CIF_VI_DPCL_DMA_JPEG (0 << 0) 55 #define RKISP1_CIF_VI_DPCL_MP_MUX_MRSZ_MI (1 << 0) 56 #define RKISP1_CIF_VI_DPCL_MP_MUX_MRSZ_JPEG (2 << 0) [all …]
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/Linux-v6.6/arch/powerpc/platforms/83xx/ |
D | mpc83xx.h | 8 #define MPC83XX_SCCR_OFFS 0xA08 9 #define MPC83XX_SCCR_USB_MASK 0x00f00000 10 #define MPC83XX_SCCR_USB_MPHCM_11 0x00c00000 11 #define MPC83XX_SCCR_USB_MPHCM_01 0x00400000 12 #define MPC83XX_SCCR_USB_MPHCM_10 0x00800000 13 #define MPC83XX_SCCR_USB_DRCM_11 0x00300000 14 #define MPC83XX_SCCR_USB_DRCM_01 0x00100000 15 #define MPC83XX_SCCR_USB_DRCM_10 0x00200000 16 #define MPC8315_SCCR_USB_MASK 0x00c00000 17 #define MPC8315_SCCR_USB_DRCM_11 0x00c00000 [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/thermal/ |
D | qoriq-thermal.yaml | 16 Register (IPBRR0) at offset 0x0BF8. 20 0x01900102 T1040 78 reg = <0xf0000 0x1000>; 79 interrupts = <18 2 0 0>; 80 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>; 81 fsl,tmu-calibration = <0x00000000 0x00000025>, 82 <0x00000001 0x00000028>, 83 <0x00000002 0x0000002d>, 84 <0x00000003 0x00000031>, 85 <0x00000004 0x00000036>, [all …]
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/Linux-v6.6/drivers/gpu/drm/nouveau/include/nvhw/class/ |
D | clc57d.h | 27 #define NVC57D_SET_CONTEXT_DMA_NOTIFIER (0x00000208) 28 #define NVC57D_SET_CONTEXT_DMA_NOTIFIER_HANDLE 31:0 30 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(a) (0x00001004 + (a)*0… 31 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 32 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) 33 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) 35 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) 36 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) 38 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) 39 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) [all …]
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D | clc37d.h | 27 #define NV_DISP_NOTIFIER 0x00000000 28 #define NV_DISP_NOTIFIER_SIZEOF 0x00000010 29 #define NV_DISP_NOTIFIER__0 0x00000000 30 #define NV_DISP_NOTIFIER__0_PRESENT_COUNT 7:0 33 #define NV_DISP_NOTIFIER__0_FLIP_TYPE_NON_TEARING 0x00000000 34 #define NV_DISP_NOTIFIER__0_FLIP_TYPE_IMMEDIATE 0x00000001 39 #define NV_DISP_NOTIFIER__0_STATUS_NOT_BEGUN 0x00000000 40 #define NV_DISP_NOTIFIER__0_STATUS_BEGUN 0x00000001 41 #define NV_DISP_NOTIFIER__0_STATUS_FINISHED 0x00000002 42 #define NV_DISP_NOTIFIER__1 0x00000001 [all …]
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D | cl507d.h | 27 #define NV_DISP_CORE_NOTIFIER_1 0x00000000 28 #define NV_DISP_CORE_NOTIFIER_1_SIZEOF 0x00000054 29 #define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0 0x00000000 30 #define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0_DONE 0:0 31 #define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0_DONE_FALSE 0x00000000 32 #define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0_DONE_TRUE 0x00000001 35 #define NV_DISP_CORE_NOTIFIER_1_CAPABILITIES_1 0x00000001 36 #define NV_DISP_CORE_NOTIFIER_1_CAPABILITIES_1_DONE 0:0 37 #define NV_DISP_CORE_NOTIFIER_1_CAPABILITIES_1_DONE_FALSE 0x00000000 38 #define NV_DISP_CORE_NOTIFIER_1_CAPABILITIES_1_DONE_TRUE 0x00000001 [all …]
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/Linux-v6.6/drivers/crypto/amcc/ |
D | crypto4xx_reg_def.h | 15 #define CRYPTO4XX_DESCRIPTOR 0x00000000 16 #define CRYPTO4XX_CTRL_STAT 0x00000000 17 #define CRYPTO4XX_SOURCE 0x00000004 18 #define CRYPTO4XX_DEST 0x00000008 19 #define CRYPTO4XX_SA 0x0000000C 20 #define CRYPTO4XX_SA_LENGTH 0x00000010 21 #define CRYPTO4XX_LENGTH 0x00000014 23 #define CRYPTO4XX_PE_DMA_CFG 0x00000040 24 #define CRYPTO4XX_PE_DMA_STAT 0x00000044 25 #define CRYPTO4XX_PDR_BASE 0x00000048 [all …]
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/Linux-v6.6/drivers/net/wireless/realtek/rtl8xxxu/ |
D | rtl8xxxu_8192c.c | 37 .reg_0e00 = 0x07090c0c, 38 .reg_0e04 = 0x01020405, 39 .reg_0e08 = 0x00000000, 40 .reg_086c = 0x00000000, 42 .reg_0e10 = 0x0b0c0c0e, 43 .reg_0e14 = 0x01030506, 44 .reg_0e18 = 0x0b0c0d0e, 45 .reg_0e1c = 0x01030509, 47 .reg_0830 = 0x07090c0c, 48 .reg_0834 = 0x01020405, [all …]
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/Linux-v6.6/drivers/gpu/drm/msm/dsi/ |
D | dsi_phy_10nm.xml.h | 56 #define REG_DSI_10nm_PHY_CMN_REVISION_ID0 0x00000000 58 #define REG_DSI_10nm_PHY_CMN_REVISION_ID1 0x00000004 60 #define REG_DSI_10nm_PHY_CMN_REVISION_ID2 0x00000008 62 #define REG_DSI_10nm_PHY_CMN_REVISION_ID3 0x0000000c 64 #define REG_DSI_10nm_PHY_CMN_CLK_CFG0 0x00000010 66 #define REG_DSI_10nm_PHY_CMN_CLK_CFG1 0x00000014 68 #define REG_DSI_10nm_PHY_CMN_GLBL_CTRL 0x00000018 70 #define REG_DSI_10nm_PHY_CMN_RBUF_CTRL 0x0000001c 72 #define REG_DSI_10nm_PHY_CMN_VREG_CTRL 0x00000020 74 #define REG_DSI_10nm_PHY_CMN_CTRL_0 0x00000024 [all …]
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D | dsi_phy_7nm.xml.h | 56 #define REG_DSI_7nm_PHY_CMN_REVISION_ID0 0x00000000 58 #define REG_DSI_7nm_PHY_CMN_REVISION_ID1 0x00000004 60 #define REG_DSI_7nm_PHY_CMN_REVISION_ID2 0x00000008 62 #define REG_DSI_7nm_PHY_CMN_REVISION_ID3 0x0000000c 64 #define REG_DSI_7nm_PHY_CMN_CLK_CFG0 0x00000010 66 #define REG_DSI_7nm_PHY_CMN_CLK_CFG1 0x00000014 68 #define REG_DSI_7nm_PHY_CMN_GLBL_CTRL 0x00000018 70 #define REG_DSI_7nm_PHY_CMN_RBUF_CTRL 0x0000001c 72 #define REG_DSI_7nm_PHY_CMN_VREG_CTRL_0 0x00000020 74 #define REG_DSI_7nm_PHY_CMN_CTRL_0 0x00000024 [all …]
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D | dsi_phy_28nm.xml.h | 56 static inline uint32_t REG_DSI_28nm_PHY_LN(uint32_t i0) { return 0x00000000 + 0x40*i0; } in REG_DSI_28nm_PHY_LN() 58 static inline uint32_t REG_DSI_28nm_PHY_LN_CFG_0(uint32_t i0) { return 0x00000000 + 0x40*i0; } in REG_DSI_28nm_PHY_LN_CFG_0() 60 static inline uint32_t REG_DSI_28nm_PHY_LN_CFG_1(uint32_t i0) { return 0x00000004 + 0x40*i0; } in REG_DSI_28nm_PHY_LN_CFG_1() 62 static inline uint32_t REG_DSI_28nm_PHY_LN_CFG_2(uint32_t i0) { return 0x00000008 + 0x40*i0; } in REG_DSI_28nm_PHY_LN_CFG_2() 64 static inline uint32_t REG_DSI_28nm_PHY_LN_CFG_3(uint32_t i0) { return 0x0000000c + 0x40*i0; } in REG_DSI_28nm_PHY_LN_CFG_3() 66 static inline uint32_t REG_DSI_28nm_PHY_LN_CFG_4(uint32_t i0) { return 0x00000010 + 0x40*i0; } in REG_DSI_28nm_PHY_LN_CFG_4() 68 static inline uint32_t REG_DSI_28nm_PHY_LN_TEST_DATAPATH(uint32_t i0) { return 0x00000014 + 0x40*i0… in REG_DSI_28nm_PHY_LN_TEST_DATAPATH() 70 static inline uint32_t REG_DSI_28nm_PHY_LN_DEBUG_SEL(uint32_t i0) { return 0x00000018 + 0x40*i0; } in REG_DSI_28nm_PHY_LN_DEBUG_SEL() 72 static inline uint32_t REG_DSI_28nm_PHY_LN_TEST_STR_0(uint32_t i0) { return 0x0000001c + 0x40*i0; } in REG_DSI_28nm_PHY_LN_TEST_STR_0() 74 static inline uint32_t REG_DSI_28nm_PHY_LN_TEST_STR_1(uint32_t i0) { return 0x00000020 + 0x40*i0; } in REG_DSI_28nm_PHY_LN_TEST_STR_1() [all …]
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/Linux-v6.6/drivers/net/ethernet/toshiba/ |
D | spider_net.h | 56 #define SPIDER_NET_GHIINT0STS 0x00000000 57 #define SPIDER_NET_GHIINT1STS 0x00000004 58 #define SPIDER_NET_GHIINT2STS 0x00000008 59 #define SPIDER_NET_GHIINT0MSK 0x00000010 60 #define SPIDER_NET_GHIINT1MSK 0x00000014 61 #define SPIDER_NET_GHIINT2MSK 0x00000018 63 #define SPIDER_NET_GRESUMINTNUM 0x00000020 64 #define SPIDER_NET_GREINTNUM 0x00000024 66 #define SPIDER_NET_GFFRMNUM 0x00000028 67 #define SPIDER_NET_GFAFRMNUM 0x0000002c [all …]
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/Linux-v6.6/drivers/gpu/drm/msm/dp/ |
D | dp_reg.h | 10 #define REG_DP_HW_VERSION (0x00000000) 12 #define REG_DP_SW_RESET (0x00000010) 13 #define DP_SW_RESET (0x00000001) 15 #define REG_DP_PHY_CTRL (0x00000014) 16 #define DP_PHY_CTRL_SW_RESET_PLL (0x00000001) 17 #define DP_PHY_CTRL_SW_RESET (0x00000004) 19 #define REG_DP_CLK_CTRL (0x00000018) 20 #define REG_DP_CLK_ACTIVE (0x0000001C) 21 #define REG_DP_INTR_STATUS (0x00000020) 22 #define REG_DP_INTR_STATUS2 (0x00000024) [all …]
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/Linux-v6.6/drivers/gpu/drm/mcde/ |
D | mcde_dsi_regs.h | 5 #define DSI_MCTL_INTEGRATION_MODE 0x00000000 7 #define DSI_MCTL_MAIN_DATA_CTL 0x00000004 8 #define DSI_MCTL_MAIN_DATA_CTL_LINK_EN BIT(0) 25 #define DSI_MCTL_MAIN_PHY_CTL 0x00000008 26 #define DSI_MCTL_MAIN_PHY_CTL_LANE2_EN BIT(0) 33 #define DSI_MCTL_MAIN_PHY_CTL_WAIT_BURST_TIME_MASK 0x000003C0 36 #define DSI_MCTL_PLL_CTL 0x0000000C 37 #define DSI_MCTL_LANE_STS 0x00000010 39 #define DSI_MCTL_DPHY_TIMEOUT 0x00000014 40 #define DSI_MCTL_DPHY_TIMEOUT_CLK_DIV_SHIFT 0 [all …]
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/Linux-v6.6/arch/arm64/boot/dts/marvell/ |
D | ac5-98dx25xx.dtsi | 21 #size-cells = <0>; 34 cpu0: cpu@0 { 37 reg = <0x0 0x0>; 45 reg = <0x0 0x100>; 86 /* 16M internal register @ 0x7f00_0000 */ 87 ranges = <0x0 0x0 0x7f000000 0x1000000>; 92 reg = <0x12000 0x100>; 102 reg = <0x12100 0x100>; 112 reg = <0x12200 0x100>; 122 reg = <0x12300 0x100>; [all …]
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/Linux-v6.6/drivers/net/wireless/realtek/rtw89/ |
D | rtw8852a_table.c | 10 {0xF0FF0001, 0x00000000}, 11 {0xF03300FF, 0x00000001}, 12 {0xF03500FF, 0x00000002}, 13 {0xF03200FF, 0x00000003}, 14 {0xF03400FF, 0x00000004}, 15 {0xF03600FF, 0x00000005}, 16 {0x704, 0x601E0100}, 17 {0x714, 0x00000000}, 18 {0x718, 0x13332333}, 19 {0x714, 0x00010000}, [all …]
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/Linux-v6.6/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/ |
D | gt215.fuc3.h | 3 /* 0x0000: ctx_object */ 4 0x00000000, 5 /* 0x0004: ctx_dma */ 6 /* 0x0004: ctx_dma_query */ 7 0x00000000, 8 /* 0x0008: ctx_dma_src */ 9 0x00000000, 10 /* 0x000c: ctx_dma_dst */ 11 0x00000000, 12 /* 0x0010: ctx_query_address_high */ [all …]
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D | gf100.fuc3.h | 3 /* 0x0000: ctx_object */ 4 0x00000000, 5 /* 0x0004: ctx_query_address_high */ 6 0x00000000, 7 /* 0x0008: ctx_query_address_low */ 8 0x00000000, 9 /* 0x000c: ctx_query_counter */ 10 0x00000000, 11 /* 0x0010: ctx_src_address_high */ 12 0x00000000, [all …]
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/Linux-v6.6/drivers/net/wireless/ath/ath6kl/ |
D | target.h | 26 #define AR6004_BOARD_EXT_DATA_SZ 0 28 #define RESET_CONTROL_ADDRESS 0x00004000 29 #define RESET_CONTROL_COLD_RST 0x00000100 30 #define RESET_CONTROL_MBOX_RST 0x00000004 32 #define CPU_CLOCK_STANDARD_S 0 33 #define CPU_CLOCK_STANDARD 0x00000003 34 #define CPU_CLOCK_ADDRESS 0x00000020 36 #define CLOCK_CONTROL_ADDRESS 0x00000028 38 #define CLOCK_CONTROL_LF_CLK32 0x00000004 40 #define SYSTEM_SLEEP_ADDRESS 0x000000c4 [all …]
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/Linux-v6.6/arch/m68k/include/asm/ |
D | m528xsim.h | 24 #define MCFICM_INTC0 (MCF_IPSBAR + 0x0c00) /* Base for Interrupt Ctrl 0 */ 25 #define MCFICM_INTC1 (MCF_IPSBAR + 0x0d00) /* Base for Interrupt Ctrl 0 */ 27 #define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */ 28 #define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */ 29 #define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */ 30 #define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */ 31 #define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */ 32 #define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */ 33 #define MCFINTC_IRLR 0x18 /* */ 34 #define MCFINTC_IACKL 0x19 /* */ [all …]
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/Linux-v6.6/drivers/net/wireless/ath/ath12k/ |
D | hw.c | 32 return 0; in ath12k_hw_mac_id_to_srng_id_qcn9274() 51 return 0; in ath12k_hw_mac_id_to_pdev_id_wcn7850() 67 if (ring_num == 0 || ring_num == 2 || ring_num == 4) in ath12k_dp_srng_is_comp_ring_wcn7850() 91 #define ATH12K_TX_RING_MASK_0 0x1 92 #define ATH12K_TX_RING_MASK_1 0x2 93 #define ATH12K_TX_RING_MASK_2 0x4 94 #define ATH12K_TX_RING_MASK_3 0x8 95 #define ATH12K_TX_RING_MASK_4 0x10 97 #define ATH12K_RX_RING_MASK_0 0x1 98 #define ATH12K_RX_RING_MASK_1 0x2 [all …]
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/Linux-v6.6/arch/arm64/boot/dts/freescale/ |
D | fsl-ls1088a.dtsi | 27 #size-cells = <0>; 30 cpu0: cpu@0 { 33 reg = <0x0>; 34 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 42 reg = <0x1>; 43 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 51 reg = <0x2>; 52 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 60 reg = <0x3>; 61 clocks = <&clockgen QORIQ_CLK_CMUX 0>; [all …]
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/Linux-v6.6/arch/arm/boot/dts/nxp/ls/ |
D | ls1021a.dtsi | 31 #size-cells = <0>; 36 reg = <0xf00>; 37 clocks = <&clockgen 1 0>; 44 reg = <0xf01>; 45 clocks = <&clockgen 1 0>; 50 memory@0 { 52 reg = <0x0 0x0 0x0 0x0>; 57 #clock-cells = <0>; 80 offset = <0xb0>; 81 mask = <0x02>; [all …]
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/Linux-v6.6/drivers/gpu/drm/amd/include/ |
D | navi10_enum.h | 51 GDS_PERF_SEL_DS_ADDR_CONFL = 0, 184 GATCL1_TYPE_NORMAL = 0x00000000, 185 GATCL1_TYPE_SHOOTDOWN = 0x00000001, 186 GATCL1_TYPE_BYPASS = 0x00000002, 194 UTCL1_TYPE_NORMAL = 0x00000000, 195 UTCL1_TYPE_SHOOTDOWN = 0x00000001, 196 UTCL1_TYPE_BYPASS = 0x00000002, 204 UTCL1_XNACK_SUCCESS = 0x00000000, 205 UTCL1_XNACK_RETRY = 0x00000001, 206 UTCL1_XNACK_PRT = 0x00000002, [all …]
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