/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gca/ |
D | gfx_6_0_sh_mask.h | 26 #define BCI_DEBUG_READ__DATA_MASK 0x00ffffffL 27 #define BCI_DEBUG_READ__DATA__SHIFT 0x00000000 28 #define CB_BLEND0_CONTROL__ALPHA_COMB_FCN_MASK 0x00e00000L 29 #define CB_BLEND0_CONTROL__ALPHA_COMB_FCN__SHIFT 0x00000015 30 #define CB_BLEND0_CONTROL__ALPHA_DESTBLEND_MASK 0x1f000000L 31 #define CB_BLEND0_CONTROL__ALPHA_DESTBLEND__SHIFT 0x00000018 32 #define CB_BLEND0_CONTROL__ALPHA_SRCBLEND_MASK 0x001f0000L 33 #define CB_BLEND0_CONTROL__ALPHA_SRCBLEND__SHIFT 0x00000010 34 #define CB_BLEND0_CONTROL__COLOR_COMB_FCN_MASK 0x000000e0L 35 #define CB_BLEND0_CONTROL__COLOR_COMB_FCN__SHIFT 0x00000005 [all …]
|
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/bif/ |
D | bif_3_0_sh_mask.h | 26 #define BACO_CNTL__BACO_ANA_ISO_DIS_MASK 0x00000080L 27 #define BACO_CNTL__BACO_ANA_ISO_DIS__SHIFT 0x00000007 28 #define BACO_CNTL__BACO_BCLK_OFF_MASK 0x00000002L 29 #define BACO_CNTL__BACO_BCLK_OFF__SHIFT 0x00000001 30 #define BACO_CNTL__BACO_EN_MASK 0x00000001L 31 #define BACO_CNTL__BACO_EN__SHIFT 0x00000000 32 #define BACO_CNTL__BACO_HANG_PROTECTION_EN_MASK 0x00000020L 33 #define BACO_CNTL__BACO_HANG_PROTECTION_EN__SHIFT 0x00000005 34 #define BACO_CNTL__BACO_ISO_DIS_MASK 0x00000004L 35 #define BACO_CNTL__BACO_ISO_DIS__SHIFT 0x00000002 [all …]
|
/Linux-v6.6/arch/arm/boot/dts/nvidia/ |
D | tegra30-asus-tf201.dts | 67 reg = <0x4d>; 82 mount-matrix = "-1", "0", "0", 83 "0", "-1", "0", 84 "0", "0", "-1"; 88 mount-matrix = "0", "-1", "0", 89 "-1", "0", "0", 90 "0", "0", "-1"; 95 mount-matrix = "1", "0", "0", 96 "0", "-1", "0", 97 "0", "0", "1"; [all …]
|
D | tegra30-pegatron-chagall.dts | 49 reg = <0x80000000 0x40000000>; 59 alloc-ranges = <0x80000000 0x30000000>; 60 size = <0x10000000>; /* 256MiB */ 67 reg = <0xbeb00000 0x10000>; /* 64kB */ 68 console-size = <0x8000>; /* 32kB */ 69 record-size = <0x400>; /* 1kB */ 74 reg = <0xbfe00000 0x200000>; /* 2MB */ 100 pinctrl-0 = <&state_default>; 144 nvidia,lock = <0>; 145 nvidia,io-reset = <0>; [all …]
|
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gmc/ |
D | gmc_6_0_sh_mask.h | 26 #define ATC_ATS_CNTL__CREDITS_ATS_RPB_MASK 0x00003f00L 27 #define ATC_ATS_CNTL__CREDITS_ATS_RPB__SHIFT 0x00000008 28 #define ATC_ATS_CNTL__DEBUG_ECO_MASK 0x000f0000L 29 #define ATC_ATS_CNTL__DEBUG_ECO__SHIFT 0x00000010 30 #define ATC_ATS_CNTL__DISABLE_ATC_MASK 0x00000001L 31 #define ATC_ATS_CNTL__DISABLE_ATC__SHIFT 0x00000000 32 #define ATC_ATS_CNTL__DISABLE_PASID_MASK 0x00000004L 33 #define ATC_ATS_CNTL__DISABLE_PASID__SHIFT 0x00000002 34 #define ATC_ATS_CNTL__DISABLE_PRI_MASK 0x00000002L 35 #define ATC_ATS_CNTL__DISABLE_PRI__SHIFT 0x00000001 [all …]
|
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dce/ |
D | dce_6_0_sh_mask.h | 26 #define ABM_TEST_DEBUG_DATA__ABM_TEST_DEBUG_DATA_MASK 0xffffffffL 27 #define ABM_TEST_DEBUG_DATA__ABM_TEST_DEBUG_DATA__SHIFT 0x00000000 28 #define ABM_TEST_DEBUG_INDEX__ABM_TEST_DEBUG_INDEX_MASK 0x000000ffL 29 #define ABM_TEST_DEBUG_INDEX__ABM_TEST_DEBUG_INDEX__SHIFT 0x00000000 30 #define ABM_TEST_DEBUG_INDEX__ABM_TEST_DEBUG_WRITE_EN_MASK 0x00000100L 31 #define ABM_TEST_DEBUG_INDEX__ABM_TEST_DEBUG_WRITE_EN__SHIFT 0x00000008 32 #define AFMT_60958_0__AFMT_60958_CS_A_MASK 0x00000001L 33 #define AFMT_60958_0__AFMT_60958_CS_A__SHIFT 0x00000000 34 #define AFMT_60958_0__AFMT_60958_CS_B_MASK 0x00000002L 35 #define AFMT_60958_0__AFMT_60958_CS_B__SHIFT 0x00000001 [all …]
|
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/oss/ |
D | oss_1_0_sh_mask.h | 26 #define CC_DRM_ID_STRAPS__ATI_REV_ID_MASK 0xf0000000L 27 #define CC_DRM_ID_STRAPS__ATI_REV_ID__SHIFT 0x0000001c 28 #define CC_DRM_ID_STRAPS__DEVICE_ID_MASK 0x000ffff0L 29 #define CC_DRM_ID_STRAPS__DEVICE_ID__SHIFT 0x00000004 30 #define CC_DRM_ID_STRAPS__MAJOR_REV_ID_MASK 0x00f00000L 31 #define CC_DRM_ID_STRAPS__MAJOR_REV_ID__SHIFT 0x00000014 32 #define CC_DRM_ID_STRAPS__MINOR_REV_ID_MASK 0x0f000000L 33 #define CC_DRM_ID_STRAPS__MINOR_REV_ID__SHIFT 0x00000018 34 #define CC_SYS_RB_BACKEND_DISABLE__BACKEND_DISABLE_MASK 0x00ff0000L 35 #define CC_SYS_RB_BACKEND_DISABLE__BACKEND_DISABLE__SHIFT 0x00000010 [all …]
|
/Linux-v6.6/Documentation/devicetree/bindings/thermal/ |
D | qoriq-thermal.yaml | 16 Register (IPBRR0) at offset 0x0BF8. 20 0x01900102 T1040 78 reg = <0xf0000 0x1000>; 79 interrupts = <18 2 0 0>; 80 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>; 81 fsl,tmu-calibration = <0x00000000 0x00000025>, 82 <0x00000001 0x00000028>, 83 <0x00000002 0x0000002d>, 84 <0x00000003 0x00000031>, 85 <0x00000004 0x00000036>, [all …]
|
/Linux-v6.6/arch/x86/include/asm/fpu/ |
D | xstate.h | 15 #define XSTATE_CPUID 0x0000000d 17 #define TILE_CPUID 0x0000001d
|
/Linux-v6.6/drivers/gpu/drm/nouveau/include/nvhw/class/ |
D | clc57d.h | 27 #define NVC57D_SET_CONTEXT_DMA_NOTIFIER (0x00000208) 28 #define NVC57D_SET_CONTEXT_DMA_NOTIFIER_HANDLE 31:0 30 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(a) (0x00001004 + (a)*0… 31 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP 0:0 32 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_FALSE (0x00000000) 33 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED1BPP_TRUE (0x00000001) 35 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_FALSE (0x00000000) 36 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED2BPP_TRUE (0x00000001) 38 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_FALSE (0x00000000) 39 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_RGB_PACKED4BPP_TRUE (0x00000001) [all …]
|
D | cl502d.h | 26 …_SET_OBJECT 0x0000 27 …_SET_OBJECT_POINTER 15:0 29 …_WAIT_FOR_IDLE 0x0110 30 …_WAIT_FOR_IDLE_V 31:0 32 …_SET_DST_CONTEXT_DMA 0x0184 33 …_SET_DST_CONTEXT_DMA_HANDLE 31:0 35 …_SET_SRC_CONTEXT_DMA 0x0188 36 …_SET_SRC_CONTEXT_DMA_HANDLE 31:0 38 …_SET_SEMAPHORE_CONTEXT_DMA 0x018c 39 …_SET_SEMAPHORE_CONTEXT_DMA_HANDLE 31:0 [all …]
|
D | cl902d.h | 26 …_SET_OBJECT 0x0000 27 …_SET_OBJECT_CLASS_ID 15:0 30 …_WAIT_FOR_IDLE 0x0110 31 …_WAIT_FOR_IDLE_V 31:0 33 …_SET_DST_FORMAT 0x0200 34 …_SET_DST_FORMAT_V 7:0 35 …_SET_DST_FORMAT_V_A8R8G8B8 0x000000CF 36 …_SET_DST_FORMAT_V_A8RL8GL8BL8 0x000000D0 37 …_SET_DST_FORMAT_V_A2R10G10B10 0x000000DF 38 …_SET_DST_FORMAT_V_A8B8G8R8 0x000000D5 [all …]
|
/Linux-v6.6/arch/powerpc/include/uapi/asm/ |
D | termbits.h | 48 #define VINTR 0 67 #define IXON 0x0200 68 #define IXOFF 0x0400 69 #define IUCLC 0x1000 70 #define IMAXBEL 0x2000 71 #define IUTF8 0x4000 74 #define ONLCR 0x00002 75 #define OLCUC 0x00004 76 #define NLDLY 0x00300 77 #define NL0 0x00000 [all …]
|
/Linux-v6.6/arch/alpha/include/uapi/asm/ |
D | termbits.h | 54 #define VEOF 0 73 #define IXON 0x0200 74 #define IXOFF 0x0400 75 #define IUCLC 0x1000 76 #define IMAXBEL 0x2000 77 #define IUTF8 0x4000 80 #define ONLCR 0x00002 81 #define OLCUC 0x00004 82 #define NLDLY 0x00300 83 #define NL0 0x00000 [all …]
|
/Linux-v6.6/drivers/gpu/drm/amd/include/ |
D | vega10_enum.h | 51 GDS_PERF_SEL_DS_ADDR_CONFL = 0, 184 NO_FORCE_REQUEST = 0x00000000, 185 FORCE_LIGHT_SLEEP_REQUEST = 0x00000001, 186 FORCE_DEEP_SLEEP_REQUEST = 0x00000002, 187 FORCE_SHUT_DOWN_REQUEST = 0x00000003, 195 NO_FORCE_REQ = 0x00000000, 196 FORCE_LIGHT_SLEEP_REQ = 0x00000001, 204 ENABLE_MEM_PWR_CTRL = 0x00000000, 205 DISABLE_MEM_PWR_CTRL = 0x00000001, 213 DYNAMIC_SHUT_DOWN_ENABLE = 0x00000000, [all …]
|
D | navi10_enum.h | 51 GDS_PERF_SEL_DS_ADDR_CONFL = 0, 184 GATCL1_TYPE_NORMAL = 0x00000000, 185 GATCL1_TYPE_SHOOTDOWN = 0x00000001, 186 GATCL1_TYPE_BYPASS = 0x00000002, 194 UTCL1_TYPE_NORMAL = 0x00000000, 195 UTCL1_TYPE_SHOOTDOWN = 0x00000001, 196 UTCL1_TYPE_BYPASS = 0x00000002, 204 UTCL1_XNACK_SUCCESS = 0x00000000, 205 UTCL1_XNACK_RETRY = 0x00000001, 206 UTCL1_XNACK_PRT = 0x00000002, [all …]
|
D | soc21_enum.h | 55 DSM_DATA_SEL_DISABLE = 0x00000000, 56 DSM_DATA_SEL_0 = 0x00000001, 57 DSM_DATA_SEL_1 = 0x00000002, 58 DSM_DATA_SEL_BOTH = 0x00000003, 66 DSM_ENABLE_ERROR_INJECT_FED_IN = 0x00000000, 67 DSM_ENABLE_ERROR_INJECT_SINGLE = 0x00000001, 68 DSM_ENABLE_ERROR_INJECT_UNCORRECTABLE = 0x00000002, 69 DSM_ENABLE_ERROR_INJECT_UNCORRECTABLE_LIMITED = 0x00000003, 77 DSM_SELECT_INJECT_DELAY_NO_DELAY = 0x00000000, 78 DSM_SELECT_INJECT_DELAY_DELAY_ERROR = 0x00000001, [all …]
|
/Linux-v6.6/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
D | ctxgk110b.c | 32 { 0x419e04, 1, 0x04, 0x00000000 }, 33 { 0x419e08, 1, 0x04, 0x0000001d }, 34 { 0x419e0c, 1, 0x04, 0x00000000 }, 35 { 0x419e10, 1, 0x04, 0x00001c02 }, 36 { 0x419e44, 1, 0x04, 0x0013eff2 }, 37 { 0x419e48, 1, 0x04, 0x00000000 }, 38 { 0x419e4c, 1, 0x04, 0x0000007f }, 39 { 0x419e50, 2, 0x04, 0x00000000 }, 40 { 0x419e58, 1, 0x04, 0x00000001 }, 41 { 0x419e5c, 3, 0x04, 0x00000000 }, [all …]
|
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/smu/ |
D | smu_6_0_sh_mask.h | 26 #define CG_SPLL_FUNC_CNTL_3__SPLL_FB_DIV_MASK 0x03ffffffL 27 #define CG_SPLL_FUNC_CNTL_3__SPLL_FB_DIV__SHIFT 0x00000000 28 #define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK 0x000003f0L 29 #define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV__SHIFT 0x00000004 30 #define GPIOPAD_A__GPIO_A_MASK 0x7fffffffL 31 #define GPIOPAD_A__GPIO_A__SHIFT 0x00000000 32 #define GPIOPAD_EN__GPIO_EN_MASK 0x7fffffffL 33 #define GPIOPAD_EN__GPIO_EN__SHIFT 0x00000000 34 #define GPIOPAD_EXTERN_TRIG_CNTL__EXTERN_TRIG_CLR_MASK 0x00000020L 35 #define GPIOPAD_EXTERN_TRIG_CNTL__EXTERN_TRIG_CLR__SHIFT 0x00000005 [all …]
|
/Linux-v6.6/include/uapi/linux/ |
D | lirc.h | 12 #define PULSE_BIT 0x01000000 13 #define PULSE_MASK 0x00FFFFFF 15 #define LIRC_MODE2_SPACE 0x00000000 16 #define LIRC_MODE2_PULSE 0x01000000 17 #define LIRC_MODE2_FREQUENCY 0x02000000 18 #define LIRC_MODE2_TIMEOUT 0x03000000 19 #define LIRC_MODE2_OVERFLOW 0x04000000 21 #define LIRC_VALUE_MASK 0x00FFFFFF 22 #define LIRC_MODE2_MASK 0xFF000000 49 #define LIRC_MODE_RAW 0x00000001 [all …]
|
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
D | uvd_4_0_sh_mask.h | 26 #define UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN_MASK 0x00000001L 27 #define UVD_CGC_CTRL2__DYN_OCLK_RAMP_EN__SHIFT 0x00000000 28 #define UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN_MASK 0x00000002L 29 #define UVD_CGC_CTRL2__DYN_RCLK_RAMP_EN__SHIFT 0x00000001 30 #define UVD_CGC_CTRL2__GATER_DIV_ID_MASK 0x0000001cL 31 #define UVD_CGC_CTRL2__GATER_DIV_ID__SHIFT 0x00000002 32 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER_MASK 0x0000003cL 33 #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x00000002 34 #define UVD_CGC_CTRL__CLK_OFF_DELAY_MASK 0x000007c0L 35 #define UVD_CGC_CTRL__CLK_OFF_DELAY__SHIFT 0x00000006 [all …]
|
/Linux-v6.6/sound/pci/ |
D | sis7019.h | 17 #define SIS_GCR 0x00 18 #define SIS_GCR_MACRO_POWER_DOWN 0x80000000 19 #define SIS_GCR_MODEM_ENABLE 0x00010000 20 #define SIS_GCR_SOFTWARE_RESET 0x00000001 23 #define SIS_GIER 0x04 24 #define SIS_GIER_MODEM_TIMER_IRQ_ENABLE 0x00100000 25 #define SIS_GIER_MODEM_RX_DMA_IRQ_ENABLE 0x00080000 26 #define SIS_GIER_MODEM_TX_DMA_IRQ_ENABLE 0x00040000 27 #define SIS_GIER_AC97_GPIO1_IRQ_ENABLE 0x00020000 28 #define SIS_GIER_AC97_GPIO0_IRQ_ENABLE 0x00010000 [all …]
|
/Linux-v6.6/drivers/net/wireless/realtek/rtw88/ |
D | rtw8822c_table.c | 16 0x83000000, 0x00000000, 0x40000000, 0x00000000, 17 0x1D90, 0x300001FF, 18 0x1D90, 0x300101FE, 19 0x1D90, 0x300201FD, 20 0x1D90, 0x300301FC, 21 0x1D90, 0x300401FB, 22 0x1D90, 0x300501FA, 23 0x1D90, 0x300601F9, 24 0x1D90, 0x300701F8, 25 0x1D90, 0x300801F7, [all …]
|
/Linux-v6.6/sound/ppc/ |
D | tumbler_volume.h | 4 /* 0 = -70 dB, 175 = 18.0 dB in 0.5 dB step */ 6 0x00000015, 0x00000016, 0x00000017, 7 0x00000019, 0x0000001a, 0x0000001c, 8 0x0000001d, 0x0000001f, 0x00000021, 9 0x00000023, 0x00000025, 0x00000027, 10 0x00000029, 0x0000002c, 0x0000002e, 11 0x00000031, 0x00000034, 0x00000037, 12 0x0000003a, 0x0000003e, 0x00000042, 13 0x00000045, 0x0000004a, 0x0000004e, 14 0x00000053, 0x00000057, 0x0000005d, [all …]
|
/Linux-v6.6/drivers/net/wireless/ath/carl9170/ |
D | phy.c | 48 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE_MAX, 0x7f); in carl9170_init_power_cal() 49 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE1, 0x3f3f3f3f); in carl9170_init_power_cal() 50 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE2, 0x3f3f3f3f); in carl9170_init_power_cal() 51 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE3, 0x3f3f3f3f); in carl9170_init_power_cal() 52 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE4, 0x3f3f3f3f); in carl9170_init_power_cal() 53 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE5, 0x3f3f3f3f); in carl9170_init_power_cal() 54 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE6, 0x3f3f3f3f); in carl9170_init_power_cal() 55 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE7, 0x3f3f3f3f); in carl9170_init_power_cal() 56 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE8, 0x3f3f3f3f); in carl9170_init_power_cal() 57 carl9170_regwrite(AR9170_PHY_REG_POWER_TX_RATE9, 0x3f3f3f3f); in carl9170_init_power_cal() [all …]
|