/Linux-v5.10/drivers/media/platform/ |
D | imx-pxp.h | 13 #define HW_PXP_CTRL (0x00000000) 14 #define HW_PXP_CTRL_SET (0x00000004) 15 #define HW_PXP_CTRL_CLR (0x00000008) 16 #define HW_PXP_CTRL_TOG (0x0000000c) 18 #define BM_PXP_CTRL_SFTRST 0x80000000 19 #define BF_PXP_CTRL_SFTRST(v) \ argument 20 (((v) << 31) & BM_PXP_CTRL_SFTRST) 21 #define BM_PXP_CTRL_CLKGATE 0x40000000 22 #define BF_PXP_CTRL_CLKGATE(v) \ argument 23 (((v) << 30) & BM_PXP_CTRL_CLKGATE) [all …]
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/Linux-v5.10/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
D | display_mode_vba_30.c | 64 #define BPP_INVALID 0 65 #define BPP_BLENDED_PIPE 0xffffffff 783 s = 0; in dscceComputeDelay() 795 if ((ix % w) == 0 && P != 0) in dscceComputeDelay() 798 lstall = 0; in dscceComputeDelay() 808 unsigned int Delay = 0; in dscComputeDelay() 814 Delay = Delay + 0; in dscComputeDelay() 859 Delay = Delay + 0; in dscComputeDelay() 946 unsigned int DPPCycles = 0, DISPCLKCycles = 0; in CalculatePrefetchSchedule() 947 double DSTTotalPixelsAfterScaler = 0; in CalculatePrefetchSchedule() [all …]
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/Linux-v5.10/sound/soc/qcom/ |
D | lpass-lpaif-reg.h | 11 #define LPAIF_I2SCTL_REG_ADDR(v, addr, port) \ argument 12 (v->i2sctrl_reg_base + (addr) + v->i2sctrl_reg_stride * (port)) 14 #define LPAIF_I2SCTL_REG(v, port) LPAIF_I2SCTL_REG_ADDR(v, 0x0, (port)) argument 16 #define LPAIF_I2SCTL_LOOPBACK_DISABLE 0 19 #define LPAIF_I2SCTL_SPKEN_DISABLE 0 22 #define LPAIF_I2SCTL_MODE_NONE 0 45 #define LPAIF_I2SCTL_SPKMONO_STEREO 0 48 #define LPAIF_I2SCTL_MICEN_DISABLE 0 53 #define LPAIF_I2SCTL_MICMONO_STEREO 0 56 #define LPAIF_I2SCTL_WSSRC_INTERNAL 0 [all …]
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/Linux-v5.10/drivers/pinctrl/mvebu/ |
D | pinctrl-kirkwood.c | 19 #define V(f6180, f6190, f6192, f6281, f6282, dx4122, dx1135) \ macro 20 ((f6180 << 0) | (f6190 << 1) | (f6192 << 2) | \ 25 VARIANT_MV88F6180 = V(1, 0, 0, 0, 0, 0, 0), 26 VARIANT_MV88F6190 = V(0, 1, 0, 0, 0, 0, 0), 27 VARIANT_MV88F6192 = V(0, 0, 1, 0, 0, 0, 0), 28 VARIANT_MV88F6281 = V(0, 0, 0, 1, 0, 0, 0), 29 VARIANT_MV88F6282 = V(0, 0, 0, 0, 1, 0, 0), 30 VARIANT_MV98DX4122 = V(0, 0, 0, 0, 0, 1, 0), 31 VARIANT_MV98DX1135 = V(0, 0, 0, 0, 0, 0, 1), 35 MPP_MODE(0, [all …]
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/Linux-v5.10/drivers/iio/adc/ |
D | stm32-dfsdm.h | 19 * | 0x000 | CHANNEL 0 + COMMON CHANNEL FIELDS | 21 * | 0x020 | CHANNEL 1 | 25 * | 0x0E0 | CHANNEL 7 | 27 * | 0x100 | FILTER 0 + COMMON FILTER FIELDs | 29 * | 0x200 | FILTER 1 | 31 * | 0x300 | FILTER 2 | 33 * | 0x400 | FILTER 3 | 40 #define DFSDM_CHCFGR1(y) ((y) * 0x20 + 0x00) 41 #define DFSDM_CHCFGR2(y) ((y) * 0x20 + 0x04) 42 #define DFSDM_AWSCDR(y) ((y) * 0x20 + 0x08) [all …]
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/Linux-v5.10/drivers/staging/media/hantro/ |
D | rk3399_vpu_hw_mpeg2_dec.c | 23 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument 25 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument 26 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument 27 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument 28 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument 30 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument 31 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument 33 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument 34 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument 35 #define VDPU_REG_STARTMB_Y(v) (((v) << 0) & GENMASK(7, 0)) argument [all …]
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D | hantro_g1_mpeg2_dec.c | 23 #define G1_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument 25 #define G1_REG_DEC_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24)) argument 26 #define G1_REG_DEC_TIMEOUT_E(v) ((v) ? BIT(23) : 0) argument 27 #define G1_REG_DEC_STRSWAP32_E(v) ((v) ? BIT(22) : 0) argument 28 #define G1_REG_DEC_STRENDIAN_E(v) ((v) ? BIT(21) : 0) argument 29 #define G1_REG_DEC_INSWAP32_E(v) ((v) ? BIT(20) : 0) argument 30 #define G1_REG_DEC_OUTSWAP32_E(v) ((v) ? BIT(19) : 0) argument 31 #define G1_REG_DEC_DATA_DISC_E(v) ((v) ? BIT(18) : 0) argument 32 #define G1_REG_DEC_LATENCY(v) (((v) << 11) & GENMASK(16, 11)) argument 33 #define G1_REG_DEC_CLK_GATE_E(v) ((v) ? BIT(10) : 0) argument [all …]
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/Linux-v5.10/drivers/gpu/host1x/hw/ |
D | hw_host1x06_uclass.h | 15 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted 29 * <x> value 'r' after being shifted to place its LSB at bit 0. 44 return 0x0; in host1x_uclass_incr_syncpt_r() 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument 50 return (v & 0xff) << 10; in host1x_uclass_incr_syncpt_cond_f() 52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument 53 host1x_uclass_incr_syncpt_cond_f(v) 54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument 56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f() 58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument [all …]
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D | hw_host1x01_uclass.h | 15 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted 29 * <x> value 'r' after being shifted to place its LSB at bit 0. 44 return 0x0; in host1x_uclass_incr_syncpt_r() 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument 50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f() 52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument 53 host1x_uclass_incr_syncpt_cond_f(v) 54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument 56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f() 58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument [all …]
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D | hw_host1x02_uclass.h | 15 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted 29 * <x> value 'r' after being shifted to place its LSB at bit 0. 44 return 0x0; in host1x_uclass_incr_syncpt_r() 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument 50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f() 52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument 53 host1x_uclass_incr_syncpt_cond_f(v) 54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument 56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f() 58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument [all …]
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D | hw_host1x04_uclass.h | 15 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted 29 * <x> value 'r' after being shifted to place its LSB at bit 0. 44 return 0x0; in host1x_uclass_incr_syncpt_r() 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument 50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f() 52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument 53 host1x_uclass_incr_syncpt_cond_f(v) 54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument 56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f() 58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument [all …]
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D | hw_host1x05_uclass.h | 15 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted 29 * <x> value 'r' after being shifted to place its LSB at bit 0. 44 return 0x0; in host1x_uclass_incr_syncpt_r() 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument 50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f() 52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument 53 host1x_uclass_incr_syncpt_cond_f(v) 54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument 56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f() 58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument [all …]
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D | hw_host1x07_uclass.h | 15 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted 29 * <x> value 'r' after being shifted to place its LSB at bit 0. 44 return 0x0; in host1x_uclass_incr_syncpt_r() 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument 50 return (v & 0xff) << 10; in host1x_uclass_incr_syncpt_cond_f() 52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument 53 host1x_uclass_incr_syncpt_cond_f(v) 54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument 56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f() 58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument [all …]
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/Linux-v5.10/drivers/iommu/ |
D | msm_iommu_hw-8xxx.h | 20 #define SET_GLOBAL_REG_N(b, n, r, v) SET_GLOBAL_REG(b, ((r) + (n << 2)), (v)) argument 28 #define SET_GLOBAL_FIELD(b, r, F, v) \ argument 29 SET_FIELD(((b) + (r)), F##_MASK, F##_SHIFT, (v)) 30 #define SET_CONTEXT_FIELD(b, c, r, F, v) \ argument 31 SET_FIELD(((b) + (r) + ((c) << CTX_SHIFT)), F##_MASK, F##_SHIFT, (v)) 35 #define SET_FIELD(addr, mask, shift, v) \ argument 38 writel((t & ~((mask) << (shift))) + (((v) & (mask)) << (shift)), addr);\ 39 } while (0) 47 #define FL_BASE_MASK 0xFFFFFC00 48 #define FL_TYPE_TABLE (1 << 0) [all …]
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/Linux-v5.10/drivers/gpu/drm/amd/display/dc/calcs/ |
D | dcn_calc_auto.c | 40 void scaler_settings_calculation(struct dcn_bw_internal_vars *v) in scaler_settings_calculation() argument 43 for (k = 0; k <= v->number_of_active_planes - 1; k++) { in scaler_settings_calculation() 44 if (v->allow_different_hratio_vratio == dcn_bw_yes) { in scaler_settings_calculation() 45 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation() 46 v->h_ratio[k] = v->viewport_width[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation() 47 v->v_ratio[k] = v->viewport_height[k] / v->scaler_recout_height[k]; in scaler_settings_calculation() 50 v->h_ratio[k] = v->viewport_height[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation() 51 v->v_ratio[k] = v->viewport_width[k] / v->scaler_recout_height[k]; in scaler_settings_calculation() 55 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation() 56 …v->h_ratio[k] =dcn_bw_max2(v->viewport_width[k] / v->scaler_rec_out_width[k], v->viewport_height[k… in scaler_settings_calculation() [all …]
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/Linux-v5.10/arch/powerpc/include/asm/ |
D | atomic.h | 25 static __inline__ int atomic_read(const atomic_t *v) in atomic_read() argument 29 __asm__ __volatile__("lwz%U1%X1 %0,%1" : "=r"(t) : "m"(v->counter)); in atomic_read() 34 static __inline__ void atomic_set(atomic_t *v, int i) in atomic_set() argument 36 __asm__ __volatile__("stw%U0%X0 %1,%0" : "=m"(v->counter) : "r"(i)); in atomic_set() 40 static __inline__ void atomic_##op(int a, atomic_t *v) \ 45 "1: lwarx %0,0,%3 # atomic_" #op "\n" \ 46 #asm_op " %0,%2,%0\n" \ 47 " stwcx. %0,0,%3 \n" \ 49 : "=&r" (t), "+m" (v->counter) \ 50 : "r" (a), "r" (&v->counter) \ [all …]
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/Linux-v5.10/drivers/md/ |
D | dm-verity-target.c | 46 struct dm_verity *v; member 55 * The variable hash_verified is set to 0 when allocating the buffer, then 56 * it can be changed to 1 and it is never reset to 0 again. 74 aux->hash_verified = 0; in dm_bufio_alloc_callback() 80 static sector_t verity_map_sector(struct dm_verity *v, sector_t bi_sector) in verity_map_sector() argument 82 return v->data_start + dm_target_offset(v->ti, bi_sector); in verity_map_sector() 87 * (0 is the lowest level). 91 static sector_t verity_position_at_level(struct dm_verity *v, sector_t block, in verity_position_at_level() argument 94 return block >> (level * v->hash_per_block_bits); in verity_position_at_level() 97 static int verity_hash_update(struct dm_verity *v, struct ahash_request *req, in verity_hash_update() argument [all …]
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/Linux-v5.10/drivers/mtd/nand/raw/ |
D | nand_ids.c | 10 #define LP_OPTIONS 0 20 * If page size and eraseblock size are 0, the sizes are taken from the 29 {"TC58NVG0S3E 1G 3.3V 8-bit", 30 { .id = {0x98, 0xd1, 0x90, 0x15, 0x76, 0x14, 0x01, 0x00} }, 31 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), }, 32 {"TC58NVG2S0F 4G 3.3V 8-bit", 33 { .id = {0x98, 0xdc, 0x90, 0x26, 0x76, 0x15, 0x01, 0x08} }, 34 SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) }, 35 {"TC58NVG2S0H 4G 3.3V 8-bit", 36 { .id = {0x98, 0xdc, 0x90, 0x26, 0x76, 0x16, 0x08, 0x00} }, [all …]
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/Linux-v5.10/arch/x86/lib/ |
D | atomic64_386_32.S | 27 LOCK v; 32 UNLOCK v; \ 39 #define v %ecx macro 41 movl (v), %eax 42 movl 4(v), %edx 44 #undef v 46 #define v %esi macro 48 movl %ebx, (v) 49 movl %ecx, 4(v) 51 #undef v [all …]
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/Linux-v5.10/drivers/vhost/ |
D | vdpa.c | 61 struct vhost_vdpa *v = container_of(vq->dev, struct vhost_vdpa, vdev); in handle_vq_kick() local 62 const struct vdpa_config_ops *ops = v->vdpa->config; in handle_vq_kick() 64 ops->kick_vq(v->vdpa, vq - v->vqs); in handle_vq_kick() 80 struct vhost_vdpa *v = private; in vhost_vdpa_config_cb() local 81 struct eventfd_ctx *config_ctx = v->config_ctx; in vhost_vdpa_config_cb() 89 static void vhost_vdpa_setup_vq_irq(struct vhost_vdpa *v, u16 qid) in vhost_vdpa_setup_vq_irq() argument 91 struct vhost_virtqueue *vq = &v->vqs[qid]; in vhost_vdpa_setup_vq_irq() 92 const struct vdpa_config_ops *ops = v->vdpa->config; in vhost_vdpa_setup_vq_irq() 93 struct vdpa_device *vdpa = v->vdpa; in vhost_vdpa_setup_vq_irq() 101 if (!vq->call_ctx.ctx || irq < 0) in vhost_vdpa_setup_vq_irq() [all …]
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/Linux-v5.10/drivers/target/sbp/ |
D | sbp_target.h | 16 #define MANAGEMENT_AGENT_STATE_IDLE 0 19 #define ORB_NOTIFY(v) (((v) >> 31) & 0x01) argument 20 #define ORB_REQUEST_FORMAT(v) (((v) >> 29) & 0x03) argument 22 #define MANAGEMENT_ORB_FUNCTION(v) (((v) >> 16) & 0x0f) argument 24 #define MANAGEMENT_ORB_FUNCTION_LOGIN 0x0 25 #define MANAGEMENT_ORB_FUNCTION_QUERY_LOGINS 0x1 26 #define MANAGEMENT_ORB_FUNCTION_RECONNECT 0x3 27 #define MANAGEMENT_ORB_FUNCTION_SET_PASSWORD 0x4 28 #define MANAGEMENT_ORB_FUNCTION_LOGOUT 0x7 29 #define MANAGEMENT_ORB_FUNCTION_ABORT_TASK 0xb [all …]
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/Linux-v5.10/crypto/ |
D | aegis128-neon-inner.c | 26 uint8x16_t v[5]; member 44 vst1q_u8(state, st.v[0]); in aegis128_save_state_neon() 45 vst1q_u8(state + 16, st.v[1]); in aegis128_save_state_neon() 46 vst1q_u8(state + 32, st.v[2]); in aegis128_save_state_neon() 47 vst1q_u8(state + 48, st.v[3]); in aegis128_save_state_neon() 48 vst1q_u8(state + 64, st.v[4]); in aegis128_save_state_neon() 59 0x0, 0x5, 0xa, 0xf, 0x4, 0x9, 0xe, 0x3, in aegis_aes_round() 60 0x8, 0xd, 0x2, 0x7, 0xc, 0x1, 0x6, 0xb, in aegis_aes_round() 63 0x1, 0x2, 0x3, 0x0, 0x5, 0x6, 0x7, 0x4, in aegis_aes_round() 64 0x9, 0xa, 0xb, 0x8, 0xd, 0xe, 0xf, 0xc, in aegis_aes_round() [all …]
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/Linux-v5.10/drivers/gpu/drm/exynos/ |
D | regs-scaler.h | 17 #define SCALER_STATUS 0x0 /* no shadow */ 18 #define SCALER_CFG 0x4 21 #define SCALER_INT_EN 0x8 /* no shadow */ 22 #define SCALER_INT_STATUS 0xc /* no shadow */ 25 #define SCALER_SRC_CFG 0x10 26 #define SCALER_SRC_Y_BASE 0x14 27 #define SCALER_SRC_CB_BASE 0x18 28 #define SCALER_SRC_CR_BASE 0x294 29 #define SCALER_SRC_SPAN 0x1c 30 #define SCALER_SRC_Y_POS 0x20 [all …]
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/Linux-v5.10/drivers/staging/media/sunxi/cedrus/ |
D | cedrus_regs.h | 13 #define SHIFT_AND_MASK_BITS(v, h, l) \ argument 14 (((unsigned long)(v) << (l)) & GENMASK(h, l)) 32 #define VE_ENGINE_DEC_MPEG 0x100 33 #define VE_ENGINE_DEC_H264 0x200 34 #define VE_ENGINE_DEC_H265 0x500 36 #define VE_MODE 0x00 40 #define VE_MODE_REC_WR_MODE_2MB (0x01 << 20) 41 #define VE_MODE_REC_WR_MODE_1MB (0x00 << 20) 42 #define VE_MODE_DDR_MODE_BW_128 (0x03 << 16) 43 #define VE_MODE_DDR_MODE_BW_256 (0x02 << 16) [all …]
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/Linux-v5.10/drivers/media/platform/sunxi/sun8i-di/ |
D | sun8i-di.h | 20 #define DEINTERLACE_MOD_ENABLE 0x00 21 #define DEINTERLACE_MOD_ENABLE_EN BIT(0) 23 #define DEINTERLACE_FRM_CTRL 0x04 24 #define DEINTERLACE_FRM_CTRL_REG_READY BIT(0) 30 #define DEINTERLACE_BYPASS 0x08 33 #define DEINTERLACE_AGTH_SEL 0x0c 36 #define DEINTERLACE_LINT_CTRL 0x10 37 #define DEINTERLACE_TRD_PRELUMA 0x1c 38 #define DEINTERLACE_BUF_ADDR0 0x20 39 #define DEINTERLACE_BUF_ADDR1 0x24 [all …]
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