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/Linux-v5.10/arch/arm64/boot/dts/hisilicon/
Dhip06.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip06-d03";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
[all …]
Dhip07.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip07-d05";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
[all …]
/Linux-v5.10/drivers/staging/media/atomisp/pci/
Dsh_css_params.c1 // SPDX-License-Identifier: GPL-2.0
61 #include "anr/anr_1.0/ia_css_anr.host.h"
62 #include "cnr/cnr_1.0/ia_css_cnr.host.h"
63 #include "csc/csc_1.0/ia_css_csc.host.h"
64 #include "de/de_1.0/ia_css_de.host.h"
65 #include "dp/dp_1.0/ia_css_dp.host.h"
66 #include "bnr/bnr_1.0/ia_css_bnr.host.h"
67 #include "dvs/dvs_1.0/ia_css_dvs.host.h"
68 #include "fpn/fpn_1.0/ia_css_fpn.host.h"
69 #include "gc/gc_1.0/ia_css_gc.host.h"
[all …]
/Linux-v5.10/drivers/media/usb/gspca/
Dsn9c2028.c1 // SPDX-License-Identifier: GPL-2.0-or-later
37 unsigned char to_read; /* length to read. 0 means no reply requested */
44 .sizeimage = 640 * 480 * 3 / 4,
46 .priv = 0},
53 .sizeimage = 352 * 288 * 3 / 4,
55 .priv = 0},
58 /* the bytes to write are in gspca_dev->usb_buf */
64 command[0], command[1], command[2], in sn9c2028_command()
65 command[3], command[4], command[5]); in sn9c2028_command()
67 memcpy(gspca_dev->usb_buf, command, 6); in sn9c2028_command()
[all …]
/Linux-v5.10/arch/arm/boot/dts/
Dvexpress-v2p-ca5s.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A5 MPCore (V2P-CA5s)
8 * HBI-0225B
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA5s";
16 arm,hbi = <0x225>;
17 arm,vexpress,site = <0xf>;
18 compatible = "arm,vexpress,v2p-ca5s", "arm,vexpress";
19 interrupt-parent = <&gic>;
[all …]
Dvexpress-v2p-ca15-tc1.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15 MPCore (V2P-CA15)
8 * HBI-0237A
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA15";
16 arm,hbi = <0x237>;
17 arm,vexpress,site = <0xf>;
18 compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress";
19 interrupt-parent = <&gic>;
[all …]
Dvexpress-v2p-ca9.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A9 MPCore (V2P-CA9)
8 * HBI-0191B
11 /dts-v1/;
12 #include "vexpress-v2m.dtsi"
15 model = "V2P-CA9";
16 arm,hbi = <0x191>;
17 arm,vexpress,site = <0xf>;
18 compatible = "arm,vexpress,v2p-ca9", "arm,vexpress";
19 interrupt-parent = <&gic>;
[all …]
Dvexpress-v2p-ca15_a7.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15_A7 MPCore (V2P-CA15_A7)
8 * HBI-0249A
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA15_CA7";
16 arm,hbi = <0x249>;
17 arm,vexpress,site = <0xf>;
18 compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress";
19 interrupt-parent = <&gic>;
[all …]
/Linux-v5.10/fs/exfat/
Dballoc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd.
14 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2,/* 0 ~ 19*/
15 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2, 0, 1, 0, 3,/* 20 ~ 39*/
16 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/* 40 ~ 59*/
17 0, 1, 0, 6, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4,/* 60 ~ 79*/
18 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2,/* 80 ~ 99*/
19 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3,/*100 ~ 119*/
20 0, 1, 0, 2, 0, 1, 0, 7, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/*120 ~ 139*/
21 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5,/*140 ~ 159*/
[all …]
/Linux-v5.10/arch/x86/lib/
Dmemcpy_32.c1 // SPDX-License-Identifier: GPL-2.0
31 "cmp $0x10, %0\n\t" in memmove()
42 "cmp $680, %0\n\t" in memmove()
49 "and $0xff, %3\n\t" in memmove()
50 "jz 4f\n\t" in memmove()
52 "sub $0x10, %0\n\t" in memmove()
58 "sub $0x10, %0\n\t" in memmove()
59 "mov 0*4(%1), %3\n\t" in memmove()
60 "mov 1*4(%1), %4\n\t" in memmove()
61 "mov %3, 0*4(%2)\n\t" in memmove()
[all …]
/Linux-v5.10/arch/arm64/boot/dts/freescale/
Dfsl-ls208xa.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
31 #address-cells = <1>;
32 #size-cells = <0>;
37 reg = <0x00000000 0x80000000 0 0x80000000>;
[all …]
/Linux-v5.10/arch/arc/include/asm/
Duaccess.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
6 * -__clear_user( ) called multiple times during elf load was byte loop
10 * -Hand crafted constant propagation for "constant" copy sizes
11 * -stock kernel shrunk by 33K at -O3
14 * -Added option to (UN)inline copy_(to|from)_user to reduce code sz
15 * -kernel shrunk by 200K even at -O3 (gcc 4.2.1)
16 * -Enabled when doing -Os
32 * where TASK_SIZE could either be retrieved from thread_info->addr_limit or
39 * non-ngeative, which implies that buffer start will be within limit too.
[all …]
/Linux-v5.10/drivers/block/paride/
Dkbic.c2 kbic.c (c) 1997-8 Grant R. Guenther <grant@torque.net>
5 This is a low-level driver for the KBIC-951A and KBIC-971A
33 #define r12w() (delay_p,inw(pi->port+1)&0xffff)
35 #define j44(a,b) ((((a>>4)&0x0f)|(b&0xf0))^0x88)
36 #define j53(w) (((w>>3)&0x1f)|((w>>4)&0xe0))
39 /* cont = 0 - access the IDE register file
40 cont = 1 - access the IDE command set
43 static int cont_map[2] = { 0x80, 0x40 };
51 switch (pi->mode) { in kbic_read_regr()
53 case 0: w0(regr|0x18|s); w2(4); w2(6); w2(4); w2(1); w0(8); in kbic_read_regr()
[all …]
/Linux-v5.10/arch/arm64/crypto/
Dsha2-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * sha2-ce-core.S - core SHA-224/SHA-256 transform using v8 Crypto Extensions
12 .arch armv8-a+crypto
32 add t1.4s, v\s0\().4s, \rc\().4s
33 sha256h dg0q, dg1q, t0.4s
34 sha256h2 dg1q, dg2q, t0.4s
37 add t0.4s, v\s0\().4s, \rc\().4s
39 sha256h dg0q, dg1q, t1.4s
40 sha256h2 dg1q, dg2q, t1.4s
45 sha256su0 v\s0\().4s, v\s1\().4s
[all …]
Dchacha-neon-core.S4 * Copyright (C) 2016-2018 Linaro, Ltd. <ard.biesheuvel@linaro.org>
11 * ChaCha20 256-bit cipher algorithm, RFC7539, x64 SSSE3 functions
29 * chacha_permute - permute one block
31 * Permute one 64-byte block where the state matrix is stored in the four NEON
32 * registers v0-v3. It performs matrix operations on four words in parallel,
42 ld1 {v12.4s}, [x10]
46 add v0.4s, v0.4s, v1.4s
51 add v2.4s, v2.4s, v3.4s
53 shl v1.4s, v4.4s, #12
54 sri v1.4s, v4.4s, #20
[all …]
/Linux-v5.10/arch/arm64/boot/dts/intel/
Dsocfpga_agilex.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/agilex-clock.h>
12 compatible = "intel,socfpga-agilex";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
[all …]
/Linux-v5.10/arch/arm64/boot/dts/altera/
Dsocfpga_stratix10.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/net/
Dsamsung-sxgbe.txt4 - compatible: Should be "samsung,sxgbe-v2.0a"
5 - reg: Address and length of the register set for the device
6 - interrupts: Should contain the SXGBE interrupts
9 index 0 - this is fixed common interrupt of SXGBE and it is always
11 index 1 to 25 - 8 variable trasmit interrupts, variable 16 receive interrupts
13 - phy-mode: String, operation mode of the PHY interface.
15 - samsung,pbl: Integer, Programmable Burst Length.
16 Supported values are 1, 2, 4, 8, 16, or 32.
17 - samsung,burst-map: Integer, Program the possible bursts supported by sxgbe
19 Allowable range is 0x01-0x3F. When this field is set fixed burst is enabled.
[all …]
/Linux-v5.10/drivers/net/ethernet/sfc/
Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
19 #define MC_FW_STATE_BOOTING (4)
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
36 #define MC_SMEM_P0_DOORBELL_OFST 0x000
37 #define MC_SMEM_P1_DOORBELL_OFST 0x004
38 /* The rest of these are firmware-defined */
39 #define MC_SMEM_P0_PDU_OFST 0x008
[all …]
/Linux-v5.10/drivers/pinctrl/renesas/
Dpfc-r8a77470.c1 // SPDX-License-Identifier: GPL-2.0
3 * R8A77470 processor support - PFC hardware block.
14 PORT_GP_4(0, fn, sfx), \
15 PORT_GP_1(0, 4, fn, sfx), \
16 PORT_GP_CFG_1(0, 5, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
17 PORT_GP_CFG_1(0, 6, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
18 PORT_GP_CFG_1(0, 7, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
19 PORT_GP_CFG_1(0, 8, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
20 PORT_GP_CFG_1(0, 9, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
21 PORT_GP_CFG_1(0, 10, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
[all …]
/Linux-v5.10/drivers/net/dsa/sja1105/
Dsja1105_ethtool.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
6 #define SJA1105_SIZE_MAC_AREA (0x02 * 4)
7 #define SJA1105_SIZE_HL1_AREA (0x10 * 4)
8 #define SJA1105_SIZE_HL2_AREA (0x4 * 4)
9 #define SJA1105_SIZE_QLEVEL_AREA (0x8 * 4) /* 0x4 to 0xB */
10 #define SJA1105_SIZE_ETHER_AREA (0x17 * 4)
104 /* Make pointer arithmetic work on 4 bytes */ in sja1105_port_status_mac_unpack()
107 sja1105_unpack(p + 0x0, &status->n_runt, 31, 24, 4); in sja1105_port_status_mac_unpack()
108 sja1105_unpack(p + 0x0, &status->n_soferr, 23, 16, 4); in sja1105_port_status_mac_unpack()
[all …]
/Linux-v5.10/drivers/video/fbdev/riva/
Driva_tbl.h3 |* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *|
7 |* hereby granted a nonexclusive, royalty-free copyright license to *|
10 |* Any use of this source code must include, in the user documenta- *|
14 |* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *|
18 |* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *|
20 |* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
22 |* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *|
23 |* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *|
32 |* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *|
34 |* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
[all …]
/Linux-v5.10/arch/arm64/boot/dts/xilinx/
Dzynqmp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2014 - 2019, Xilinx, Inc.
15 #include <dt-bindings/power/xlnx-zynqmp-power.h>
16 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
20 #address-cells = <2>;
21 #size-cells = <2>;
24 #address-cells = <1>;
25 #size-cells = <0>;
27 cpu0: cpu@0 {
28 compatible = "arm,cortex-a53";
[all …]
/Linux-v5.10/drivers/video/fbdev/nvidia/
Dnv_hw.c3 |* Copyright 1993-2003 NVIDIA, Corporation. All rights reserved. *|
7 |* hereby granted a nonexclusive, royalty-free copyright license to *|
10 |* Any use of this source code must include, in the user documenta- *|
14 |* Copyright 1993-2003 NVIDIA, Corporation. All rights reserved. *|
18 |* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *|
20 |* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
22 |* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *|
23 |* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *|
32 |* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *|
34 |* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
[all …]
/Linux-v5.10/include/dt-bindings/pinctrl/
Dpads-imx8qxp.h1 /* SPDX-License-Identifier: GPL-2.0+ */
11 #define IMX8QXP_PCIE_CTRL0_PERST_B 0
15 #define IMX8QXP_USB_SS3_TC0 4
189 … IMX8QXP_PCIE_CTRL0_PERST_B_HSIO_PCIE0_PERST_B IMX8QXP_PCIE_CTRL0_PERST_B 0
190 … IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 IMX8QXP_PCIE_CTRL0_PERST_B 4
191 … IMX8QXP_PCIE_CTRL0_CLKREQ_B_HSIO_PCIE0_CLKREQ_B IMX8QXP_PCIE_CTRL0_CLKREQ_B 0
192 … IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 IMX8QXP_PCIE_CTRL0_CLKREQ_B 4
193 … IMX8QXP_PCIE_CTRL0_WAKE_B_HSIO_PCIE0_WAKE_B IMX8QXP_PCIE_CTRL0_WAKE_B 0
194 … IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 IMX8QXP_PCIE_CTRL0_WAKE_B 4
195 … IMX8QXP_USB_SS3_TC0_ADMA_I2C1_SCL IMX8QXP_USB_SS3_TC0 0
[all …]

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